According to non-stopable progress in wireless communications, it is desirable to integrate the RF front-end with the baseband building blocks of communication circuits into a one chip in the recent years. The CMOS technology advances, this is the reason why it becomes attractive for system-on-a-chip implementation, but CMOS device is getting shrink, so the channel electric field increasing and the hot carrier (HCI) effect becomes more significant. If the oxide is scaled down to less than 3 nm, then there is the possibility of soft or hard oxide breakdown (S/HBD) often takes place. As a result of the oxide trapping and interface generation is the long term performance drift and related reliability problems in devices and circuits. During the scaling and increasing chip power dissipation operating temperatures for device have also is increasing. Another reliability concern is the negative bias temperature instability (NBTI) caused by the interface traps under high temperature and negative gate voltage bias are arising while the operation temperature of devices is increasing. Parameter’s extraction is a very important part of the current electronic components modeling process, as it looking for the value of the unknown parameters in mathematical model, which represents physical behavior of given electronic component. The problem of parameter extraction is that fits electronic components mathematical model to a measured data set is an ill-posed problem and its solution is inherently difficult. This diploma thesis presents the parameter extraction, optimization methodology and verifies it on a case study of a MOSFET mathematical models (LEVEL1, LEVEL2 and LEVEL3) parameter extraction. The presented nonlinear method is based on the method of the least squares, which is solved with the aid of Levenberg- Marquardt’s algorithm.

This project deals with transistorized converters in particular a four-quadrant bridge. The main part of project discusses the drivers of transistors and a possible way of controlling a converter. The proposal of control electronics and the regulation structure are involved in the second part. This project also includes a construction of an apparatus which will be used as a teaching material.

2D semiconductors are one of the most promising materials for next-generation electronics. Realizing continuous 2D monolayer semiconductors with single-crystalline structure at the wafer scale is still a challenge. We developed an epitaxial phase conversion (EPC) process to meet these requirements. The EPC process is a two-step process, where the sulfurization process was carried out on pre-deposited Mo-containing films. Traditionally, two-step processes for 2D MoS2 and other chalcogenides have suffered low-quality film and non-discontinuity at monolayer thickness. The reason was regarded as the low lattice quality of precursor film. The EPC process solves these problems by carefully preparing the precursor film and carefully controlling the sulfurization process. The precursor film in the EPC process is epitaxial MoO2 grown on 2″ diameter sapphire substrate by pulsed laser deposition. This epitaxial precursor contains significantly fewer defects compared to amorphous precursor films. Thus fewer defects are inherited by the EPC MoS2 film. Therefore, EPC MoS2 film quality is much better. The EPC prepared monolayer MoS2 devices to show field-effect mobility between 10 ~ 30 cm2·V-1s-1, which is the best among the two-step process. We also developed a CLAP method further to reduce the defects in the precursor oxide film; thus, in-plane texture in the thicker MoS2 film was eliminated, and a single-crystalline structure was obtained in the wafer-scale MoS2 films. The potentially feasible technique to further improve the 2D film quality is pointed out for our next research plan. Meanwhile, the epitaxial phase conversion process was proposed to be as a universal growth method. Last but not least, we demonstrate several potential applications of the wafer-scale single-crystalline MoS2 film we developed, such as logic circuits, flexible electronics, and seeding layer of van der Waal or remote epitaxial growth.

1998 publizierten die Arbeitsgruppen von S. J. Tans und R. Martel die Herstellung des Prototypen eines Kohlenstoffnanoröhren Feldeffekttransistors. Dabei bilden halbleitende Kohlenstoffnanoröhren den aktiven, feldgesteuerten Bereich des Transistors. Aufgrund der herausragenden Eigenschaften der Kohlenstoffnanoröhren wurde den Bauelementen ein großes Anwendungspotential in Halbleiterindustrie und Sensorik vorhergesagt. Dass die Verwendung von Kohlenstoffnanoröhren in der Industrie heute hinter den Erwartungen zurückbleibt, liegt vor allem an den Problemen bei der Sortierung und Integration der Kohlenstoffnanoröhren: Trotz intensiver Bemühungen entsteht bei der Synthese eine Mischung aus halbleitenden und metallischen Kohlenstoffnanoröhren. Eine postsynthetische Separation der Spezies ist daher notwendig. In dieser Arbeit wurden verschiedene Wege zur Separation der Kohlenstoffnanoröhren in eine halbleitende und metallische Fraktion verfolgt: (i) Die Dichtegradientenzentrifugation differenziert zwischen unterschiedlichen Schwimmdichten der Kohlenstoffnanoröhren in einer Lösung mit einem Dichtegradienten. Durch die selektive Assemblierung unterschiedlich polarisierbarer Tenside werden Dichteunterschiede zwischen den halbleitenden und metallischen Röhren hergestellt. In einem Zwei-Schritt-Verfahren konnte so eine hohe Reinheit an halbleitenden Kohlenstoffnanoröhren erzielt werden. (ii) Die dielektrophoretische Auftrennung der Kohlenstoffnanoröhren erfolgt aufgrund von Unterschieden in der Polarität und der Leitfähigkeit der metallischen und halbleitenden Spezies. Durch die Wahl des Tensidsystems können dabei die Unterschiede zwischen den beiden Spezies verstärkt und somit die Sortierung effizienter gestaltet werden. Die Erfahrungen mit statischen Dielektrophorese-Experimenten wurden in ein kontinuierliches mikrofluidisches System übertragen. Damit eröffnet sich die Möglichkeit der Separation der Kohlenstoffnanoröhren im größeren Maßstab. Im Anschluss an die Sortierung ist ein Prozess notwendig, der die parallele Integration vieler Kohlenstoffnanoröhren in mikroelektronische Strukturen auf einem Wafer ermöglicht. Die Dielektrophorese erlaubt die ortsspezische parallele Assemblierung der Kohlenstoffnanoröhren in vorgefertigte Strukturen. Damit können auf Waferebene Kohlenstoffnanoröhren-Feldeffekttransistoren aufgebaut werden. In dieser Arbeit kann gezeigt werden, dass mit der Integration sortierter halbleitender Röhren die übliche selektive Zerstörung metallischer Strompfade überflüssig ist. Im letzten Teil dieser Arbeit soll der aufgebaute Kohlenstoffnanoröhren-Feldeffekttransistor für einen zukünftigen Einsatz als membranbasierter Biosensor modifiziert werden. Dafür wird eine Doppellipidschicht über den Kohlenstoffnanoröhren assembliert werden, welche als Modell für eine Biomembran dient. Es werden erste Messungen in Flüssigkeit gezeigt und die Interaktion der Lipidmoleküle mit den dispergierten Kohlenstoffnanoröhren charakterisiert.

Les transistors organiques à effet de champ (OFETs) dans lesquels le transport des charges se fait à travers un film mince de molécules organiques représentent une transformation de la technologie des transistors à effet de champ au regard de la technologie au silicium. Ils permettent notamment d’envisager le développement d’une électronique flexible à bas coût. Ce travail porte sur la synthèse, l’étude et l’utilisation en tant que couche active dans des OFETs de type n de couples d’isomères para- et méta-indacénodithiophènes (para- et méta-IDT) appauvris en électrons inédits. Une introduction aux OFETs de type n est tout d’abord présentée. Elle est suivie par la présentation de la synthèse des dérivés IDT et de l’analyse comparée de leurs propriétés physico-chimiques. La fabrication des OFETs, leur caractérisation et l’optimisation de leur architecture est enfin décrite, leurs performances montrant l’intérêt des IDTs pour les OFETs de type n. Différentes fonctionnalisations menant à des IDTs d’architecture 3π-2spiro sont également synthétisées afin d’étudier les propriétés intrinsèques de ces dérivés π-conjugués et d’envisager leur incorporation comme matrice hôte dans des diodes électrophosphorescentes organiques. / Organic Field Effect Transistors (OFETs), in which the charge transport is carried through a thin film made of organic molecules represent a transformation of the FET technology regarding that based on Silicon. They offer in particular the possibility to manufacture low cost flexible electronics. This work is focused on the synthesis, the study and the use as active layer in n-type OFETs of novel, electron poor, couples of para- and meta-indacenodithiophenes isomers (para- and meta-IDT). First of all, an introduction to the field of n-type OFETs is presented, followed by the presentation of the synthesis of the IDT derivatives and the comparative analysis of their properties. Finally, the fabrication of the OFETs, their characterization and the optimization of their architecture is described. The performances recorded attest that these derivatives are of great interest for the n-type OFETs. Different 3π-2spiro IDT derivatives are also presented in order to study the IDTs intrinsic properties and to envisage their incorporation as host in phosphorescent organic light-emitting diodes.

With the end of Si based Metal Oxide Semiconductor Field Effect Transistor scaling paradigm approaching fast as predicted by the Moore’s Law, and the technological advancements as well as human needs in many ways pushing for faster devices, graphene has emerged as a powerful alternative solution. This is so because of its very special properties like high charge carrier mobility, highly linear dispersion relation, high current carrying capacity and so on. However, since we have a finite resistance at Dirac point, the on/off ratio in graphene devices is sufficiently low, making graphene devices not so suitable for logical applications. At the same time, the 1/f noise, which is understood till now to originate from surface disorders like those observed in a two-dimensional electron gas system like graphene and is a major unwanted outcome in mesoscopic regime devices, reduces very much at high frequencies, making these devices good candidates for high frequency analogue applications. Motivated by these observations, this work explores fabrication and characterization of graphene field effect transistors operating at microwave frequencies, and compares a double gated device performance to a mono-gated device having the same geometry, dielectric layer thickness and gate length. A simple electrostatic finite element simulation model has also been developed to support our experimental observations by fitting simulated gate coupling capacitance values to the measured data. The model helps us in understanding the level of interface trap charge densities introduced into the device channel during fabrication, and the effect of quantum capacitance on device performance, and is in line with the experimental observations. Our results show that a double gated graphene FET has superior performance compared to a mono-gated FET.

京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第19312号 / 工博第4109号 / 新制||工||1633(附属図書館) / 32314 / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 引原 隆士, 准教授 船戸 充 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第21110号 / 工博第4474号 / 新制||工||1695(附属図書館) / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 藤田 静雄, 教授 白石 誠司 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

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