The scrap metal recycling industry is a growing industry that plays an important role in the sustainability of a large global metal supply. Unfortunately, recycling lacks many standards, and test procedures in place for mineral processing. These standards and practices, if used in recycling, could aid recyclers in determining and achieving optimal separations for their plant.. New regulations for scrap imports into China make it difficult to obtain the metal recoveries that have been achieved in the past. In order to help scrap yards adhere to the new regulations the Eriez RCS eddy current separator system was tested in full scale. The principles this system uses, called circuit analysis, have been used by the mining industry for years, and can be used with any separation system. The Eriez RCS system surpassed the requirements of the Chinese regulations, while simultaneously increasing the recovery of metals. In order to further analyze eddy current separator circuits, tree analysis was attempted for single eddy current separators, as well as more complex circuits mimicked using locked cycle tests. The circuits used in the locked cycle test were a rougher-cleaner, a rougher-scavenger, and a rougher-cleaner-scavenger. It was found that it is possible to use tree analysis to compare different eddy current separator circuits using the same settings, however standards for this practice need to be established for it to be useful. Using the data analysis methods developed for this particular tree analysis, the rougher-cleaner-scavenger test had the best performance overall. This is the same result as the full scale testing done on the Eriez RCS system, but more testing should be conducted to confirm the data analysis techniques of calculating theoretical efficiency, recovery efficiency, and rejection efficiency. / Master of Science

<p> An electronic circuit based on a modified version of the four branch Hodgkin-Huxley electrical equivalent circuit (Roy, 1972) has been proposed and implemented to simulate the pattern of the electrical activities present in the muscle cells of the mammalian small intestine. </p> <p> The analog's implementation comprises two main circuits to simulate these activities. One of them is concerned with generating sub threshold oscillations, while the other is basically a spike-generator circuit. Additional circuitry is included to interface them. Furthermore, the analog provides a parameter set by means of which its performance may be varied. Such settings may alter the intrinsic frequency, the magnitude of the depolarizing phase of the control potential for the response activity to occur, and also the frequency of the electrical response activity. </p> <p> Four such electronic oscillators, having different intrinsic frequencies, were coupled together in a chain structure with passive elements to simulate "frequency pulling" and "entrainment" . The model qualitatively reproduced the observed pattern of electrical activities in the small intestine. </p> / Thesis / Master of Engineering (MEngr)

No description available.

No description available.

No description available.

No description available.

No description available.

No description available.

No description available.

<p> This thesis focuses on the noise model verification at both device and circuit levels using circuit simulators. The techniques and procedures developed in this thesis are general and can be applied to any proposed RF noise model equations. To fulfil the two tasks, three main topics have been accomplished. First, a general noise source implementation method has been presented in detail in this thesis and is verified with measurements for both long and short-channel MOSFETs. This method provides a simple and effective way to implement the enhanced channel noise and induced gate noise of MOSFETs without increasing the simulation complexity for the simulators.</p> <p> Second, a systematic procedure to refine the model parameters used in noise calculation is presented. For a model to accurately predict the HF noise characteristics, the accuracy in the prediction of both DC and AC characteristics has to be ensured. The procedure proposed in this thesis provides both DC and AC model parameter verification and optimization for RF noise simulation purpose.</p> <p> Third, as for benchmark circuits to verify noise model at the circuit level, two LNA designs are proposed in the thesis. The first design gives the emphasis on the noise reduction technique and the LNA design procedure. The proposed noise reduction technique gives circuit designers more control on noise figure minimization through noise matching. The second design is used to experimentally verify the noise model at the circuit level.</p> / Thesis / Master of Applied Science (MASc)