Στόχος της παρούσας διπλωματικής εργασίας είναι η εργαστηριακή εξομοίωση της μηχανικής ροπής που εμφανίζεται στο δρομέα μιας πραγματικής ανεμογεννήτριας με τη μέθοδο της ταχείας προτυποποίησης. Η μέθοδος αυτή παρέχει τη δυνατότητα εξομοίωσης του προς μελέτη αντικειμένου, στην προκειμένη περίπτωση της ανεμογεννήτριας, χωρίς να είναι απαραίτητες οι δοκιμές σε πραγματικό εξοπλισμό, διευκολύνει τη μελέτη της ανεμογεννήτριας σε διάφορες συνθήκες και με διαφορετικές κάθε φορά παραμέτρους, χωρίς να είναι απαραίτητη η αναμονή προκειμένου ο άνεμος να είναι κατάλληλος ώστε να κάνουμε δοκιμές στο πραγματικό σύστημα και τέλος δίνει το πλεονέκτημα της αποφυγής βλαβών του πραγματικού εξοπλισμού. Απαραίτητα στοιχεία για να επιτευχθεί ο στόχος της εργασίας είναι μια πειραματική διάταξη, στην οποία θα πραγματοποιηθούν οι δοκιμές και οι μετρήσεις, καθώς επίσης κάποια ανεμολογικά δεδομένα σε συνδυασμό με τα χαρακτηριστικά της πραγματικής ανεμογεννήτριας της οποίας τη ροπή θα εξομοιώσουμε υπό κλίμακα. Η πειραματική διάταξη μπορεί να περιγραφεί συνοπτικά από το σχήμα της Εικ.1. Χρησιμοποιώντας τα ανεμολογικά δεδομένα υπολογίστηκε η ροπή στον δρομέα της πραγματικής ανεμογεννήτριας συναρτήσει της ταχύτητας του ανέμου. Αυτή την ροπή την παρήγαμε υπό κλίμακα στο εργαστήριο, στον άξονα ενός ασύγχρονου τριφασικού κινητήρα, εφαρμόζοντας έλεγχο ροπής. Η πειραματική διάταξη που χρησιμοποιήθηκε περιλαμβάνει μια ασύγχρονη μηχανή, μια μηχανή συνεχούς ρεύματος, ένα μονοφασικό ωμικό φορτίο, έναν τριφασικό αντιστροφέα πηγής τάσης και έναν μικροεπεξεργαστή με τον οποίο υλοποιείται η διαδικασία του ελέγχου. Ο έλεγχος της ασύγχρονης μηχανής γίνεται ρυθμίζοντας την τάση εξόδου του αντιστροφέα κατά πλάτος και συχνότητα, παλμοδοτώντας κατάλληλα τα διακοπτικά στοιχεία του. Το κύκλωμα παλμοδότησης υλοποιείται μέσω του μικροεπεξεργαστή, χρησιμοποιώντας τη μέθοδο ημιτονοειδούς διαμόρφωσης εύρους παλμών (Sinusoidal Pulse Width Modulation, SPWM). Ανάλογα με την τιμή του σφάλματος της ροπής ρυθμίζονται κατάλληλα οι παράμετροι της παλμοδότησης χρησιμοποιώντας τη μέθοδο του ασαφούς ελέγχου (Fuzzy Control). Για τη μέτρηση της ροπής στον άξονα του ασύγχρονου κινητήρα, που αποτελεί το σήμα ανάδρασης του ελέγχου, χρησιμοποιήθηκε ένα ροπόμετρο. Ιδιαίτερα ενδιαφέρουσα είναι η παραγωγή του κώδικα με τον οποίο γίνεται η εξομοίωση και ο έλεγχος. Αρχικά γίνεται μοντελοποίηση του κυκλώματος στο περιβάλλον Simulink και στη συνέχεια, χρησιμοποιώντας τα κατάλληλα εργαλεία, ακολουθείται μια αυτόματη διαδικασία παραγωγής του κώδικα και εκτέλεσή του από τον μικροεπεξεργαστή (DSP). Η χρήση του μικροεπεξεργαστή προσέφερε επίσης αρκετά πλεονεκτήματα και διευκόλυνε την πειραματική διαδικασία. Χρησιμοποιώντας τον μικροεπεξεργαστή για τη διεξαγωγή του ελέγχου, αποφεύχθηκε η χρήση επιπλέον διατάξεων ελέγχου. Επίσης, οι περιφερειακές μονάδες του ήταν ιδιαίτερα χρήσιμες κατά τη δειγματοληψία των μεταβλητών ανάδρασης, κατά την παραγωγή των παλμών της SPWM αλλά και κατά την καταγραφή των δεδομένων. / The main objective of this thesis is the implementation of the mechanical torque that appears on the rotor of a real wind turbine, using the method of rapid prototyping. That method has many advantages. The main advantage is that the use of a real wind turbine was avoided and that minimized the cost of research. A second advantage is that it was not necessary to wait for convenient weather conditions in order to carry out the experiments. In addition, damages of equipment were avoided using the method of rapid prototyping In order to accomplice this objective it is necessary to have an experimental construction, which will be used for tests and measurements, as well as the use of wind speed data and the characteristics of a real wind turbine, which will be used to calculate in scale the real torque that appears on the rotor. The experimental construction is shown in Pic.2. The torque on the rotor of the real wind turbine was calculated as a function of wind speed. That torque was implemented in scale using torque control of an induction motor in the laboratory. The experimental construction includes an induction machine, a constant current machine, a single-phase resistive load, a three-phase voltage source inverter and a digital signal processor, which is used to accomplice the control procedure. The torque control of the induction machine is achieved by regulating the amplitude and the frequency of the output voltage of the inverter, using the appropriate pulses to drive the IGBTs. The microprocessor produces the pulses using the method of Sinusoidal Pulse Width Modulation (SPWM). The parameters of the pulses are proportional to the torque error and are appropriately calculated using the method of Fuzzy Control. A torque meter was used in order to measure the torque on the shaft of the induction motor, which was the feedback signal for the control procedure. The code generation is achieved using a microprocessor (DSP). Initially, a simulation model is made using the program Simulink and then, using the right tools, the code is generated and run using the microprocessor. Using the microprocessor had many advantages and made the experiment procedure easier. Initially, additional control devices were not necessary during the experiments. Also, the microprocessor peripherals were useful during the sampling of feedback signals, during the calculation of SPWM pulses and during data recording.

Voltage source inverter (VSI) fed induction motors are increasingly used in industrial and transportation applications as variable speed drives. However, VSIs generate non-sinusoidal voltages and hence result in harmonic distortion in motor current, motor heating, torque pulsations and increased acoustic noise. Most of these undesirable effects can be reduced by increasing the switching frequency of the inverter. This is not necessarily true for acoustic noise. Acoustic noise does not decrease monotonically with increase in switching frequency since the noise emitted depends on the proximity of harmonic frequencies to the motor resonant frequencies. Also there are practical limitations on the inverter switching frequency on account of device rating and losses. The switching frequency of many inverters often falls in the range 2 kHz - 6 kHz where the human ear is highly sensitive. Hence, the acoustic noise emission from the motor drive is of utmost important. Further, the acoustic noise emitted by the motor drive is known to depend on the waveform quality of the voltage applied. Hence, the acoustic performance varies with the pulse width modulation (PWM) technique used to modulate the inverter, even at the same modulation index. Therefore a comprehensive study on the acoustic noise aspects of induction motor drive is required. The acoustic noise study of the motor drive poses multifaceted challenges. A simple motor model is sufficient for calculation of total harmonic distortion (THD). A more detailed model is required for torque pulsation studies. But the motor acoustic noise is affected by many other factors such as stator winding distribution, space harmonics, geometry of stator and rotor slots, motor irregularities, structural issues controlling the resonant frequency and environmental factors. Hence an accurate model for acoustic noise would have to be very detailed and would span different domains such as electromagnetic fields, structural engineering, vibration and acoustics. Motor designers employ such detailed models along with details of the materials used and geometry to predict the acoustic noise that would be emitted by a motor and also to design a low-noise motor. However such detailed motor model for acoustic noise purposes and the necessary material and constructional details of the motor are usually not available to the user. Also, certain factors influencing the acoustic noise change due to wear and tear during the operational life of the motor. Hence this thesis takes up an experimental approach to study the acoustic noise performance of an inverter-fed induction motor at any stage of its operating life. A 10 kVA insulated gate bipolar transistor (IGBT) based inverter is built to feed the induction motor; a 6 kW and 2.3 kW induction motors are used as experimental motors. A low-cost acoustic noise measurement system is also developed as per relevant standards for measurement and spectral analysis of the acoustic noise emitted. For each PWM scheme, the current and acoustic noise measurements are carried out extensively at different carrier frequencies over a range of fundamental frequencies. The main cause of acoustic noise of electromagnetic origin is the stator core vibration, which is caused by the interaction of air-gap fluxes produced by fundamental current and harmonic currents. In this thesis, an experimental procedure is suggested for the acoustic noise characterization of an induction motor inclusive of determination of resonant frequencies. Further, based on current and acoustic noise measurements, a vibration model is proposed for the stator structure. This model is used to predict the acoustic noise pertaining to time harmonic currents with reasonable accuracy. Literature on motor acoustic noise mainly focuses on sinusoidal PWM (SPWM), conventional space vector PWM (CSVPWM) and random PWM (RPWM). In this thesis, acoustic noise pertaining to two bus-clamping PWM (BCPWM) schemes and an advanced bus-clamping PWM (ABCPWM) scheme is investigated. BCPWM schemes are mainly used to reduce the switching loss of the inverter by clamping any of the three phases to DC rail for 120◦ duration of the fundamental cycle. Experimental results show that these BCPWM schemes reduce the amplitude of the tonal component of noise at the carrier frequency, compared to CSVPWM. Experimental results with ABCPWM show that the overall acoustic noise produced by the motor drive is reduced at low and medium speeds if the switching frequency is above 3 kHz. Certain spread in the frequency spectrum of noise is also seen with both BCPWM and ABCPWM. To spread the acoustic noise spectrum further, many variable-frequency PWM schemes have been suggested by researchers. But these schemes, by and large, increase the current total harmonic distortion (THD) compared to CSVPWM. Thus, a novel variable-frequency PWM (VFPWM) method is proposed, which offers reduced current THD in addition to uniformly spread noise spectrum. Experimental results also show spread in the acoustic noise spectrum and reduction in the dominant noise components with the proposed VFPWM. Also, the current THD is reduced at high speeds of the motor drive with the proposed method.

Les travaux menés durant cette thèse s'intéressent principalement aux avantages que peut offrir la machine asynchrone à double alimentation (MADA) dans un système de propulsion navale. Ceci est obtenu à travers les degrés de libertés additionnels qu'elle apporte, d'une part, par l'exploitation de la redondance structurelle naturelle, et d'autre part , par les stratégies de contrôle qui lui sont appliquées. La première partie de ce mémoire, présente la modélisation du propulseur innovant. Ce dernier est conçu principalement autour de la MADA comme moteur de propulsion. Il est alimenté par deux onduleurs de tension à Modulation de Largeur d'Impulsion (MLI), et entrainant une hélice à trois pales fixes et symétriques. Plusieurs stratégies de commande ont été introduites pour piloter le système. En effet, des lois de contrôle de type linéaires et non linéaires, associées à des divers modulateurs MLI ont été validées et appliquées à cette structure de propulsion. L'innovation apportée dans le cadre de ces travaux consiste à associer à l'optimisation par conception (machine et convertisseurs d'alimentation), une optimisation par la commande et ce en évaluant l'influence de ces techniques pour deux critères de dimensionnement majeurs, à savoir, les pertes dans les convertisseurs de puissances, et les bruits acoustiques et vibratoires. La propulsion navale, comme tout système embarqué, possède des exigences en matière de qualité de service non seulement en termes de performances mais aussi de fiabilité et de disponibilité. En effet, les systèmes conçus pour ce type d'application doivent assurer et garantir une continuité de service en cas d'apparition de défauts au sein des constituants du système. L'utilisation de la MADA dans les systèmes de propulsion offre une redondance structurelle naturelle et analytique, introduite par la commande, qui permet d'assurer une continuité de service du système en présence d'une défaillance dans la structure. Deux défauts sont ainsi considérés dans cette étude, un défaut de semi-conducteur de puissance dans le convertisseur de puissance et un défaut de capteur vitesse/position. Les stratégies de contrôle proposées, les modèles de propulseur établis ainsi que les reconfigurations adoptées suite aux défauts ont été validées expérimentalement sur les bancs développés au LAPLACE dans le cadre de ces travaux. / This study focuses on the benefits that can be induced by the use of the Double Fed Induction Machine (DFIM) operating in motor mode for marine propulsion systems. It can be achieved by the additional degree of freedom it provides, firstly, by exploiting the natural structural redundancy, and secondly, by the alytical redundancy introduced by applied control strategies. The first part of this thesis presents the modeling of a propeller architected mainly around the DFIM and its load such as a propeller with three fixed and symmetrical blades. Several control strategies have been introduced to control the system, in fact, linear and nonlinear control laws type associated with various modulators have been validated and applied to the propulsion structure. The objective was to evaluate the influence of these techniques for two major design criteria, namely, losses in power converters, and noise and vibration noise. Naval propulsion as any embedded system has requirements for the quality of service not only in performance but also reliability and availability. Indeed, the systems designed for these types of applications must ensure and guarantee continuity of service in response to the failures in system components. The use of MADA in propulsion systems provides a natural structural and analytical redundancies which ensure system service continuity in the presence of a fault in this structure. Two faults are considered in this study, a power semiconductor fault in the power converter and a speed sensor / position failure. Control strategies proposed, the propeller modeling established and reconfigurations adopted following settings have been validated by simulation and experimentally on the real laboratory or industrial benches developed in the context of this study.

Thesis submitted in fulfillment of the requirements for the degree Master of Technology: Electrical Engineering in the Faculty of Engineering at the Cape Peninsula University of Technology 2013 / The development of power electronics did remove most of technical limitations that high voltage direct current (HVDC) used to have. HVDC, now, is mostly used for the transmission of bulk power over long distances and for the interconnection of asynchronous grid. Along with the development of the HVDC, the growth of power demand also increased beyond the utilities capacities. Besides the on-going increasing of power demand, the reforms in electricity market have led to the liberalization and the incorporation of Independent power providers in power system operation. Regulations and rules have been established by regulating authority for grid integration of Independent power providers. With the expected increase of penetration level of those new independent power providers, result of economic reason and actual green energy trend, best method of integration of those new power plants are required. In this research HVDC technology, namely VSC-HVDC is used as interface for connecting independent power providers units to the grid. VSC-HVDC has various advantages such as short-circuit contribution and independent control of active and reactive power. VSC-HVDC advantages are used for a safe integration of IPPs and make them participate to grid stabilization. MATLAB/Simulink simulations of different grid connected, through VSC-HVDC system, IPPs technologies models are performed. For each IPP technology model, system model performances are studied and dynamics responses during the disturbance are analyzed in MATLAB/ Simulink program. The simulation results show that the model satisfy the standard imposed by the regulating authority in terms of power quality and grid support. Also the results show the effect of the VSC-HVDC in preventing faults propagation from grid to integrated IPPs units.

Submitted by Renata Lopes (renatasil82@gmail.com) on 2017-04-26T12:14:24Z No. of bitstreams: 1 gabrielazevedofogli.pdf: 13619054 bytes, checksum: d260cb2571f242e43eab89132a03d62c (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2017-04-26T12:26:45Z (GMT) No. of bitstreams: 1 gabrielazevedofogli.pdf: 13619054 bytes, checksum: d260cb2571f242e43eab89132a03d62c (MD5) / Made available in DSpace on 2017-04-26T12:26:45Z (GMT). No. of bitstreams: 1 gabrielazevedofogli.pdf: 13619054 bytes, checksum: d260cb2571f242e43eab89132a03d62c (MD5) Previous issue date: 2014-03-19 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Esta dissertação apresenta um estudo de conexão de um grupo gerador-diesel (GMG) trifásico em uma rede secundária de distribuição de energia elétrica. A integração do GMG é feita por uma unidade de processamento de energia (PPU) composta por um retificador trifásico não controlado conectado em série com um conversor fonte de tensão (VSC) modulado com uma estratégia de modulação por largura de pulso. O GMG pode operar de duas maneiras distintas: (i) modo standby (interligado) ou (ii) modo isolado. O conversor de saída da PPU pode ser controlado para injetar potência ativa na rede CA, ou como um filtro ativo de potência (FAP) compensando potência reativa e correntes harmônicas nos terminais das cargas. O VSC de interface é controlado no modo de corrente (CMC), sendo seus controladores projetados a partir de funções de transferência obtidas com o modelo matemático do sistema elétrico nas coordenadas dq0. Esses controladores são projetados com múltiplos integradores para garantir a qualidade da forma de onda da corrente injetada na rede CA. Dependendo do modo de operação é utilizada uma malha adicional para regular a tensão do barramento CC do conversor de interface. Para validar o modelo matemático e o algoritmo de controle são realizadas simulações digitais no programa PSIM. Resultados experimentais, obtidos com um protótipo de laboratório, cujos controladores foram implementados em um processador digital de sinais TMS320F28335 da Texas Instruments, são usados para validar as estratégias de controle propostas. / This dissertation presents a study about the connection of a three-phase Diesel Genset (DG) to a secondary distribution network. The integration of DG is done by a Power Processing Unit (PPU) composed of a three-phase rectifier connected in series with a Pulse Width Modulated Voltage Source Converter (VSC). The DG can operate in two distinct modes: (i) standby (interconnected) or (ii) islanding. The PPU’s output converter can be controlled to inject active power into AC electric grid, or as an Active Power Filter (APF), compensating the reactive power and harmonics currents at the load terminals. The VSC is controlled employing the current mode control (CMC), and its compensators are designed based on the electrical system transfer function in dq0 coordinates. Multiple rotating synchronous reference frame integrators (PI-MRI) are used to ensure the quality of the generated power. Depending on the operating mode, an additional loop is used to regulate the DC bus voltage. In order to validate the mathematical model and the control algorithm, digital simulations using PSIM are performed. Experimental results obtained with the prototype, which controllers were implemented in a TMS320F28335 of Texas Instruments are used to validate the proposed control strategies.

Neutral-point-clamped (NPC) three-level inverter is capable of handling higher dc bus voltage and producing output waveform of better quality than a conventional two-level inverter. The main objective of the present work is to analyze the existing PWM schemes for two-level and three-level inverters in terms of line current ripple, and to design new PWM techniques for the NPC inverter to reduce line current distortion. Various discontinuous PWM or bus-clamping PWM (BCPWM) methods for a two-level voltage source inverter are analyzed in terms of rms line current ripple, which is evaluated by integrating the error voltage (i.e. error between the applied and reference voltages). The BCPWM schemes can be broadly classified into continual-clamp PWM (CCPWM) and split-clamp PWM (SCPWM). It is shown that split-clamp PWM scheme leads to lower harmonic distortion than CCPWM scheme. Further, advanced bus-clamping PWM (ABCPWM) methods for a two-level inverter are also studied. These methods clamp each phase to the positive and negative DC terminals over certain intervals as in BCPWM schemes, and also switch each phase at double the nominal frequency in certain other intervals unlike in BCPWM. Analytical closed-form expressions are derived for the total rms harmonic distortion due to SCPWM, CCPWM and ABCPWM schemes. Existing sinusoidal and bus-clamping PWM schemes for three-level NPC inverters are also analyzed in the space vector domain. These methods are compared in terms of line current ripple analytically as well as experimentally. As earlier, closed-form expressions are derived for the harmonic distortion factors corresponding to centered space vector PWM (CSVPWM) and the various BCPWM methods. A three-level inverter can be viewed as an equivalent two-level inverter in each sixth of the fundamental cycle or hextant. This is widely used to simplify the control of an NPC inverter. Further, this approach makes it simple to extend the BCPWM and ABCPWM methods for two-level inverters to three-level inverters. Furthermore, the method of analysis of line current ripple for the two-level inverter can also be easily extended to the three-level case. The pivot vector, which is half the length of the longest voltage vectors produced by the NPC inverter, acts as an equivalent null vector for the conceptual two-level inverter. Each pivot vector can be produced by two inverter states termed as “pivot states”. Typically, in continuous modulation methods for NPC inverter such as sinusoidal PWM and centered space vector PWM, the switching sequence (i.e. the sequence in which the voltage vectors are applied) begins and ends with the same pivot vector in each subcycle, which is equivalent to a half-carrier cycle. To be more precise, the switching sequence starts with one pivot state and ends with the other in each subcycle. However, in case of BCPWM schemes, only one pivot state is used in a subcycle. The choice of pivot state results in a variety of BCPWM schemes for an NPC inverter. Different BCPWM schemes are evaluated in terms of rms line current ripple. The optimal BCPWM, which minimizes the rms current ripple, is determined for an NPC inverter, controlled as an equivalent two-level inverter. Further, four new switching sequences are proposed here for a three-level inverter, controlled as a conceptual two-level inverter. These sequences apply the pivot vector only once, but employ one of the other two vectors twice within the subcycle. These four switching sequences are termed as “ABCPWM sequences” for three-level inverter. These sequences exploit the flexibility available in the space vector approach to PWM to switch a phase more than once in a subcycle, which results in the application of an active vector twice within the subcycle. Influence of the proposed ABCPWM sequences on the line current ripple over a subcycle is studied. The various sequences are compared in terms of rms line current ripple over a subcycle. An analytical closed-form expression for rms line current ripple over a subcycle is derived in terms of reference magnitude, angle of reference voltage vector, and subcycle duration for each of the sequences. Further, closed-form expressions are also derived for the rms current ripple over a line cycle in terms of modulation index and subcycle duration, corresponding to the various sequences. The four proposed ABCPWM sequences for the NPC inverter can be grouped into two pairs of sequences. Each pair of sequences is shown to perform better than the individual sequences, if the two sequences are employed in appropriate spatial regions. Hence, with these two pairs of sequences, two hybrid PWM schemes are proposed. Finally, a hybrid PWM technique is proposed which employs all five sequences (conventional and proposed four sequences) in spatial regions where each performs the best. This is termed as “five-zone hybrid PWM”. The total harmonic distortion (THD) in the motor current, pertaining to all the proposed schemes, is studied theoretically over the entire range of linear modulation. The theoretical investigations are validated experimentally on a 2.2 kW, 415V, 4.9A, 50 Hz induction motor drive. The no-load current THD is measured over a range of fundamental frequency from 10 Hz to 50 Hz in steps of 2 Hz for the various PWM methods. Theoretical and experimental results bring out the reduction in current THD due to the proposed BCPWM schemes at fundamental frequencies of 45 Hz and above, compared to CSVPWM. The ABCPWM methods improve the performance at higher as well as lower modulation indices. Further improvement is achieved with the proposed five-zone hybrid PWM. At the rated frequency (50 Hz) of the drive, the improvement in line current distortion is around 36% with this hybrid PWM scheme over CSVPWM. The reduction in THD is also experimentally verified at different loads on the motor. The difference between the top and bottom capacitor voltages is measured at various operating conditions, corresponding to CSVPWM and the proposed schemes. No significant difference is observed in the dc neutral voltage shifts with the different proposed schemes and CSVPWM method. Thus, the proposed methods improve the THD at low and high speed ranges without appreciable worsening of the dc voltage unbalance.

Modern interconnected power systems are becoming highly complex and sophisticated, while increasing energy penetrations through congested inter-tie lines causing the operating point approaching stability margins. This as a result, exposes the overall system to potential low frequency power oscillation phenomena following disturbances. This in turn can lead to cascading events and blackouts. Recent approaches to counteract this phenomenon are based on utilization of wide area monitoring systems (WAMS) and power electronics based devices, such as flexible AC transmission systems (FACTS) and HVDC links for advanced power oscillation damping provision. The rise of hybrid AC-DC power systems is therefore sought as a viable solution in overcoming this challenge and securing wide-area stability. If multiple FACTS devices and HVDC links are integrated in a scheme with no supervising control actions considered amongst them, the overall system response might not be optimal. Each device might attempt to individually damp power oscillations ignoring the control status of the rest. This introduces an increasing chance of destabilizing interactions taking place between them, leading to under-utilized performance, increased costs and system wide-area stability deterioration. This research investigates the development of a novel supervisory control scheme that optimally coordinates a parallel operation of multiple FACTS devices and an HVDC link distributed across a power system. The control system is based on Linear Quadratic Gaussian (LQG) modern optimal control theory. The proposed new control scheme provides coordinating control signals to WAMS based FACTS devices and HVDC link, to optimally and coherently counteract inter-area modes of low frequency power oscillations inherent in the system. The thesis makes a thorough review of the existing and well-established improved stability practises a power system benefits from through the implementation of a single FACTS device or HVDC link, and compares the case –and hence raises the issue–when all active components are integrated simultaneously and uncoordinatedly. System identification approaches are also in the core of this research, serving as means of reaching a linear state space model representative of the non-linear power system, which is a pre-requisite for LQG control design methodology.

The inverter dead-time is integral to the safety of a voltage source inverter (VSI). Dead-time is introduced between the complementary gating signals of the top and bottom switches in each VSI leg to prevent shoot-through fault. This thesis reports and investigates dead-time induced sub-harmonic oscillations in open-loop induction motor drives of different power levels, under light-load conditions. The thesis develops mathematical models that help understand and predict the oscillatory behaviour of such motor drives due to dead-time act. Models are also developed to study the impact of under-compensation and over-compensation of dead-time act on stability. The various models are validated through extensive simulations and experimental results. The thesis also proposes and validates active damping schemes for mitigation of such sub-harmonic oscillations. The thesis reports high-amplitude sub-harmonic oscillations in the stator current, torque and speed of a 100-kW open-loop induction motor drive in the laboratory, operating under no-load. Experimental studies, carried out on 22-kW, 11-kW, 7.5-kW and 3.7-kW open-loop induction motor drives, establish the prevalence of dead-time induced sub-harmonic oscillations in open-loop motor drives of different power levels. An experimental procedure is established for systematic study of this phenomenon in industrial drives. This procedure yields the operating region, if any, where the motor drive is oscillatory. As a first step towards understanding the oscillatory behaviour of the motor drive, a mathematical model of the VSI is derived in a synchronously revolving reference frame (SRF), incorporating the of dead-time on the inverter output voltage. This leads to a modified dynamic model of the inverter-fed induction motor in the SRF, inclusive of the dead-time act. While the rotor dynamic equations are already non-linear, dead-time is found to introduce nonlinearities in the stator dynamic equations as well. The nonlinearities in the modified dynamic model make even the steady solution non-trivial. Under steady conditions, the dead-time can be modelled as the drop across an equivalent resistance (Req0) in the stator circuit. A precise method to evaluate the equivalent resistance Req0 and a simple method to arrive at the steady solution are proposed and validated. For the purpose of stability analysis, a small-signal model of the drive is then derived by linearizing the non-linear dynamic equations of the motor drive, about a steady-state operating point. The proposed small-signal model shows that dead-time contributes to different values of equivalent resistances along the q-axis and d-axis and also to equivalent cross-coupling reactance’s that appear in series with the stator windings. Stability analysis performed using the proposed model brings out the region of oscillatory behaviour (or region of small-signal instability) of the 100-kW motor drive on the voltage versus frequency (V- f) plane, considering no-load. The oscillatory region predicted by the small-signal analysis is in good agreement with simulations and practical observations for the 100-kW motor drive. The small-signal analysis is also able to predict the region of oscillatory behaviour of an 11-kW motor drive, which is con consumed by simulations and experiments. The analysis also predicts the frequencies of sub-harmonic oscillations at different operating points quite well for both the drives. Having the validity of the small-signal analysis at different power levels, this analytical procedure is used to predict the regions of oscillatory behaviour of 2-pole, 4-pole, 6-pole and 8-pole induction motors rated 55 kW and 110 kW. The impact of dead-time on inverter output voltage has been studied widely in literature. This thesis studies the influence of dead-time on the inverter input current as well. Based on this study, the dynamic model of the inverter fed induction motor is extended to include the dc-link dynamics as well. Simulation results based on this extended model tally well with the experimentally measured dc-link voltage and stator current waveforms in the 100-kW drive. Dead-time compensation may be employed to mitigate the dead-time and oscillatory behaviour of the drive. However, accurate dead-time compensation is challenging to achieve due to various factors such as delays in gate drivers, device switching characteristics, etc. Effects of under-compensation and over-compensation of dead time are investigated in this thesis. Under-compensation is shown to result in the same kind of oscillatory behaviour as observed with dead-time, but the fundamental frequency range over which such oscillations occur is reduced. On the other hand, over-compensation of dead-time effect is shown to result in a different kind of oscillatory behaviour. These two types of oscillatory behaviour due to under- and over-compensation, respectively, are distinguished and demonstrated by analyses, simulations and experiments on the 100-kW drive. To mitigate the oscillatory behaviour of the drive, an active damping scheme is proposed. This scheme emulates the effect of an external inductor in series with the stator winding. A small-signal model is proposed for an induction motor drive with the proposed active damping scheme. Simulations and experiments on the 100-kW drive demonstrate effective mitigation of light-load instability with this active damping scheme. In the above inductance emulation scheme, the emulated inductance is seen by the sub-harmonic components, fundamental component as well as low-order harmonic components of the motor current. Since the emulated inductance is also seen by the fundamental component, there is a fundamental voltage drop across the emulated inductance, leading to reduced co-operation of the induction motor. Hence, an improved active damping scheme is proposed wherein the emulated inductance is seen only by the sub-harmonic and low-order harmonic components. This is achieved through appropriate altering in the synchronously revolving domain. The proposed improved active damping scheme is shown to mitigate the sub-harmonic oscillation effectively without any reduction in flux.

Multilevel inverters play a major role in the modern day medium and high power energy conversion processes. The classic two level voltage source inverter generates PWM pole voltage output having two levels with strong fundamental component and harmonics centered around the switching frequency and its multiples. With higher switching frequency, its components can be easily filtered and results in better Total harmonic distortion (THD) output voltage and current. But with higher switching frequency, switching loss of power devices increases and electromagnetic interferences also increases. Also in two level inverter, pole voltage switches between zero and DC bus volt-age Vdc. This switching results in high dv=dt and causes EMI and increased stress on the motor winding insulation. The attractive features of multilevel inverters compared to a two level inverter are reduced switching frequency, reduced switching loss, improved volt-age and current THD, reduced dv=dt, etc. Because of these reasons, multilevel invertersultilevelinvertersplayamajorroleinthemoderndaymediumandhighpower find application in electric motor drives, transmission and distribution of power, transportation, traction, distributed generation, renewable energy systems like photo voltaic, hydel power, energy management, power quality, electric vehicle applications, etc. AC motor driven applications are consuming the significant part of the generated electrical energy (more than 60%) around the world. The multilevel inverters are ideal for such applications, since the switching frequency of the devices can be kept low with lower out-put voltage dv=dt. Also by using multilevel inverters, the common mode voltage (CMV) switching can be made zero and associated motor bearing failure can be mitigated. For multilevel inverter topologies, as the number of level increases, the power circuit becomes more complex by the increase in the number of DC power supplies, capacitors, switching devices and associated control circuitry. The main focus of development in multilevel inverter for medium and high power applications is to obtain an optimized number of voltage levels with reduced number of switching devices, capacitors and DC power sources. In this thesis, a new hybrid seven level inverter topology with a single DC supply is proposed with reduced switch count. The inverter is realized by cascading two three level flying capacitor inverters with a half bridge module. Compared to the conventional seven level inverter topologies, the proposed inverter topology uses lesser number of semiconductor devices, capacitors and DC power supplies for its operation. For this topology, capacitor voltage balancing is possible for entire modulation range irrespective of the load power factor. Also capacitor voltage can be controlled over a switching cycle and this result in lowering the capacitor sizing for the proposed topology. A simple hysteresis band based capacitor voltage balancing scheme is implemented for the inverter topology. For a voltage source inverter fed induction motor drive system, the inverter pole voltage is the sum of motor phase voltage and common mode voltage. In induction motors, there exists a parasitic capacitance between stator winding and stator iron, and between stator winding and rotor iron. Common mode voltage with significant magnitude and high frequency switching causes leakage current through these parasitic capacitances and motor bearings. This leakage current can cause ash over of bearing lubricant and corrosion of ball bearings, resulting in an early mechanical failure of the drive system. In this thesis, analysis of extending the linear modulation range of a general n-level inverter by allowing reduced magnitude of common mode voltage (CMV) switching (only Vdc/18) is presented. A new hybrid seven level inverter topology, with a single DC supply and with reduced common mode voltage (CMV) switching is presented in this thesis for the first time. Inverter is operated with zero CMV for modulation index less than 86% and is operated with a CMV magnitude of Vdc/18 to extend the linear modulation range up to 96%. Experimental results are presented for zero CMV operation and for reduced common voltage operation to extend the linear modulation range. A capacitor voltage balancing algorithm is designed utilizing the pole voltage redundancies of the inverter, which works for every sampling instant to correct the capacitor voltage irrespective of load power factor and modulation index. The capacitor voltage balancing algorithm is tested for different modulation indices and for various transient conditions, to validate the proposed topology. In recent years, model predictive control (MPC) using the system model has proved to be a good choice for the control of power converter and motor drive applications. MPC predicts system behavior using a system model and current system state. For cascaded multilevel inverter topologies with a single DC supply, closed loop capacitor voltage control is necessary for proper operation. This thesis presents zero and reduced common mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state which minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96% the inverter can operate with reduced CMV magnitude ( Vdc/18) and reduced CMV switching frequency using the new space-vector PWM (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop V/f control scheme. The operation of a two level inverter in the over-modulation region (maximum peak phase fundamental output of inverter is greater than 0:577Vdc) results in lower order harmonics in the inverter output voltage. This lower order harmonics (mainly 5th, 7th, 11th, and 13th) causes electromagnetic torque ripple in motor drive applications. Also these harmonics causes extra losses and adversely affects the efficiency of the drive system. Also inverter control becomes non linear and special control algorithms are required for inverter operation in the over modulation region. In conventional schemes, maximum fundamental output voltage possible is 0:637Vdc. In that case inverter is operated in a square wave mode, also called six-step mode. This operation results in high dv=dt for the inverter output voltage. With multilevel inverters also, the inverter operation with peak phase fundamental output voltage above 0:577Vdc results in lower order harmonics in the inverter output voltage and results in electromagnetic torque pulsation. In this thesis, a new space vector PWM (SVPWM) method to extend the linear modulation range of a cascaded five level inverter topology with a single DC supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0:577Vdc to 0:637Vdc without increasing the DC bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0 Hz to 50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The ve level topology presented in this thesis is realized by cascading a two level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady state and dynamic operating conditions are presented. Zero common mode voltage (CMV) operation of multilevel inverters results in reduced DC bus utilization and reduced linear modulation range. In this thesis two reduced CMV SVPWM schemes are presented to extend the linear modulation range by allowing reduced CMV switching. But using these SVPWM schemes the peak phase fundamental output voltage possible is only 0:55Vdc in the linear region. In this thesis, a method to extend the linear modulation range of a CMV eliminated hybrid cascaded multilevel inverter with a single DC supply is presented. Using this method peak fundamental voltage can be increased from 0 to 0:637Vdc with zero CMV switching inside the linear modulation range. Also inverter can be controlled linearly for the entire modulation range. Also, various PWM switching sequences are analyzed in this thesis and the PWM sequence which gives minimum current ripple is used for the zero CMV operation of the inverter. The inverter topology with single DC supply is realized by cascading a two level inverter with two floating capacitor fed full bridge modules. Simulation and experimental results for steady state and dynamic operating conditions are presented to validate the proposed method. A three phase, 400 V, 3.7 kW, 50 Hz, two-pole induction motor drive with the open-loop V/f control scheme is implemented in the hardware for testing proposed inverter topology and proposed SVPWM algorithms experimentally. The semiconductor switches that were used to realize the power circuit for the experiment were 75 A, 1200 V IGBT half-bridge modules (SKM-75GB-12T4). Optoisolated gate drivers with de-saturation protection (M57962L) were used to drive the IGBTs. For the speed control and PWM timing computation, TMS320F28335 DSP is used as the main controller and Xilinx SPARTAN-3 XC3S200 FPGA as the PWM signal generator with dead time of 2.5 s. Level shifted carrier-based PWM algorithm is implemented for the normal inverter operation and zero CMV operation. From the PWM algorithm, information about the pole voltage levels to be switched can be obtained for each phase. In the sampling period, for capacitor voltage balancing of each phase, the DSP selects a switching state using the capacitor voltage information, current direction and pole voltage data for each phase. This switching state information along with the PWM timing data is sent to an FPGA module. The FPGA module generates the gating signals with a dead time of 2.5 s for the gate driver module for all the three phases by processing the switching state information and PWM signals for the given sampling period. For fundamental frequencies above 10Hz, synchronous PWM technique was used for testing the inverter topology. For modulation frequencies 10Hz and below, a constant switching frequency of 900 Hz was used. Various steady state and transient operation results are provided to validate the proposed inverter topology and the zero and reduced CMV operation schemes and extending the linear modulation scheme presented in this thesis. With the advantages like reduced switch count, single DC supply requirement, zero and reduced CMV operation, extension of linear modulation range, linear control of induction motor over the entire modulation range with zero CMV, lesser dv=dt stresses on devices and motor phase windings, lower switching frequency, inherent capacitor balancing, the proposed inverter power circuit topologies, and the SVPWM methods can be considered as good choice for medium voltage, high power motor drive applications.

This thesis proposes control schemes and converter configurations for high power wound field synchronous motor (WFSM) drives. The model for a salient pole WFSM in any general rotating reference frame is developed which can be used to derive models along known rotor (dq) and stator flux (MT) reference frames. Based on these models, the principle of sensor-less stator flux oriented field-oriented control (FOC) for salient pole WFSM is developed. So far in the literature, control of cylindrical rotor machine only has been addressed and the effects of saliency have generally been neglected. The performance of the proposed sensor-less FOC has been demonstrated by experimentally operating a 15.8 HP salient pole WFSM using a three-level IGBT based voltage source inverter (VSI). The principle of FOC has been later extended to the control of current source load commutated inverter (LCI) fed salient pole WFSM drives, where the drawbacks present in conventional self-control method such as rigorous off-line calculation for generation of look up tables, coupling between flux and torque control etc. are eliminated. This thesis also proposes the combination of a VSI with the LCI power circuit to overcome the different disadvantages that are present in the existing LCI topology. Firstly, a novel starting scheme is proposed, where the LCI fed WFSM is started with the aid of a low power auxiliary VSI converter in a smooth manner with sinusoidal motor currents and voltages. This overcomes the difficulties of the present complex dc link current pulsing technique that has drawbacks such as pulsating torque, long starting time etc. In a second mode of operation, it is shown that the VSI can be connected to the existing LCI fed WFSM drive as a harmonic compensator in On-The-Fly mode; this will make the terminal stator current and voltage sinusoidal apart from cancellation of torque pulsations thus improving the drive performance. The above two schemes have potential as retrofit for existing drives. It is possible to combine both the advantages, mentioned above, by permanently connecting the VSI with the LCI power circuit to feed the WFSM. This proposed hybrid LCI/VSI drive can be regarded as a universal solution for high power synchronous motor drives at all power and speed ranges.