No description available.

Thesis submitted in fulfilment of the requirements for the degree Doctor of Technology: Electrical Engineering in the Faculty of Engineering at the Cape Peninsula University of Technology / This research focuses on the predictive current control of multilevel converters with the aim of providing an optimized system for three-phase, multilevel inverters (MLIs) so that the load current and the voltage of the capacitors can be controlled. A model predictive current control algorithm is proposed, specifically directed at the utilisation of power obtained from renewable energy systems (RESs). The model was developed for three-phase, multilevel voltage source inverters (MLVSIs), three-phase, three-level diode-clamped converters (DCCs) and flying capacitor converters (FCCs). In this study the renewable energy systems model is used to investigate system performance when power is supplied to a resistiveinductive load (RL-load). The proposed control method was split into two different control algorithms. Firstly, a finite set-model predictive current control (FS-MPCC) method was developed to control the output current of three-phase, MLIs. This control method was selected to reduce the calculation effort for model predictive control (MPC) and to increase the possible prediction horizon. Secondly, to solve the flying capacitor voltage balance problem in an FCC, as well as to solve the DC-link capacitor voltage balance problem in a DCC, a hysteresis-voltage alancing algorithm based on predictive control, was designed—this algorithm was used to keep the flying capacitor voltages and DC-link capacitor voltages within their hysteresis bands. Finally, for some classes of power converters, a performance evaluation of the FS-MPCC method for three-phase, three-level MLIs was investigated in terms of power quality and dynamic response. The improvement was assessed in terms of total harmonic distortion (THD) of the output voltage for the RL-load. The modelling and co-simulation were carried out using MATLAB/Simulink with PSIM software. The co-simulation results indicated that the proposed control algorithms achieved both high performance and a high degree of robustness in RESs applications.

Nowadays, the need for more contributions from renewable energy sources is rapidly growing. This is forced by many factors including the requirements to meet the targeted reductions of greenhouse gas emissions as well as improving the security of energy supply. According to the International Renewable Energy Agency (IRENA) report 2016, the total installed capacity of solar energy was at least 227 GWs worldwide by the end of 2015 with an annual addition of about 50 GWs in 2015, making solar power the world’s fastest growing energy source. The majority of these are grid-connected photo voltaic (PV) solar power plants, which are required be integrated efficiently into the power grids to meet the requirements of power quality standards at the minimum total investment cost. For this, multilevel voltage source inverters (VSI) have been applied extensively in recent years. In practice, there is a trade-off between the inverter’s number of levels and the required size of output filter, which is a key optimisation area. The aim of this research is to propose a generic model to optimise the design number of levels for the Cascaded H-Bridge Multilevel Inverter (CHB-MLI) and the size of output filter for medium voltage – high power applications. The model is based on key measures, including inverter power loss minimisation, efficient control for minimum total harmonic distortion (THD), minimisation of total system cost and proposing the optimum size of output filter. This research has made a contribution to knowledge in the optimisation of CHB-MLI for medium-voltage high-power applications, in particular, the trade-off optimisation of the inverter’s number of levels and the size of the output filter. The main contribution is the establishment and demonstration of a sound methodology and model based on multi-objective optimisation for the considered key measures of the trade-off model. Furthermore, this study has developed a generic precise model for conduction and switching loss calculation in multilevel inverters. Moreover, it applied Genetic Algorithm (GA) optimisation to provide a complete optimum solution for the problem of selective harmonic elimination (SHE) and suggests the optimum size of output passive power filter (PPF) for different levels CHB-MLIs. The proposed trade-off optimisation model presents an efficient tool for finding the optimum number of the inverter’s levels and the size of output filter, in which the integration system is at its lowest cost, based on optimisation dimensions and applied system constraints. The trade-off optimisation model is generic and can be applied to any multilevel inverter topologies and different power applications.

No description available.

Multilevel inverters are very popular for medium and high-voltage induction motor (IM) drive applications. They have superior performance compared to 2-level inverters such as reduced harmonic content in output voltage and current, lower common mode voltage and dv/dt, and lesser voltage stress on power switches. To get nearly sinusoidal current waveforms, the switching frequency of the conventional inverters have to be in¬creased. This will lead to higher switching losses and electromagnetic interference. The problem in using lower switching frequency is the introduction of low order harmonics in phase currents and undesirable torque ripple in the motor. The 5th and 7th harmonics are dominant for hexagonal voltage space-vector based low frequency switching. Dodecagonal voltage space-vector based multilevel inverters have been proposed as an improvement over the conventional hexagonal space vector based inverters. They achieve complete elimination of 5th and 7th order harmonics throughout the modulation range. The linear modulation range is also extended by about 6.6%, since the dodecagon is closer to circle than a hexagon. The previous works on dodecagonal voltage space vector based VSI fed drives used voltage controlled PWM (VC-PWM). Although these controllers are more popular, they have inferior dynamic performance when compared to current controlled PWM (CC¬PWM). VSIs using current controlled PWM have excellent dynamic response, inherent short-circuit protection and are simple to implement. The conventional CC-PWM tech¬niques have large switching frequency variation and large current ripple in steady-state. xix As a result, there has been significant research interest to achieve current controlled VSI fed IM drives with constant switching frequency. Two current error space vector (CESV) based hysteresis controllers for dodecagonal voltage space-vector based VSI fed induction motor drives are proposed in this work. The proposed controllers achieve nearly constant switching frequency at steady state operation, similar to VC-SVPWM based VSI fed IM drives. They also have fast dynamic response while at the same time achieving complete elimination of fifth and seventh order harmonics for the entire modulation range, due to dodecagonal voltage vector switching. The first work proposes a nearly constant switching frequency current error space vector (CESV) based hysteresis controller for an IM drive with single dodecagonal voltage space vectors. Parabolic boundaries computed offline are used in the proposed controller. An open-end winding induction motor is fed from two inverters with asymmetrical DC link voltages, to generate the dodecagonal voltage space vectors. The drive scheme is first studied at different frequencies with a space vector based PWM (SVPWM) control, to obtain the current error space vector boundaries. The CESV boundary at each frequency can be approximated with four parabolas. These parabolic boundaries are used in the proposed controller to limit the CESV trajectory. Due to symmetries in the parabolas only two set of parabola parameters, at different frequencies, need to be stored. A generalized next vector selection logic, valid for all sectors and rotation direction, is used in the proposed controller. For this an axis transformation is done in all sectors, to bring the CESV trajectory to the first sector. The sector information is obtained from the estimated fundamental stator phase voltage. The proposed controller is extensively studied using vector control at different frequencies and transient conditions. This controller maintains nearly constant switching frequency at steady state operation, similar to VC-SVPWM inverters, while at the same time achieving better dynamic performance and complete elimination of 5th and 7th order harmonics throughout the modulation range. In the second work the nearly constant switching frequency current hysteresis con¬troller is extended to multilevel dodecagonal voltage space-vector based IM drives, with online computation of CESV boundaries. The multilevel dodecagonal space-vector dia¬gram has different types of triangles, and the previously proposed methods for multilevel hexagonal VSI based current hysteresis controllers cannot be used directly. The CESV trajectory of the VC-SVPWM, obtained for present triangular region, is used as the reference trajectory of the proposed controller. The CESV reference boundaries are com¬puted online, using switching dwell time and voltage error vector of each applied vector. These quantities are calculated from estimated sampled reference phase voltages, which are found out from the stator current error ripple and the parameters of the induction motor. Whenever the actual current error space vector crosses the reference CESV tra¬jectory, an appropriate vector that will force it along the reference trajectory is switched. Extensive study of the proposed controller using vector control is done at different fre¬quencies and transient conditions. This controller has all the advantages of multilevel switching like low dv/dt, lesser electromagnetic interference, lower switch voltage stress and lesser harmonic distortion, in addition to all the dynamic performance advantages of the previous controller. The third work proposes an elegant 5th and 7th order harmonic suppression tech¬nique for open end winding split-phase induction motors, using capacitor fed inverters. Split-phase induction motors have been proposed to reduce the torque and flux ripples of conventional three-phase IM. But these motors have high 5th and 7th order harmonics in the stator windings due to lack of back-emf for these frequencies. A space-vector harmonic analysis of the split-phase IM is conducted and possible 5th and 7th order harmonic sup¬pression techniques studied. A simple harmonic suppression scheme is proposed, which requires the use of only capacitor fed inverters. A PWM scheme that can maintain the capacitor voltage as well as suppress the 5th and 7th order harmonics is also proposed. To test the performance of the proposed scheme, an open-loop v/f control is used on an open-end winding split-phase induction motor under no-load condition. Synchronized PWM with two samples per sector was used, for frequencies above 10 Hz. The har¬monic spectra of the phase voltages and currents were computed and compared with the traditional SVPWM scheme, to highlight the harmonic suppression. The concepts were initially simulated in Matlab/Simulink. Experimental verifica¬tion was done using laboratory prototypes at low power. While these concepts maybe easily extended to higher power levels by using suitably rated devices, the control tech¬niques presented shall still remain applicable. TMS320F2812 DSP platform was used to execute the control code for the proposed drive schemes. For the first work the output pins of the DSP was directly used to drive the inverter switches through a dead-band circuit. For the other two works, DSP outputs the sector information and the PWM signals. The PWM terminals and I/O lines of the DSP is used to output the timings and the triangle number respectively. An FPGA (XC3S200) was used to translate the sector information and the PWM signals to IGBT gate signal logic. A constant dead-time of 1.5 µs was also implemented inside the FPGA. Opto-isolated gate drivers with desaturation protection (M57962L) were used to drive the IGBTs. The phase currents and DC bus voltages were measured using hall-effect sensors. An incremental shaft position encoder was also connected to the motor to measure the angular velocity. The switches were realized using 1200 V, 75 A IGBT half bridge modules.

Significant advances in modern ac/ac power converter technologies and demands of industries have reached beyond standard ac/ac power converters with voltage-source inverters fed from diode rectifiers. Power electronics converters have been matured to stages toward compact realization, increased high-power handling capability, and improving utility interface. Modern ac/ac power converter topologies with various control strategies have been introduced for the further improvements, such as matrix converters, current-fed converters, PWM rectifiers, and active power filters. In this dissertation, several new converter topologies are proposed in conjunction with developed control schemes based on the modern ac/ac converters which enhance performance and solve the drawbacks of conventional converters. In this study, a new fault-tolerant PWM strategy is first proposed for matrix converters. The added fault-tolerant scheme would strengthen the matrix converter technology for aerospace and military applications. A modulation strategy is developed to reshape output currents for continuous operation, against fault occurrence in matrix converter drives. This study designs a hybrid, high-performance ac/ac power converter for high power applications, based on a high-power load commutated inverter and a mediumpower voltage source inverter. Natural commutation of the load commutated inverter is actively controlled by the voltage source inverter. In addition, the developed hybrid system ensures sinusoidal output current/voltage waveforms and fast dynamic response in high power areas. A new topology and control scheme for a six-step current source inverter is proposed. The proposed topology utilizes a small voltage source inverter, to turn off main thyristor switches, transfer reactive load energy, and limit peak voltages across loads. The proposed topology maximizes benefits of the constituent converters: highpower handling capability of large thyristor-based current source inverters as well as fast and easy control of small voltage source inverters. This study analyzes, compares, and evaluates two topologies for unity power factor and multiple ac/ac power conversions. Theoretical analyses and comparisons of the two topologies, grounded on mathematical approaches, are presented from the standpoint of converter kVA ratings, dc-link voltage requirements, switch ratings, semiconductor losses, and reactive component sizes. Analysis, simulation, and experimental results are detailed for each proposed topology.

Current control is an important topic in modern power electronics system. For voltage source inverters, current control loop ensures the waveform quality at steady state and the fast response at transient state. To improve the current control performance, quite a few nonlinear control strategies have been presented and one well-known strategy is the hysteresis current control. It achieves fast response without stability issue and it has high control precision. However, for voltage source inverter applications, hysteresis current control has a wide switching frequency range, which introduces additional switching loss and impacts the design of harmonic filter. Other nonlinear current control strategies include one-cycle control, non-linear carrier control, peak current control, charge control, and so on. However, these control strategies are just suitable for specific topologies and it cannot be directly used by voltage source inverters. The recently proposed parabolic current control solves the frequency variation problem of hysteresis current control by employing a pair of parabolic carriers as the control band. By the use of parabolic current control, approximate-constant switching frequency can be achieved. Due to the cycle-by-cycle control structure, it inherently has fast response speed and high precision. These advantages make it suitable for voltage source inverters, including stand-alone inverters, grid connected inverters, active power filters, and power factor correction applications. However, parabolic current control has some limitations, such as dead-time effects, only working as bipolar PWM, complex hardware implementation, non-ideal converging speed. These problems are respectively solved in this dissertation and solutions include dead-time compensation, the implementation on dual-carrier unipolar PWM, sensorless parabolic current control, single-step current control. With the proposed dead-time compensation strategy, current control precision is improved and stable duty-cycle range are extended. Dual-carrier PWM implementation of parabolic current control has smaller harmonic filter size and lower power loss. Sensorless parabolic current control decreases the cost of system and enhances the noise immunity capability. Single-step current control pushes the convergence speed to one switching operation with simple implementation. High switching frequency is allowed and power density can be improved. Detailed analysis, motivation and experimental verification of all these innovations are covered in this dissertation. In addition, the duality phenomenon exists in electrical circuits, such as Thevenin's theorem and Norton's theorem, capacitance and inductance. These associated pairs are called duals. The dual of parabolic current control is derived and named parabolic voltage control. Parabolic voltage control solves the audible noise problem of burst mode power converters and maintains high efficiency in the designed boost converter. / Ph. D.

Η παρούσα διπλωματική εργασία πραγματεύεται την μελέτη και κατασκευή ενός συστήματος ελέγχου για έναν κινητήρα μαγνητικής αντίδρασης (Reluctance). Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του Τμήματος Ηλεκτρολόγων Μηχανικών της πολυτεχνικής σχολής του Πανεπιστημίου Πατρών. Σκοπός της εργασίας αυτής, είναι η μελέτη και η κατασκευή ενός τριφασικού αντιστροφέα πηγής τάσης, ο οποίος θα επιτρέπει την υλοποίηση βαθμωτού και διανυσματικού ελέγχου για έναν σύγχρονο κινητήρα μαγνητικής αντίδρασης χωρίς έκτυπους πόλους στο στάτη. Ο σύγχρονος κινητήρας μαγνητικής αντίδρασης χωρίς έκτυπους πόλους στο στάτη, όπως και οποιοσδήποτε άλλος κινητήρας μαγνητικής αντίδρασης, βασίζει τη λειτουργία του στη ροπή αντίδρασης, γεγονός από το οποίο προέρχεται και η ονομασία των κινητήρων αυτού του είδους (ReluctanceMotors). Το κύριο χαρακτηριστικό των κινητήρων μαγνητικής αντίδρασης είναι η έλλειψη οποιασδήποτε πηγής διέγερσης στο δρομέα. Τα τελευταία χρόνια έχει αναπτυχθεί έντονο επιστημονικό ενδιαφέρον σχετικά με τη βελτιστοποίηση της κατασκευής των σύγχρονων κινητήρων μαγνητικής αντίδρασης χωρίς έκτυπους πόλους στο στάτη, καθώς και των μεθόδων ελέγχου, που μπορούν να εφαρμοστούν για βελτιστοποίηση της λειτουργίας τους. Αρχικά μελετήθηκαν οι βασικές αρχές λειτουργίας των μηχανών εναλλασσόμενου ρεύματος και η ανάλυση επικεντρώθηκε στο σύγχρονο κινητήρα μαγνητικής αντίδρασης. Μελετήθηκαν τα κατασκευαστικά χαρακτηριστικά του σύγχρονου κινητήρα μαγνητικής αντίδρασης χωρίς έκτυπους πόλους στο στάτη, το μαθηματικό μοντέλο που περιγράφει τη λειτουργία του, συγκρίθηκε με άλλους τύπους κινητήρων εναλλασσόμενου ρεύματος και παρουσιάστηκαν οι μέθοδοι ελέγχου που μπορούν να εφαρμοστούν σε έναν σύγχρονο κινητήρα μαγνητικής αντίδρασης χωρίς έκτυπους πόλους στο στάτη. Επιπλέον μελετήθηκε ο τριφασικός αντιστροφέας πηγής τάσης, ο οποίος είναι απαραίτητος για την οδήγηση ενός σύγχρονου κινητήρα μαγνητικής αντίδρασης, καθώς και διάφορες τεχνικές για την παλμοδότησή του. Τέλος προσομοιώθηκε ο σύγχρονος κινητήρας μαγνητικής αντίδρασης με το πρόγραμμα προσομοίωσης Matlab/Simulink για διάφορες καταστάσεις λειτουργίας του, και ακολούθησε η κατασκευή του τριφασικού αντιστροφέα για την πειραματική διερεύνηση και επιβεβαίωση των αποτελεσμάτων της προσομοίωσης. / The present diploma thesis deals with the design and manufacture of a control system for a Reluctance Motor. This work was developed in the Laboratory of Electromechanical Energy Conversion at the Department of Electrical Engineering and Computer Technology of the School of Engineering in the University of Patras, Greece. The purpose of this thesis is the design and manufacture of a three-phase voltage source inverter for the control of the performance of a Synchronous Reluctance Motor by the implementation of Scalar and Vector control. The operation of Synchronous Reluctance Motor, like any other type of Reluctance Motors, is based on reluctance torque. The main characteristic of Reluctance Motors is that the rotor does not have any field winding. During the last years, a great interest has emerged around the Synchronous Reluctance Motor, which mainly focuses on the optimization of its construction and control. At first, an introduction to the operation principles of the AC motor is done, while the main interest is focused on Synchronous Reluctance Motor. The analysis of Synchronous Reluctance Motor covers many aspects, such as its construction characteristics, its dynamic model, its control strategies, as well as a comparison with other AC motors. Furthermore the three phase inverter is studied and its modulation techniques, since it is used for the driving of the motor. Finally the Synchronous Reluctance Motor is simulated in Matlab/Simulink for some operating conditions, and a three phase voltage source inverter is constructed for the experimental investigation and to see the relationship between the results of the simulation and the experiment.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This work presents a contribution to the study of AC Power Sources, where a prototype s development is presented. The stages that compose the system, including converter topology, filter, instrumentation and controller, are presented. The developed prototype is a three-phase four-wire source, which uses a four-leg voltage source inverter. This topology increases the flexibility for unbalanced waveforms generation or unbalanced load conditions, also simplifying the control problem of the process. This work first looks for justifying the use and the study of AC Power Sources, in this sense, some examples of tests and norms, whose tests demand its use, are given. The applications are in general related to electrical and electronic equipments and for driving electromechanical plants such as shakers. In this sense, AC Power Sources are equipment that can be used both in industry applications and didactic or research laboratories. In practically all applications, it is shown that good performance in waveforms generation is necessary. This performance is related to the ability for waveforms generation with low harmonic distortion even in conditions of variable frequency or amplitude and with nonlinear loads behavior. In this way, the use of an adequate converter topology is not enough, are too necessary controllers to guarantee performance for the system, even in adverse load conditions or in presence of unmodeled dynamics. The unmodeled dynamics are derived from some stages that compose the system, but they are generally related to the uncertainties on the model of the plant and load. Then, this work not only describes the implemented prototype and topological relative questions but also applies a Robust Model Reference Adaptive Control (RMRAC) for the plant control. This technique improves the robustness in the closed loop system even under presence of unmodeled dynamics and disturbances. The controller makes use of a Gradient type algorithm for parametric adaptation with four adapted parameters, which leads to a new error equation that is used for the controller s implementation / Este trabalho apresenta uma contribuição ao estudo de Fontes de Potência CA onde é apresentado o desenvolvimento de um protótipo. Os diversos estágios que compõem o sistema, desde a topologia do conversor, do filtro, da instrumentação e do controlador são apresentados e analisados. O protótipo desenvolvido é uma fonte trifásica a quatro fios, que utiliza um inversor de tensão de quatro braços. Esta topologia permite uma maior flexibilidade na geração de formas de onda desbalanceadas ou em condições de cargas desequilibradas, simplificando também o problema de controle do sistema. Este trabalho procura primeiramente justificar a utilização e o estudo de Fontes de Potência CA, neste sentido são dados alguns exemplos de ensaios e normas, cujos testes demandam a sua utilização. As aplicações são em geral relacionadas a equipamentos eletroeletrônicos e acionamento de outras plantas como vibradores eletromecânicos. Deste modo, as Fontes de Potência CA são equipamentos que podem ser utilizados tanto na indústria quanto em laboratórios didáticos e de pesquisa. Em praticamente todas as aplicações, é mostrado que um bom desempenho na geração de formas de onda é necessário. Este desempenho está relacionado à capacidade de geração de formas de onda com baixa distorção harmônica, não raro, em condições de freqüência e amplitude variáveis e com cargas de comportamento não-linear. Deste modo, a seleção de uma topologia de conversor adequado não basta, são também necessários controladores que garantam um bom desempenho do sistema, mesmo em condições adversas de carga e em presença de dinâmicas não-modeladas. As dinâmicas não-modeladas são oriundas das várias etapas que compõem o sistema, mas geralmente são relacionadas às incertezas sobre o modelo da planta e da carga. Neste sentido, este trabalho descreve não apenas o protótipo implementado e questões topológicas relativas a ele, mas também aplica um Controle Robusto por Modelo de Referência ou RMRAC (Robust Model Reference Adaptive Control) para o controle da planta. Esta técnica garante robustez do sistema em malha fechada mesmo na presença de dinâmicas não modeladas e distúrbios. O controlador utilizado faz uso de um algoritmo de adaptação paramétrica do tipo Gradiente, no qual quatro parâmetros são adaptados. Este fato leva a uma nova equação do erro, que é utilizada para a implementação do controlador.

Multilevel voltage source inverters have been receiving more and more attention from the industry and academia as a choice for high voltage and high power applications. The high voltage multilevel inverters can be constructed with existing low voltage semiconductor switches, which already have a mature technology for handling low voltages, thus improving the reliability of the overall inverter system. These multilevel inverters generate the output voltage in the form of multi-stepped waveform with smaller amplitude. This will result in less dv/dt at the motor inputs and electromagnetic interference (EMI) caused by switching is considerably less. Because of the multi-stepped waveform, the instantaneous error in the output voltage will be always less compared to the conventional two-level inverter output voltage. It will reduce the unwanted harmonic content in the output voltage, which will enable to switch the inverter at lower frequencies. Many interesting multi level inverter topologies are proposed by various research groups across the world from industry and academic institutions. But apart from the conventional 3-level NPC and H-bridge topology, others are not yet highly preferred for general high power drives applications. In this respect, two different five-level inverter topologies and one three-level inverter topology for high power induction motor drive applications are proposed in this work. Existing knowledge from published literature shows that, the three-level voltage space vector diagram can be generated for an open-end winding induction motor by feeding the motor phase windings with two two-level inverters from both sides. In such a configuration, each inverter is capable of assuming 8 switching states independent of the other. Therefore a total of 64 switching combinations are possible, whereas the conventional NPC inverter have 27 possible switching combinations. The main drawback for this configuration is that, it requires a harmonic filter or isolated voltage source to suppress the common mode currents through the motor phase winding. In general, the harmonic filters are not desirable because, it is expensive and bulky in nature. Some topologies have been presented, in the past, to suppress the common mode voltage on the motor phase windings when the both inverters are fed with a single voltage source. But these schemes under utilize the dc-link voltage or use the extra power circuit. The scheme presented in chapter-3 eliminates the requirement of harmonic filter or isolated voltage source to block the common mode current in the motor phase windings. Both the two-level inverters, in this scheme, are fed with the same voltage source with a magnitude of Vdc/2 where Vdc is the voltage magnitude requires for the NPC three-level inverter. In this scheme, the identical voltage profile winding coils (pole pair winding coils), in the four pole induction motor, are disconnected electrically and reconnected in two star groups. The isolated neutrals, provided by the two star groups, will not allow the triplen currents to flow in the motor phase windings. To apply identical fundamental voltage on disconnected pole pair winding, decoupled space vector PWM is used. This PWM technique eliminates the first center band harmonics thereby it will allow the inverters to operate at lower switching frequency. This scheme doesn’t require any additional power circuit to block the triplen currents and also it will not underutilize the dc-bus voltage. A five-level inverter topology for four pole induction motor is presented in chapter-3. In this topology, the disconnected pole pair winding coils are effectively utilized to generate a five-level voltage space vector diagram for a four pole induction motor. The disconnected pole pair winding coils are fed from both sides with conventional two-level inverters. Thereby the problems like capacitor voltage balancing issues are completely eliminated. Three isolated voltage sources, with a voltage magnitude of Vdc/4, are used to block the triplen current in the motor phase windings. This scheme is also capable of generating 61 space vector locations similar to conventional NPC five-level inverter. However, this scheme has 1000 switching combinations to realize 61 space vector locations whereas the NPC five-level inverter has 125 switching combinations. In case of any switch failure, using the switching state redundancy, the proposed topology can be operated as a three-level inverter in lower modulation index. But this topology requires six additional bi-directional switches with a maximum voltage blocking capacity of Vdc/8. However, it doesn’t require any complicated control algorithm to generate the gating pulses for bidirectional switches. The above presented two schemes don’t require any special design modification for the induction machine. Although the schemes are presented for four pole induction motor, this technique can be easily extend to the induction motor with more than four poles and thereby the number of voltage levels on the phase winding can be further increased. An alternate five-level inverter topology for an open-end winding induction motor is presented in chapter-4. This topology doesn’t require to disconnect the pole pair winding coils like in the previous propositions. The open-end winding induction motor is fed from one end with a two-level inverter in series with a capacitor fed H-bridge cell, while the other end is connected to a conventional two-level inverter to get a five voltage levels on the motor phase windings. This scheme is also capable of generating a voltage space vector diagram identical to that of a conventional five-level inverter. A total of 2744 switching combinations are possible to generate the 61 space vector locations. With such huge number switching state redundancies, it is possible to balance the H-bridge capacitor voltage for full modulation range. In addition to that, the proposed topology eliminates eighteen clamping diode having different voltage ratings compared to the NPC inverter. The proposed topology can be operated as a three-level inverter for full modulation range, in case of any switch failure in the capacitor fed H-bridge cell. All the proposed topologies are experimentally verified on a 5 h.p. four pole induction motor using V/f control. The PWM signals for the inverters are generated using the TMS320F2812 and GAL22V10B/SPARTAN XC3S200 FPGA platforms. Though the proposed inverter topologies are suggested for high-voltage and high-power industrial IM drive applications, due to laboratory constraints the experimental results are taken on the 5h.p prototypes. But all the proposed schemes are general in nature and can be easily implemented for high-voltage high-power drive applications with appropriate device ratings.