Thesis (Ph. D.)--University of Wisconsin--Madison, 1958. / Abstracted in dissertation abstracts, v. 18 (1958) no. 6, p. 2092. Vita. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 132-136).

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abstract: In this work, a high resolution analog-to-digital converter (ADC) for use in harsh environments is presented. The ADC is implemented in bulk CMOS technology and is intended for space exploration, mining and automotive applications with a range of temperature variation in excess of 250°C. A continuous time (CT) sigma delta modulator employing a cascade of integrators with feed forward (CIFF) architecture in a single feedback loop topology is used for implementing the ADC. In order to enable operation in the intended application environments, an RC time constant tuning engine is proposed. The tuning engine is used to maintain linearity of a 10 ksps 20 bit continuous time sigma delta ADC designed for spectroscopy applications in space. The proposed circuit which is based on master slave architecture automatically selects on chip resistors to control RC time constants to an accuracy range of ±5% to ±1%. The tuning range, tuning accuracy and circuit non-idealities are analyzed theoretically. To verify the concept, an experimental chip was fabricated in JAZZ .18µm 1.8V CMOS technology. The tuning engine which occupies an area of .065mm2; consists of only an integrator, a comparator and a shift register. It can achieve a signal to noise and distortion ratio (SNDR) greater than 120dB over a ±40% tuning range. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011

The ultimate measure of performance of any communication system is the subjective quality of the received message. In this thesis, the subjective quality of the output of a differential pulse code modulation (DPCM) system was measured as a function of the number of bits of quantization L, the speech bandwidth W, the ratio r of the sampling frequency fs to the Nyquist frequency 2W, and the number of feedback samples N. For previous-sample feedback (N = 1) the maximum subjective quality was obtained as a function of the bit rate R = 2rWL. The optimum sampling rate .was found to be the Nyquist rate; the improvement afforded by increasing fs over 2W was more than offset by the required increase in bit rate. Noise in the feedback loop caused by dc offset errors and noise present in the output of the feedback coefficient amplifiers prevented a thorough investigation of two- and three- sample feedback, although some results were obtained. The subjective quality of delta modulated (ΔM) speech was obtained vs r and W, and the quality of amplitude modulated (ΔM) speech was measured as a function of W and channel signal-to-noise ratio. A technique was then devised to use the AM results to estimate the subjective quality of phase modulated (PM) speech. A comparison was then made of the capabilities of PCM, DPCM, AM, single sideband-AM (SSB-AM), double sideband-AM (DSB-AM), and PM. It was found that when the available channel capacity is small, SSB-AM and DSB-AM are subjectively better than PCM', DPCM, and ΔM. However, for high quality speech communication, DPCM requires less channel capacity than PCM, ΔM, DSB-AM, SSB-AM or PM. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

An iterative method of system identification based on solving the integral equation [Formula omitted] for h(σ) at ten equally spaced points (σ[subscript i] = 1,2,..,10) is described. Replacing the above integral by a finite sum at ten different values of τ results in a set of ten equations in the ten unknowns h(σ[subscript i]). A statistically identical and much more easily handled set of equations, obtained by using one-sample products in place of the actual correlation functions, is then solved by a Gauss-Seidel-like iteration method, the convergence properties of which show this approach to the identification problem to be a useful one for a large class of system input signals. A simple computer to realize the above identification method is described in some detail. The use of a simple quantization form of correlation allows shift registers to carry out the required delay operations. Storage for the computer's estimates of the h(σ[subscript i]) is in the form of step motor driven potentiometers, which also carry out one of the multiplication operations. The very encouraging results of a number of relatively realistic identification tests using the computer are given. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

This thesis examines a floating gate device (FGD) structure available under standard (digital) CMOS manufacturing processes and puts forth two applications for these devices. The first application is the creation of a tunable current mirror. Inclusion of the FGD structure allows the legs of the mirror to be electronically tweaked to compensate for mismatch. Experimental data is presented on this device structure?s performance. The second application explores using the FGD structure as a tunable resistor. Operation of the FGD in this manner creates the possibility of an electrically tunable beta-multiplier current reference. This tunability allows theoretical adjustment of both the generated reference current as well as a selectable temperature performance. Experimental data of obtained resistor values is presented with simulation results of the entire circuit.

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