The automobile industry is moving fast towards Electric Vehicles (EV); however this paradigm shift is currently making its smooth transition through the phase of Hybrid Electric Vehicles. There is an ever-growing need for integration of hybrid energy sources especially for vehicular applications. Different energy sources such as batteries, ultra-capacitors, fuel cells etc. are available. Usage of these varied energy sources alone or together in different combinations in automobiles requires advanced power electronic circuits and control methodologies. An exhaustive literature survey has been carried out to study the power electronic converter, switching modulation strategy to be employed and the particular machine to be used in an EV. Adequate amount of effort has been put into designing the vehicle specifications. Owing to stronger demand for higher performance and torque response in an EV, the Permanent Magnet Synchronous Machine has been favored over the traditional Induction Machine. The aim of this thesis is to demonstrate the use of a multi level inverter fed Brush Less Direct Current (BLDC) motor in a field oriented control fashion in an EV and make it follow a given drive cycle. The switching operation and control of a multi level inverter for specific power level and desired performance characteristics is investigated. The EV has been designed from scratch taking into consideration the various factors such as mass, coefficients of aerodynamic drag and air friction, tire radius etc. The design parameters are meant to meet the requirements of a commercial car. The various advantages of a multi level inverter fed PMSM have been demonstrated and an exhaustive performance evaluation has been done. The investigation is done by testing the designed system on a standard drive cycle, New York urban driving cycle. This highly transient driving cycle is particularly used because it provides rapidly changing acceleration and deceleration curves. Furthermore, the evaluation of the system under fault conditions is also done. It is demonstrated that the system is stable and has a ride-through capability under different fault conditions. The simulations have been carried out in MATLAB and Simulink, while some preliminary studies involving switching losses of the converter were done in PSIM.

Doctor of Philosophy / Department of Electrical and Computer Engineering / Behrooz Mirafzal / Corrective schemes for facilitating continued operation of dc-ac converters during internal and external abnormalities are presented in this dissertation. While some of the developed techniques are suited for any dc-ac converter topology, most of the presented methodologies are designed specifically for cascaded H-bridge (CHB) multilevel converters. While CHB provide increased scalability and efficiency compared to traditional topologies, these converters are more likely to experience internal faults due to the additional components required. Realizing the full potential of CHB converters requires fault tolerant techniques, such as those demonstrated in this dissertation. Adaptive sinusoidal pulse width modulation (ASPWM) is introduced in this dissertation as a method which enables CHB to directly utilize time-variant dc sources, increasing CHB flexibility when compared to traditional pulse width modulation (PWM) methods which require dc sources with equal magnitudes or with magnitudes existing in specific ratios. Two alternative algorithms are presented to enable ASPWM implementation, providing a trade off between system performance and required sensor circuitry. This dissertation also introduces a load independent analytical approach for identifying discordant operating points, i.e. operating points where some cells in an asymmetric CHB leg regenerate power while the overall leg delivers power, or vice-versa. Identification of these points is essential due to the deleterious effects which can result from extended discordant operation, for instance overcharging of batteries leading to lifespan degradation or even catastrophic failures such as fires or explosions. Additionally, a method for rapidly identifying, isolating, and verifying internal IGBT open-circuit and gate-driver faults is presented in this dissertation to address the increased probability of switch failures occurring within CHB. The proposed approach enables converter operation to continue in the event of gate-driver or open-circuit faults, but avoids unnecessary converter reconfiguration due to gate-misfiring faults. For a CHB leg with M cells, the proposed technique identifies and isolates open-circuit switch faults in less than 2M measurement (sampling) cycles, and verification is completed in less than one full fundamental cycle. Furthermore, this dissertation introduces a real-time implementable atypical PWM technique which enables increased dc bus utilization under a wide range of non-ideal operating conditions. While this approach is suitable for a wide range of converters operating under external abnormalities, for instance maximizing dc bus utilization for converters providing auxiliary services such as negative-sequence compensation, this approach also facilitates operation of CHB with faulty cells. The proposed method can be used with any control technique and any carrier-based PWM method, enabling its implementation in both symmetric and asymmetric CHB. In addition to these fault tolerant techniques, a novel approach for analyzing the active- and reactive-power deliverable by grid-interactive converters is proposed. This method facilitates performance comparisons for various converter configurations, simplifying the process for selecting filter components, dc bus voltages, and other system parameters. This analytical approach also enables converter performance to be analyzed during internal and external fault events, allowing assessment of converter robustness. The efficacy of the developed techniques are supported by MATLAB/Simulink simulations as well as experimental data obtained using a laboratory-scale cascaded H-bridge multilevel converter.

Cascaded H-bridge (CHB) multilevel inverters have significant popularity with motor drives applications due to their modularity, scalability, and reliability. Typical CHB inverters employ diode rectifiers that allow unidirectional power flow from the grid to the load. To capture and utilize the regenerated energy in regenerative applications, regenerative CHB drives were introduced with two-level voltage source converters in the front end to allow bidirectional energy flow. This solution is accompanied by challenges of high number of switches and control circuits, high switching power losses, and massive dimensions. Recently, developing more economic versions of regenerative cascaded H-bridge drives has become one of the hottest topics in power electronics research. In this thesis work, two solutions are proposed for more energy efficient and economic regenerative CHB drives. The first solution is a proposed power cell configuration that reduces the number of switches per cell by two. Additionally, phase alternation connection method and carrier phase-shifting techniques are introduced to address the challenges of the presented configuration. The switch-count reduction reduces the system’s complexity, switches’ cost, and footprint. The second proposed solution is a new controller to operate the front-end converters as fundamental frequency ends (FFEs). The proposed controller is employed in both the conventional regenerative cascaded H-bridge and the proposed reduced switch-count configuration. This solution minimizes the switching power losses, and results in more compact and economic design, with higher DC-link utilization. Theoretical analysis and simulation studies of both proposed solutions show promising performance and capability to be applied as energy-efficient and cost effective regenerative CHB motor drives. Experimental validation of the proposed reduced switch-count configuration is presented for STATCOM operation of a scaled-down 7-Level regenerative CHB drive system. The future work of this thesis includes experimental validation of the proposed FFE controller, and operation of the system with regenerative motor load. / Thesis / Master of Applied Science (MASc)

High power converters are widely used in many industries. At power levels in the range of Mega Watt (MW), power conversion at medium voltage (MV) is preferred due to better efficiency and lower cost. For medium voltages applications, multilevel converters are widely adopted due to the features they offer with respect to two-level converters. Cascaded H-bridge topology is a widely adopted multilevel topology because of its modularity, scalability, and reliability. The conventional cascaded H-bridge topology allows two-quadrant operation. In order to allow fourquadrant operation, an active front end version of the cascaded H-bridge topology has been proposed in literature and recently commercialized. In the field, power converters operates under harsh loading and environmental conditions. The resulting stresses imposed on converter components cause their gradual degradation. In cascaded H-bridge converters, typically power cell components such as power modules, DC-bus capacitors, and control PCBs are v highly stressed. Under these stresses power cell components degrade and require replacement in the field, otherwise unexpected failures may occur. The thesis aim is to address power cell components reliability through proposing novel regenerative cascaded H-bridge converter control schemes to reduce components stresses and failure probability without increasing size, cost, or complexity. First, a novel PWM active front end control scheme has been proposed to reduce the inherent ripple current stresses on the DC-bus capacitors. Second, the thesis proposes a novel grid or near grid switching frequency front end control scheme to reduce stresses on power modules and the power cell cooling requirements. Third, novel cascaded H-bridge front end control schemes are proposed to reduce the sensor count, thereby decreasing failure rate and cutting down cost. The proposed work has been thoroughly validated through detailed 9- cell regenerative cascaded H-bridge system simulation and experimentation. / Thesis / Doctor of Philosophy (PhD)

Renewable energy is harnessed from continuously replenishing natural processes. Some commonly known are sunlight, water, wind, tides, geothermal heat and various forms of biomass. The focus on renewable energy has over the past few decades intensified greatly. This thesis contributes to the research on developing renewable energy technologies, within the wind power, wave power and marine current power projects at the division of Electricity, Uppsala University. In this thesis grid connection of permanent magnet generator based renewable energy sources is evaluated. A tap transformer based grid connection system has been constructed and experimentally evaluated for a vertical axis wind turbine. Full range variable speed operation of the turbine is enabled by using the different step-up ratios of a tap transformer. This removes the need for a DC/DC step or an active rectifier on the generator side of the full frequency converter and thereby reduces system complexity. Experiments and simulations of the system for variable speed operation are done and efficiency and harmonic content are evaluated.  The work presented in the thesis has also contributed to the design, construction and evaluation of a full-scale offshore marine substation for wave power intended to grid connect a farm of wave energy converters. The function of the marine substation has been experimentally tested and the substation is ready for deployment. Results from the system verification are presented. Special focus is on the transformer losses and transformer in-rush currents. A control and grid connection system for a vertical axis marine current energy converter has been designed and constructed. The grid connection is done with a back-to-back 2L-3L system with a three level cascaded H-bridge converter grid side. The system has been tested in the laboratory and is ready to be installed at the experimental site. Results from the laboratory testing of the system are presented. / Wind Power / Wave Power / Marine Currnet Power

Wave power is a renewable energy source with great potential, which is why there are more than a hundred ongoing wave power projects around the world. At the Division of Electricity, Uppsala University, a point-absorber type wave energy converter (WEC) has been proposed and developed. The WEC consists of a linear synchronous generator placed on the seabed, connected to a buoy floating on the surface. Power is absorbed by heave motion of the buoy, and converted into electric energy by the generator. The point-absorber WEC must be physically much smaller than the wavelength of the incoming waves, and can therefore not be scaled to very high power levels. Instead, the total power output is boosted by increasing the number of WECs, connecting them in wave power farms. To transfer the electric energy to the grid, an intermediate marine substation is proposed, where an AC/DC/AC conversion step is performed. Within this PhD-work, a full-scale offshore marine substation has been designed, constructed and experimentally evaluated. The substation is rated for grid-connection of seven WECs to the local 1kV-grid, and is placed on the seabed 3km off the coast at a depth of 25m. Various aspects of the substation design have been considered, including the mechanical and electrical systems, the WEC electrical interface, offshore operations and the automatic grid connection control system. A tap change circuit and different multilevel topologies have also been proposed. This dissertation has an experimental approach, validating a major part of the work with lab results. The final substation electrical circuit has been tested at rated grid voltage with a fluctuating input power source. The efficiency has been measured and the implemented functions are verified. Offshore operations have been successfully carried out and offshore wave farm data is expected in the nearby future.

Cette thèse est dédiée aux convertisseurs multiniveaux et aborde les problématiques liées à la compensation des perturbations générées sur un réseau électrique, telles que celles produites par les fours à arc. Elle est composée de quatre chapitres couvrant les thématiques de la modélisation des réseaux électriques, des convertisseurs de tension, du contrôle commande et des stratégies de compensation, accompagnés de simulations et de résultats expérimentaux obtenus sur des équipements industriels de forte puissance. Les applications réseaux étant diverses et variées, les convertisseurs multiniveaux sont ici étudiés dans le but d’être raccordés directement sur des réseaux de distribution. Pour cela, un état de l’art des différentes topologies de convertisseurs de tension (classiques et multiniveaux) est présenté et les topologies dites modulaires, sont retenues pour une étude plus poussée. Ces convertisseurs utilisent des modules de puissance à base de ponts en H, de ½ ponts en H ou de ponts en H 3-niveaux connectés en cascade. Ils permettent ainsi de créer différents types de configurations ou couplages appelés dans ce mémoire : étoile, triangle et étoiles symétriques. Les différents modules et les stratégies pour les commander sont étudiés autour d’un composant de puissance (de type IGBT 2.5kV/1.5kA). A travers les domaines électrique et thermique, une méthode est proposée afin d’estimer les pertes, les températures de jonction et déterminer ainsi les limites d’utilisation d’un tel composant de puissance. Le dimensionnement et la fiabilité de ces convertisseurs est également abordé pour chacune des configurations envisagées, afin de dégager les avantages et inconvénients pour une application réseau. D’une façon générale, la stratégie de contrôle des convertisseurs multiniveaux est ardue, principalement lié au fait que de multiples sources de tensions continues doivent être contrôlées. Dans cette optique, des stratégies de contrôle sont proposées et validées en simulation selon les types de modules et de configurations utilisés pour la compensation des perturbations d’un four à arc. Enfin, la dernière partie de ces travaux est consacrée aux résultats expérimentaux sur la base d’un compensateur industriel dénommé DSVC (Dynamic Static Var Compensator), pour la compensation des fours à arc. Les différents résultats obtenus sur plusieurs sites industriels ont ainsi permis la validation des travaux exposés dans ce mémoire / This thesis is dedicated to the multilevel converters and addresses issues related to compensation for disturbance generated on an electrical network such as those produced by arc furnaces. It is composed of four chapters covering the themes of modeling of electrical networks, voltage converters, control and compensation strategies, with simulations and experimental results obtained on high power industrial equipment. There are many networks applications and multilevel converters are here considered to be directly connected to distribution networks. Therefore, a state of the art of different voltage converters, classics and multilevel topologies, is presented and the topologies called modular are retained for further studies. These converters use modular power cells made of H bridges, ½ bridges or 3-level H bridges connected in cascade. They allow to create different types of configurations or couplings called in this memory: star, delta and double stars. The different modules and the strategies to control them are investigated around the same switching power component (IGBT 2.5kV/1.5kA). Through electrical and thermal fields, a method is proposed to estimate their losses, junction temperatures in order to determine the limits of use of such a component of power. Sizing and reliability of these converters is also discussed for each considerer configurations in order to identify the advantages and disadvantages for a network application. Generally, the multilevel converters control strategy is difficult because of the multiple sources of DC voltages to control. In this context, control strategies are proposed and validated in simulation according to the types of modules and configuration used to compensation for disturbance of an arc furnace. Finally, the last part of this thesis is devoted to the experimental results based on an industrial compensator DSVC (Dynamic Static Var Compensator) for arc furnace compensation. The different results obtained at several industrial sites have thus allowed the validation of the various works exposed in this thesis

This report is about control, design and implementation of a low voltage-fed quasi Z-source three-level inverter. The topology has been interesting for photovoltaic-systems due to its ability to boost the incoming voltage without needing an extra switching control. The topology was first simulated in Simulink and later implemented on a full-bridge module to measure the harmonic distortion and estimating the power losses of the inverter. An appropriate control scheme was used to set up a shootthrough and design a three-level inverter. The conclusion for the report is that the quasi Z-source inverter could boost the DC-link voltage in the simulation. But there should be more consideration to the internal resistance of the components for the implementation stage as it gave out a lower output voltage than expected.

For decades, the Silicon-based semiconductors have been the solution for power electronics applications. However, these semiconductors have approached their limits of operation in blocking voltage, working temperature and switching frequency. Due to material superiority, the relatively-new wide-bandgap semiconductors such as Silicon-Carbide (SiC) MOSFETs enable higher voltages, switching frequencies and operating temperatures when compared to Silicon technology, resulting in improved converter specifications. The current study tries to investigate the impact of emerging medium-voltage SiC MOSFETs on industrial motor drive application, where over a quarter of the total electricity in the world is being consumed. Firstly, non-commercial SiC MOSFETs at 3.3 kV and 400 A rating are characterized to enable converter design and simulation based on them. In order to feature the best performance out of the devices under test, an intelligent high-performance gate driver is designed embedding required functionalities and protections. Secondly, total of three converters are targeted for industrial motor drive application at medium-voltage and high-power range. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at 4.16-, 6.9- and 13.8 kV voltage ratings and 3- and 5 MVA power ratings. Selection of different voltage and power levels is done to elucidate variation of different parameters within the converters versus operating point. Later, comparisons are done between the surveyed topologies designed at different operating points based on Si IGBTs and SiC MOSFETs. The comparison includes different aspects such as efficiency, power density, semiconductor utilization, energy stored in converter structure, fault containment, low-speed operation capability and parts count (for a measure of reliability). Having the comparisons done based on simulation data, an H-bridge cell is implemented using 3.3 kV 400 A SiC MOSFETs to evaluate validity of the conducted simulations. Finally, a novel method is proposed for series-connecting individual SiC MOSFETs to reach higher voltage devices. Considering the fact that currently the SiC MOSFETs are not commercially available at voltages higher above 1.7 kV, this will enable implementation of converters using medium-voltage SiC MOSFETs that are achieved by stacking commercially-available 1.7 kV MOSFETs. The proposed method is specifically developed for SiC MOSFETs with high dv/dt rates, while majority of the existing solutions could only work merely with slow Si-based semiconductors. / Ph. D. / Despite their mature technology and low manufacturing cost, the traditional Si-based power semiconductors had reached their limitations in operation from different points of view. The SiC MOSFETs which are the new generation of power semiconductors however seem to be able to shift the existing boundaries of operation for the Si-based semiconductors, resulting in significant improvement in design and operation of power electronics converters. This dissertation focuses on investigating the impact of emerging medium-voltage SiC MOSFETs on industrial motor drives, which consume over 28% of the total electricity used in the world. Firstly, the state-of-the-art non-commercial 3.3 kV SiC MOSFETs are characterized. Characterization of the devices is done to extract their key features such as switching and conduction losses, to enable loss calculation and performance evaluation in any target application. Since the mentioned devices are not commercial yet, the gate driving circuitry that can feature the best performance out of them are not commercially available either. Thus, the characterization process starts with design of an intelligent high-performance gate driver for the devices under test. Secondly, total of three topologies that are targeted for the study are discussed and their basics of operation is investigated. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at three different voltage levels (4.16-, 6.9- and 13.8 kV) and two power levels (3- and 5 MVA). Selection of different voltage and power levels is done to enable comparison from different aspects as the operating point changes. Later, comparisons are done between the surveyed topologies designed at different operating points using different semiconductor technologies. The performed comparisons provide an unbiased input for the manufacturers and customers of these converters for selection of the target topology in motor drive application. Also to verify validity of the conducted simulations and calculations, a full-bridge converter cell is experimentally implemented using 3.3 kV 400 A SiC MOSFETs. Finally, a novel method is proposed for series-connecting lower-voltage SiC MOSFETs to reach higher-voltage devices. As of late 2017, the medium-voltage SiC MOSFETs are not commercially available. Also it is expected that upon commercialization, their price will be multiple times of that of low-voltage SiC MOSFETs. Thus, connecting lower-voltage SiC MOSFETs in series is an effective way of achieving higher-voltage devices and take advantage of superior properties if the SiC MOSFETs, while the availability and high cost problems are taken care of.

Conventional 2-level inverters have been quite popular in industry for drives applications. It used pulse width modulation techniques to generate a voltage waveform with high quality. For achieving this, it had to switch at high frequencies and also the switching is between 0 and Vdc. Also additional LC filters are required before feeding to a motor. 3-phase IM is the work horse of the industry. Several speed control techniques have been established namely the V/f control technique and for high performance, vector control is adopted. An electric drive system comprises of a rectifier, inverter, a motor and a load. each module is a topic by itself. This thesis work discusses the novel inverter topologies to overcome the demerits of a conventional 2-level inverter or even the basic multilevel topologies, for an electric drive. The word ‘multilevel’ itself signifies that inverter can generate more than two levels. The idea was first originated by Nabae, Takahashi and Akagi to bring an additional voltage level so that the waveform becomes a quasi square wave. This additional voltage level brought additional benefits in terms of reduced dv/dt and requirement of low switching frequency. But this was not without any cost. The inverter structure is slightly more complicated than a 2-level and also required more devices. But the advantage it gave was superior enough to such an extent that the above topology (popularly known as NPC) has become quite popular in industry. This topology was later modified to equalize the semiconductor losses among switches by replacing the clamping diodes with controllable switches and such topologies are popularly known as Active NPCs (ANPCs) because of the replacement of diodes with active switches. 3-level flying capacitors were then introduced where the additional voltage level is provided using charged capacitors. But this capacitor voltage has to be maintained at its nominal value during the inverter operation. An additional floating capacitor, which is an electrolytic capacitor is needed for this. Increasing the number of electrolytic capacitors reduces the reliability of the inverter drive since they are the weakest link in any inverters and its count has to be kept to the minimum. By using a H-bridge cell in each of the three phases, three voltage levels can be easily obtained.This is commonly known as Cascaded H-bridge (CHB) multilevel inverter. The above three topologies have been discussed with respect to generation of three pole voltage levels and these topologies are quite suited also. A higher number of voltage levels will reduce the switching frequency even lesser and also the dv/dt. On increasing the number of levels further and further, finally the inverter need not do any PWM switching and just generating the levels is sufficient enough for a good quality waveform and also low dv/dt. But when the above topologies are scaled for more than three voltage levels, all of them suffer serious drawbacks which is briefly discussed below. The diode clamped inverter (known as NPC if it is 3-level), when extended to more than three levels suffers from the neutral point balancing issue and also the count of clamping diodes increase drastically. FC inverters, when extended beyond 3-level, the number of electrolytic capacitors increases and also balancing of these capacitors to their nominal voltages becomes complicated. In the case of multilevel CHB, when extended beyond 3-level, the requirement of isolated DC sources also increases. To generate isolated supplies, phase shifting transformer and 8, 12 or 24 pulse diode rectifier is needed which increases the weight , size and cost of the drive. Therefore its application is limited. In this thesis, the aim is to develop a novel method to develop a multilevel inverter without the drawbacks faced by the basic multilevel topologies when scaled for higher number of voltage levels. This is done through stacking the basic or hybrid combination of these basic multilevel topologies through selector switches. This method is experimentally verified by stacking two 5-level inverters through a 2-level selector switch (whose switching losses can be minimized through soft cycle commutation). This will generate nine levels.Generating 9-levels through scaling the basic topologies is disadvantageous, the comparison table is provided in the thesis. This is true for any higher voltage level generation. Each of the above 5-level inverter is developed through cascading an FC with a capacitor fed H-bridge. The device count can be reduced by making the FC-CHB module common to the selector switches by shifting the selector switches between the DC link and the common FC-CHB module. Doing so, reduces the modular feature of the drive but the device count can be reduced. The FFT plot at different frequencies of operation and the switching losses of the different modules-FC, CHB and the selector switches are also plotted for different frequencies of operation. The next step is to check whether this method can be extended to any number of stackings for generation of more voltage levels. For this, a 49-level inverter is developed in laboratory by stacking three 17-level inverters. Each of the 17-level inverter is developed by cascading an FC with three CHBs. When there are 49 levels in the pole voltage waveform, there is no need to do any regular PWM since the output waveform will be very close to a sine wave even without any PWM switching. The technique used is commonly known in literature as Nearest Level Control (NLC). This method of stacking and cascading has the advantage that the FC and the CHB modules now are of very low voltages and the switching losses can be reduced. The switching losses of the different modules are calculated and plotted for different operating frequencies in the thesis. To reduce the voltages of the modules further, a 6-phase machine has been reconfigured as a 3-phase machine, the advantage being that now the DC link voltage requirement is half of that needed earlier for the same power. This further reduces voltages of the modules by half and this allows the switches to be replaced with MOSFETs, improving the efficiency of the drive. This topology is also experimentally verified for both steady state and transient conditions. So far the research focussed on a 3-phase IM fed through a stacked MLI. It can be observed that a stacked MLI needs as many DC sources as the number of stackings. A 6-phase machine apart from reduced DC link voltage requirement, has other advantages of better fault tolerant capability and better space harmonics. They are serious contenders for applications like ship propulsion, locomotive traction, electric vehicles, more electric aircraft and other high power industrial applications. Using the unique property of a 6-phase machine that its opposite windings always draw equal and opposite current, the neutral point (NP) (formed as a result of stacking two MLIs) voltage can be balanced. It was observed that the net mid point current drawn from the mid point can be made zero in a switching interval. It was later observed that with minimal changes, the mid point current drawn from the NP can be made instantaneously zero and the NP voltage deviation is completely arrested and the topology needs only very low capacity series connected capacitors energized from a single DC link. This topology is also experimentally verified using the stacked 9-level inverter topology discussed above but now for 6-phase application and experimental results are provided in the thesis. Single DC link enables direct back to back conversion and power can be fed back to the mains at any desired power factor. All the experimental verification is done on a DSP (TMS320F28335) and FPGA (Spartan 3 XCS3200) platform. An IM is run using V/f control scheme and the above inverter topologies are used to drive the motor. The IGBTs used are SKM75GB123D for the stacked 9-level inverter in the 3-phase and 6-phase experiments. For the 49-level inverter experiment, MOSFETs-IRF260N were used. Both steady state and transient results ensure that the proposed inverter topologies are suitable for high power applications.