Software Defined Radios are computer based systems that emulate the behavior of traditional radio systems by processing digitized radio signals. A SDR replaces the traditional fixed hardware radio with a system that may be reconfigured, both during operation to provide greater flexibility and by providing software upgrades to add new capabilities without requiring new hardware. These are powerful reasons for using SDR technology; however this flexibility comes at the cost of increased hardware cost and greater power consumption compared with traditional hardware radios. This report presents measurements of memory and processor usage for a Software Communication Architecture (SCA) waveform running on an OMAP starter kit and a desktop PC. The process used to build software, originally targeted for a desktop computer, on an embedded machine with a different processor architecture is described. OSSIE, an open source SCA implementation developed at Virginia Tech, was ported to the ARM processor by adding support for building OSSIE into the OpenEmbedded build system. Once the port for the OMAP starter kit was complete, it became possible to easily re-target OSSIE for a variety of other hardware platforms. For testing purposes a simple waveform capable of transmitting several common digital modulation formats was developed. A SCA device for the Universal Software Radio Peripheral was developed to interface the waveform to the antenna. One method to reduce the cost and power consumption is to limit the amount of memory used in the radio. This reduces both cost and power consumption. This report describes the memory manager portion of the Linux kernel and how it helps reduce the memory used by the system. The exmap tool for accurately measuring memory usage is described and used to measure the memory usage of the OSSIE based test waveform. These techniques help radio developers measure and reduce the amount of memory required for the SDR, reducing system cost and power consumption. Finally, the oprofile was used to measure relative processor usage of the waveform components. Oprofile can also provide details about specific sections of waveform code that use the most processor cycles. This information helps the radio designer reduce the number of processing cycles required. This allows the hardware to use a lower speed part, or add more capability to the radio design. / Master of Science

I present an algorithm which allows two agents to generate a simple language based only on observations of a shared environment. Vocabulary and roles for the language are learned in linear time. Communication is robust and degrades gradually as complexity increases. Dissimilar modes of experience will lead to a shared kernel vocabulary.

Les travaux de recherche détaillés dans ce document portent sur la conception et l’implantation d’un composant matériel jouant le rôle du sous-système cryptographique d’une radio logicielle sécurisée.A partir du début des années 90, les systèmes radios ont peu à peu évolué de la radio classique vers la radio logicielle. Le développement de la radio logicielle a permis l’intégration d’un nombre toujours plus grand de standards de communication sur une même plateforme matérielle. La réalisation concrète d’une radio logicielle sécurisée amène son concepteur à faire face à de nombreuses problématiques qui peuvent se résumer par la question suivante : Comment implanter un maximum de standards de communication sur une même plateforme matérielle et logicielle ? Ce document s’intéresse plus particulièrement à l’implantation des standards cryptographiques destinés à protéger les radiocommunications.Idéalement, la solution apportée à ce problème repose exclusivement sur l’utilisation de processeurs numériques. Cependant, les algorithmes cryptographiques nécessitent le plus souvent une puissance de calcul telle que leur implantation sous forme logicielle n’est pas envisageable. Il s’ensuit qu’une radio logicielle doit parfois intégrer des composants matériels dédiés dont l'utilisation entre en conflit avec la propriété de flexibilité propre aux radios logicielles.Or depuis quelques années, le développement de la technologie FPGA a changé la donne. En effet, les derniers FPGA embarquent un nombre de ressources logiques suffisant à l’implantation des fonctions numériques complexes utilisées par la radio logicielle. Plus précisément, la possibilité offerte par les FPGA d'être reconfiguré dans leur totalité (voir même partiellement pour les derniers d’entre eux) fait d’eux des candidats idéaux à l’implantation de composants matériels flexibles et évolutifs dans le temps. À la suite de ces constatations, des travaux de recherche ont été menés au sein de l’équipe Conception des Systèmes Numériques du Laboratoire IMS. Ces travaux ont d’abord débouché sur la publication d’une architecture de sous-système cryptographique pour la radio logicielle sécurisée telle qu’elle est définie par la Software Communication Architecture. Puis, ils se sont poursuivis par la conception et l’implantation d’un cryptoprocesseur multi-cœur dynamiquement reconfigurable sur FPGA. / The research detailed in this document deal with the design and implementation of a hardware integrated circuit intended to be used as a cryptographic sub-system in secure software defined radios.Since the early 90’s, radio systems have gradually evolved from traditional radio to software defined radio. Improvement of the software defined radio has enabled the integration of an increasing number of communication standards on a single radio device. The designer of a software defined radio faces many problems that can be summarized by the following question: How to implement a maximum of communication standards into a single radio device? Specifically, this work focuses on the implementation of cryptographic standards aimed to protect radio communications.Ideally, the solution to this problem is based exclusively on the use of digital processors. However, cryptographic algorithms usually require a large amount of computing power which makes their software implementation inefficient. Therefore, a secure software defined radio needs to incorporate dedicated hardware even if this usage is conflicting with the property of flexibility specific to software defined radios.Yet, in recent years, the improvement of FPGA circuits has changed the deal. Indeed, the latest FPGAs embed a number of logic gates which is sufficient to meet the needs of the complex digital functions used by software defined radios. The possibility offered by FPGAs to be reconfigured in their entirety (or even partially for the last of them) makes them ideal candidates for implementation of hardware components which have to be flexible and scalable over time.Following these observations, research was conducted within the Conception des Systèmes Numériques team of the IMS laboratory. These works led first to the publication of an architecture of cryptographic subsystem compliant with the security supplement of the Software Communication Architecture. Then, they continued with the design and implementation of a partially reconfigurable multi-core cryptoprocessor intended to be used in the latest FPGAs.

O aumento no número de dispositivos móveis com crescente capacidade de processamento traz como incentivo o desenvolvimento de sistemas distribuídos que possam explorar estas novas tecnologias. Dentro dos sistemas distribuídos, os mecanismos que permitem a troca de dados entre os processos que o constituem, possuem um papel importante para o desempenho da aplicação. Uma abordagem interessante para implementar estes mecanismos é por meio do uso de middlewares. O middleware abstrai as funcionalidades básicas oferecidas pelo sistema operacional e hardware para oferecer serviços de alto nível aos desenvolvedores. Estes serviços permitem aos desenvolvedores se concentrarem somente na lógica interna de suas aplicações, reduzindo também seu custo de manutenção. Incentivado pela necessidade de um mecanismo que garantisse a troca de informações entre as unidades de um sistema autônomo para o gerenciamento de AGVs (Automated Guided Vehicle), desenvolvido pelo grupo de mecatrônica da Universidade de São Paulo, este trabalho propõe uma arquitetura de comunicação baseada em middlewares que é inspirada no paradigma de comunicação RMI (Remote Method Invocation) para suprir a troca de dados necessária por meio do conceito de objetos distribuídos. Para apresentar o uso da IDL (Interface Definition Language) disponibilizada pela arquitetura proposta, uma demonstração de como acrescentar novos serviços à arquitetura é descrita. Para avaliar o desempenho da arquitetura e analisar o comportamento dos serviços oferecidos, testes de tempo de resposta, throughput e disponibilidade foram realizados. Pode-se verificar que a arquitetura proposta, além de apresentar um desempenho satisfatório para a operação do sistema de AGVs, proporcionou uma estrutura que pode ser facilmente adaptada para futuras alterações no projeto sem modificar diretamente as definições da arquitetura de comunicação. / The increase in the process capacity of mobile devices has motivated the development of distributed applications that exploit new technologies. In distributed applications, the mechanisms that enable the exchange of data among the application processes play an important role in their performance. An interesting way to deal with such an exchange is to adopt middleware to handle communication. The middleware abstracts the functionalities provided by the underlying operational system and hardware and offers a set of high-level services, which assist developers in working directly with the logic of the application and reducing its maintenance costs. Motivated by the necessity of a mechanism that ensures the exchange of information among the units of an AGV (Automated Guided Vehicle) system designed by the University of São Paulo, this dissertation develops a communication architecture based on middleware. The architecture is inspired in the RMI (Remote Method Invocation) paradigm to enable the data exchange based on the concept of distributed objects. An IDL (Interface Definition Language) was conceived for the architecture and a demonstration of how new services can be added to the structure was conducted. To validate the performance of the proposed middleware and its services, tests of network response time, throughput and availability were carried out. The architecture showed a satisfactory performance for the operation of the AGV system and provided a structure that can be easily adapted for future changes in the project.

O aumento no número de dispositivos móveis com crescente capacidade de processamento traz como incentivo o desenvolvimento de sistemas distribuídos que possam explorar estas novas tecnologias. Dentro dos sistemas distribuídos, os mecanismos que permitem a troca de dados entre os processos que o constituem, possuem um papel importante para o desempenho da aplicação. Uma abordagem interessante para implementar estes mecanismos é por meio do uso de middlewares. O middleware abstrai as funcionalidades básicas oferecidas pelo sistema operacional e hardware para oferecer serviços de alto nível aos desenvolvedores. Estes serviços permitem aos desenvolvedores se concentrarem somente na lógica interna de suas aplicações, reduzindo também seu custo de manutenção. Incentivado pela necessidade de um mecanismo que garantisse a troca de informações entre as unidades de um sistema autônomo para o gerenciamento de AGVs (Automated Guided Vehicle), desenvolvido pelo grupo de mecatrônica da Universidade de São Paulo, este trabalho propõe uma arquitetura de comunicação baseada em middlewares que é inspirada no paradigma de comunicação RMI (Remote Method Invocation) para suprir a troca de dados necessária por meio do conceito de objetos distribuídos. Para apresentar o uso da IDL (Interface Definition Language) disponibilizada pela arquitetura proposta, uma demonstração de como acrescentar novos serviços à arquitetura é descrita. Para avaliar o desempenho da arquitetura e analisar o comportamento dos serviços oferecidos, testes de tempo de resposta, throughput e disponibilidade foram realizados. Pode-se verificar que a arquitetura proposta, além de apresentar um desempenho satisfatório para a operação do sistema de AGVs, proporcionou uma estrutura que pode ser facilmente adaptada para futuras alterações no projeto sem modificar diretamente as definições da arquitetura de comunicação. / The increase in the process capacity of mobile devices has motivated the development of distributed applications that exploit new technologies. In distributed applications, the mechanisms that enable the exchange of data among the application processes play an important role in their performance. An interesting way to deal with such an exchange is to adopt middleware to handle communication. The middleware abstracts the functionalities provided by the underlying operational system and hardware and offers a set of high-level services, which assist developers in working directly with the logic of the application and reducing its maintenance costs. Motivated by the necessity of a mechanism that ensures the exchange of information among the units of an AGV (Automated Guided Vehicle) system designed by the University of São Paulo, this dissertation develops a communication architecture based on middleware. The architecture is inspired in the RMI (Remote Method Invocation) paradigm to enable the data exchange based on the concept of distributed objects. An IDL (Interface Definition Language) was conceived for the architecture and a demonstration of how new services can be added to the structure was conducted. To validate the performance of the proposed middleware and its services, tests of network response time, throughput and availability were carried out. The architecture showed a satisfactory performance for the operation of the AGV system and provided a structure that can be easily adapted for future changes in the project.

Advances in communicat ions have been unarguably essent ial to enablemodern systems and applicat ions as we know them. Ubiquity has turned into reality, allowing specialised embedded systems to eminent ly grow and spread. That is notably the case of unmanned vehicles which have been creat ively explored on applications that were not as efficient as they currently are, neither as innovative as recent ly accomplished. Therefore, towards the efficient operat ion of either unmanned vehicles and systems they integrate, in addition to communicat ion improvements, it is highly desired that we carefully observe relevant , co-related necessit ies that may lead to the full insert ion of unmanned vehicles to our everyday lives. Moreover, by addressing these demands on integrated solut ions, better resultswill likely be produced. This thesis presentsHAMSTER, theHeAlthy, Mobility and Security based data communication archiTEctuRe for unmanned vehicles, which addresses threemain types of communicat ions: machine-to-machine, machine-to-infrast ructure and internal machine communications. Four addit ional elements on co-related requirements are provided alongside with HAMSTER for more accurate approaches regarding security and safety aspects (SPHERE platform), crit icality analysis (NCI index), energy efficiency (NP plat form) and mobility-oriented ad hoc and infrast ructured communicat ions (NIMBLE platform). Furthermore, three specialised versions are provided: unmanned aerial vehicles (Flying HAMSTER), unmanned ground vehicles (Running HAMSTER) and unmanned surface/ underwater vehicles (Swimming HAMSTER). The architecture validat ion is achieved by case studies on each feature addressed, leading to guidelines on the development of vehicles more likely to meet certificat ion requirements, more efficient and secure communicat ions, assert ive approaches regarding crit icality and green approaches on internal communicat ions. Indeed, results prove the efficiency and effectiveness of HAMSTER architecture and its elements, as well as its flexibility in carrying out different experiments focused on various aspects of communication, which helps researchers and developers to achieve safe and secure communicat ions in unmanned vehicles. / Os avanços na área de comunicações foram indiscutívelmente essenciais para a obtenção de sistemas e aplicações modernos como os o atuais. A computação ubíqua se tornou realidade, permitindo que sistemas embarcados especializados ganhassem espaço e cada vez mais autonomia. Esse é notavelmente o caso de veículos não tripulados que têm sido criativamente explorados em aplicações inovadoras e avançadas. Entretanto, para o funcionamento eficiente desses veículos e sistemas não tripulados, além de melhorias de comunicação, é altamente desejável que as necessidades relevantes co-relacionadas a comunica¸cao sejam cuidadosamente observadas, levando a uma facilitação na inserção de veículos não tripulados em espaços públicos. Além disso, ao abordar essas demandas de modo integrado, as chances de produzir melhores resultados é maior. Esta tese apresenta a HAMSTER, uma arquitetura de comunicação de dados baseada em mobilidade e segurança para veículos não tripulados, que aborda três tipos principais de comunicação: máquina-para- máquina, máquina-para-infraestrutura e comunicações internas. Quatro elementos adicionais co-relacionados são fornecidos juntamente com a arquitetura HAMSTER de modo a prover abordagens mais precisas em relação a aspectos de segurança física e da informação (plataforma SPHERE), análise de criticalidade (índice NCI), eficiência energética (plataforma NP) e comunicações ad hoc e infraestruturadas orientadas a mobilidade (plataforma NIMBLE). Além disso, são fornecidas três versões especializadas: para veículos aéreos não tripulados (Flying HAMSTER), veículos terrestres não tripulados (Running HAMSTER) e veículos submarinos e de superfície não tripulados (Swimming HAMSTER). A validação da arquitetura é obtida por meio de estudos de caso sobre cada recurso abordado, levando a diretrizes sobre o desenvolvimento de veículos mais preparados para atender a requisitos de certificação, comunicação mais eficiente e segura, abordagens assertivas sobre criticidade e abordagens verdes nas comunicações internas. Por fim, os resultados comprovaram a eficiência da arquitetura HAMSTER e os elementos com ela providos, bem como a flexibilidade em realizar experimentos focados em vários aspectos de comunicação, auxiliando na obtenção de comunicações seguras em veículos autônomos.

Les travaux de recherche détaillés dans ce document portent sur la conception et l'implantation d'un composant matériel jouant le rôle du sous-système cryptographique d'une radio logicielle sécurisée. A partir du début des années 90, les systèmes radios ont peu à peu évolué de la radio classique vers la radio logicielle. Le développement de la radio logicielle a permis l'intégration d'un nombre toujours plus grand de standards de communication sur une même plateforme matérielle. La réalisation concrète d'une radio logicielle sécurisée amène son concepteur à faire face à de nombreuses problématiques qui peuvent se résumer par la question suivante : Comment implanter un maximum de standards de communication sur une même plateforme matérielle et logicielle ? Ce document s'intéresse plus particulièrement à l'implantation des standards cryptographiques destinés à protéger les radiocommunications. Idéalement, la solution apportée à ce problème repose exclusivement sur l'utilisation de processeurs numériques. Cependant, les algorithmes cryptographiques nécessitent le plus souvent une puissance de calcul telle que leur implantation sous forme logicielle n'est pas envisageable. Il s'ensuit qu'une radio logicielle doit parfois intégrer des composants matériels dédiés dont l'utilisation entre en conflit avec la propriété de flexibilité propre aux radios logicielles. Or depuis quelques années, le développement de la technologie FPGA a changé la donne. En effet, les derniers FPGA embarquent un nombre de ressources logiques suffisant à l'implantation des fonctions numériques complexes utilisées par la radio logicielle. Plus précisément, la possibilité offerte par les FPGA d'être reconfigurés dans leur totalité (voir même partiellement pour les derniers d'entre eux) fait d'eux des candidats idéaux à l'implantation de composants matériels flexibles et évolutifs dans le temps. À la suite de ces constatations, des travaux de recherche ont été menés au sein de l'équipe Conception des Systèmes Numériques du Laboratoire IMS. Ces travaux ont d'abord débouché sur la publication d'une architecture de sous-système cryptographique pour la radio logicielle sécurisée telle qu'elle est définie par la Software Communication Architecture. Puis, ils se sont poursuivis par la conception et l'implantation d'un cryptoprocesseur multicœur dynamiquement reconfigurable sur FPGA.

<p>In large multiprocessors, the access to shared memory is often nonuniform, and may vary as much as ten times for some distributed shared-memory architectures (DSMs). This dissertation identifies another important nonuniform property of DSM systems: <i>nonuniform communication architecture</i>, NUCA. High-end hardware-coherent machines built from large nodes, or from chip multiprocessors, are typical NUCA systems, since they have a lower penalty for reading recently written data from a neighbor's cache than from a remote cache. This dissertation identifies <i>node affinity</i> as an important property for scalable general-purpose locks. Several software-based hierarchical lock implementations exploiting NUCAs are presented and evaluated. NUCA-aware locks are shown to be almost twice as efficient for contended critical sections compared to traditional lock implementations.</p><p>The shared-memory “illusion”' provided by some large DSM systems may be implemented using either hardware, software or a combination thereof. A software-based implementation can enable cheap cluster hardware to be used, but typically suffers from poor and unpredictable performance characteristics.</p><p>This dissertation advocates a new software-hardware trade-off design point based on a new combination of techniques. The two low-level techniques, fine-grain deterministic coherence and synchronous protocol execution, as well as profile-guided protocol flexibility, are evaluated in isolation as well as in a combined setting using all-software implementations. Finally, a minimum of hardware trap support is suggested to further improve the performance of coherence protocols across cluster nodes. It is shown that all these techniques combined could result in a fairly stable performance on par with hardware-based coherence.</p>

This research focused on the design and implementation of an Intelligent Modular Controller (IMC) architecture designed to be reconfigurable over a robust network. The design incorporates novel communication, hardware, and software architectures. This was motivated by current industrial needs for distributed control systems due to growing demand for less complexity, more processing power, flexibility, and greater fault tolerance. To this end, three main contributions were made. <p>Most distributed control architectures depend on multi-tier heterogeneous communication networks requiring linking devices and/or complex middleware. In this study, first, a communication architecture was proposed and implemented with a homogenous network employing the ubiquitous Ethernet for both real-time and non real-time communication. This was achieved by a producer-consumer coordination model for real-time data communication over a segmented network, and a client-server model for point-to-point transactions. The protocols deployed use a Time-Triggered (TT) approach to schedule real-time tasks on the network. Unlike other TT approaches, the scheduling mechanism does not need to be configured explicitly when controller nodes are added or removed. An implicit clock synchronization technique was also developed to complement the architecture. Second, a reconfigurable mechanism based on an auto-configuration protocol was developed. Modules on the network use this protocol to automatically detect themselves, establish communication, and negotiate for a desired configuration. Third, the research demonstrated hardware/software co-design as a contribution to the growing discipline of mechatronics. The IMC consists of a motion controller board designed and prototyped in-house, and a Java microcontroller. An IMC is mapped to each machine/robot axis, and an additional IMC can be configured to serve as a real-time coordinator. The entire architecture was implemented in Java, thus reinforcing uniformity, simplicity, modularity, and openness. Evaluation results showed the potential of the flexible controller to meet medium to high performance machining requirements.

This research focused on the design and implementation of an Intelligent Modular Controller (IMC) architecture designed to be reconfigurable over a robust network. The design incorporates novel communication, hardware, and software architectures. This was motivated by current industrial needs for distributed control systems due to growing demand for less complexity, more processing power, flexibility, and greater fault tolerance. To this end, three main contributions were made. <p>Most distributed control architectures depend on multi-tier heterogeneous communication networks requiring linking devices and/or complex middleware. In this study, first, a communication architecture was proposed and implemented with a homogenous network employing the ubiquitous Ethernet for both real-time and non real-time communication. This was achieved by a producer-consumer coordination model for real-time data communication over a segmented network, and a client-server model for point-to-point transactions. The protocols deployed use a Time-Triggered (TT) approach to schedule real-time tasks on the network. Unlike other TT approaches, the scheduling mechanism does not need to be configured explicitly when controller nodes are added or removed. An implicit clock synchronization technique was also developed to complement the architecture. Second, a reconfigurable mechanism based on an auto-configuration protocol was developed. Modules on the network use this protocol to automatically detect themselves, establish communication, and negotiate for a desired configuration. Third, the research demonstrated hardware/software co-design as a contribution to the growing discipline of mechatronics. The IMC consists of a motion controller board designed and prototyped in-house, and a Java microcontroller. An IMC is mapped to each machine/robot axis, and an additional IMC can be configured to serve as a real-time coordinator. The entire architecture was implemented in Java, thus reinforcing uniformity, simplicity, modularity, and openness. Evaluation results showed the potential of the flexible controller to meet medium to high performance machining requirements.