<p>In this thesis, controllers for power oscillation damping, transient stability improvement and power flow control by means of a Controlled Series Compensator (CSC) and and a Dynamic Power Flow Controller (DPFC) are proposed. These devices belong to the group of power system components referred to as Flexible AC Transmission System (FACTS) devices. The developed controllers use only quantities measured locally at the FACTS device as inputs, thereby avoiding the risk of interrupted communications associated with the use of remote signals for control.</p><p>For power systems with one dominating, poorly damped inter-area power oscillation mode, it is shown that a simple generic system model can be used as a basis for damping- and power flow control design. The model for control of CSC includes two synchronous machine models representing the two grid areas participating in the oscillation and three reactance variables, representing the interconnecting transmission lines and the FACTS device. The model for control of DPFC is of the same type but it also includes the phase shift of the internal phase-shifting transformer of the DPFC.</p><p>The key parameters of the generic grid models are adaptively set during the controller operation by estimation from the step responses in the FACTS line power to the changes in the line series reactance inserted by the FACTS device. The power oscillation damping controller is based on a time-discrete, non-linear approach which aims to damp the power oscillations and set the desired power flow on the FACTS line by means of two step changes in the line reactance separated in time by half an oscillation cycle.</p><p>A verification of the proposed controllers was done by means of digital simulations using power system models of different complexities. The CSC and DPFC controllers were shown to significantly improve the small-signal- and transient stability in one four-machine system of a type commonly used to study inter-area oscillations. The CSC controller was also tested for 18 different contingencies in a 23-machine system, resulting in an improvement in both the system transient stability and the damping of the critical oscillation mode. </p>

This thesis studies different aspects of Flexible AC Transmission System (FACTS) devices which are used to improve the power transfer capability and increase the controllability in electric power systems. In the thesis, different aspects on the usage and control of Dynamic Power Flow Controllers (DPFC) and related FACTS devices are studied. The DPFC is a combination of a Phase Shifting Transformer (PST) and a Thyristor Switched Series Capacitor (TSSC)/Thyristor Switched Series Reactor (TSSR). The thesis proposes and studies a new method, the Ideal Phase-Shifter (IPS) method, for selection and rating of Power Flow Controllers (PFC) in a power grid. The IPS method, which is based on steady-state calculations, is proposed as a first step in the design process for a PFC. The method uses the Power controller plane, introduced by Brochu et al in 1999. The IPS method extends the usage of decoupling methods in the Power controller plane to a power system of arbitrary size. The IPS method was in the thesis used to compare the ratings of different PFC:s required to improve the power transfer capability in two test systems. The studied devices were here the PST, the TSSC/TSSR and the DPFC. The thesis treats control of ideal Controlled Series Capacitors (CSC), TCSC, TSSC/TSSR, and DPFC. The goals of the FACTS controllers which are developed are Power Oscillation Damping (POD), fast power flow control, and transient stability improvement in the power system. New adaptive control strategies for POD and power flow control are proposed and studied in different models of power systems by time-domain simulations. A strategy for transient stability improvement is also proposed and studied. Additionally, different methods for study of Subsynchronous Resonance (SSR), which is associated with series compensation in power systems, are investigated. Here, four of the most common methods for frequency scanning to determine the electrical damping of subsynchronous oscillations in a power grid are studied. The study reveals significant differences of the electrical damping estimates of the studied standard methods when applied to a four-machine test system. / QC 20110819

Submitted by Johnny Rodrigues (johnnyrodrigues@ufcg.edu.br) on 2018-04-04T21:30:07Z No. of bitstreams: 1 DIÓGENES GALDINO GONDIM - DISSERTAÇÃO PPGCC 2014..pdf: 1586466 bytes, checksum: 3b6e47836d1098cd946a0d8486669b23 (MD5) / Made available in DSpace on 2018-04-04T21:30:07Z (GMT). No. of bitstreams: 1 DIÓGENES GALDINO GONDIM - DISSERTAÇÃO PPGCC 2014..pdf: 1586466 bytes, checksum: 3b6e47836d1098cd946a0d8486669b23 (MD5) Previous issue date: 2014-08-04 / A maioria dos sistemas operacionais oferecem suas próprias estratégias de gerenciamento de energia, mas é muito difícil modificar ou ampliar as políticas de energia sem acesso ao código fonte. Várias arquiteturas em gerenciamento dinâmico de energia já foram propostas na literatura, mas elas não são integradas com o sistema operacional subjacente. Neste trabalho, é proposto um arcabouço de software para o desenvolvimento de aplicações gerenciadoras de energia ao nível de usuário, com a flexibilidade arquitetural de se adaptar a diferentes políticas e de se integrar às políticas de gerenciamento do sistema operacional. Para validar o arcabouço, é descrito um estudo de caso mostrando sua viabilidade, demonstrando que a aplicação resultante oferece redução no consumo de energia. / Most operating systems implement their own power management techniques, but it is hard to modify or hack their power policies without the source code. Many dynamic power management architectures have been proposed in the literature, but they are not integrated with the underlying OS power manager. In this work, we proposed a software framework for user-level power management, with a flexible architecture to be adapted to different policies and integrated with OS power managers and validated its feasibility with a case study.

L’accroissement du champ d’application et de la performance des microcontrôleurs s’accompagne d’une augmentation de la puissance consommée limitant l’autonomie des systèmes nomades (smartphones, tablettes, ordinateurs portables, implants biomédicaux, …). L’étude menée dans le cadre de la thèse, consiste à réduire la consommation dynamique des circuits fabriqués en technologie CMOS 80 nm avec mémoire non-volatile embarquée (e-NVM) ; à travers l’amélioration des performances des transistors MOS. Pour augmenter la mobilité des porteurs de charge, des techniques de fabrication utilisées dans les nœuds les plus avancés (40 nm, 32 nm) sont d’abord étudiées en fonction de différents critères (intégration, coût, gain en courant/performance). Celles sélectionnées sont ensuite optimisées et adaptées pour être embarquées sur une plate-forme e-NVM 80 nm. L’étape suivante est d’étudier comment transformer le gain en courant, en gain sur la consommation dynamique, sans dégrader la consommation statique. Les approches utilisées ont été de réduire la tension d’alimentation et la largeur des transistors. Un gain en consommation dynamique supérieur à 20 % est démontré sur des oscillateurs en anneau et sur un circuit numérique conçu avec près de 20 000 cellules logiques. La méthodologie appliquée sur le circuit a permis de réduire automatiquement la taille des transistors (évitant ainsi une étape de conception supplémentaire). Enfin, une dernière étude consiste à optimiser la consommation, les performances et la surface des cellules logiques à travers des améliorations de conception et une solution permettant de réduire l’impact de la contrainte induite par l’oxyde STI. / The increase of the scope of application and the performance of microcontrollers is accompanied by an increase in power consumption reducing the life-time of mobile systems (smartphones, tablets, laptops, biomedical implants, …). Here, the work consists of reducing the dynamic consumption of circuits manufactured in embedded non-volatile memories (e-NVM) CMOS 80 nm technology by improving the performance of MOS transistors. In order to increase the carriers’ mobility, manufacturing techniques used in the most advanced technological nodes (40 nm, 32 nm) are firstly studied according to different criteria (process integration, cost, current/performance gain). Then, selected techniques are optimized and adapted to be used on an e-NVM technological platform. The next step is to study how to transform the current gain into dynamic power gain without impacting the static consumption. To do so, the supply voltage and the transistor widths are reduced. Up to 20 % in dynamic current gain is demonstrated using ring oscillators and a digital circuit designed with 20,000 standard cells. The methodology applied on the circuit allows automatic reduction to all transistor widths without additional design modifications. Finally, a last study is performed in order to optimize the consumption, the performance and the area of digital standard cells through design improvements and by reducing the mechanical stress of STI oxide.

In this thesis, controllers for power oscillation damping, transient stability improvement and power flow control by means of a Controlled Series Compensator (CSC) and and a Dynamic Power Flow Controller (DPFC) are proposed. These devices belong to the group of power system components referred to as Flexible AC Transmission System (FACTS) devices. The developed controllers use only quantities measured locally at the FACTS device as inputs, thereby avoiding the risk of interrupted communications associated with the use of remote signals for control. For power systems with one dominating, poorly damped inter-area power oscillation mode, it is shown that a simple generic system model can be used as a basis for damping- and power flow control design. The model for control of CSC includes two synchronous machine models representing the two grid areas participating in the oscillation and three reactance variables, representing the interconnecting transmission lines and the FACTS device. The model for control of DPFC is of the same type but it also includes the phase shift of the internal phase-shifting transformer of the DPFC. The key parameters of the generic grid models are adaptively set during the controller operation by estimation from the step responses in the FACTS line power to the changes in the line series reactance inserted by the FACTS device. The power oscillation damping controller is based on a time-discrete, non-linear approach which aims to damp the power oscillations and set the desired power flow on the FACTS line by means of two step changes in the line reactance separated in time by half an oscillation cycle. A verification of the proposed controllers was done by means of digital simulations using power system models of different complexities. The CSC and DPFC controllers were shown to significantly improve the small-signal- and transient stability in one four-machine system of a type commonly used to study inter-area oscillations. The CSC controller was also tested for 18 different contingencies in a 23-machine system, resulting in an improvement in both the system transient stability and the damping of the critical oscillation mode. / QC 20101112

This term project deals with the problem of scheduling real-time tasks in overload conditions and techniques for lowering power consumption. Each of these parts features mechanisms and reasons for their using. There are also described specific algorithms, that are implemented, in operating system uC/OS-II, and compared in next phase of master's thesis.

Multi functional health monitoring wearable devices are quite prominent these days. Usually these devices are battery-operated and consequently are limited by their battery life (from few hours to a few weeks depending on the application). Of late, it was realized that these devices, which are currently being operated at fixed voltage and frequency, are capable of operating at multiple voltages and frequencies. By switching these voltages and frequencies to lower values based upon power requirements, these devices can achieve tremendous benefits in the form of energy savings. Dynamic Voltage and Frequency Scaling (DVFS) techniques have proven to be handy in this situation for an efficient trade-off between energy and timely behavior. Within imec, wearable devices make use of the indigenously developed MUSEIC v2 (Multi Sensor Integrated circuit version 2.0). This system is optimized for efficient and accurate collection, processing, and transfer of data from multiple (health) sensors. MUSEIC v2 has limited means in controlling the voltage and frequency dynamically. In this thesis we explore how traditional DVFS techniques can be applied to the MUSEIC v2. Experiments were conducted to find out the optimum power modes to efficiently operate and also to scale up-down the supply voltage and frequency. Considering the overhead caused when switching voltage and frequency, transition analysis was also done. Real-time and non real-time benchmarks were implemented based on these techniques and their performance results were obtained and analyzed. In this process, several state of the art scheduling algorithms and scaling techniques were reviewed in identifying a suitable technique. Using our proposed scaling technique implementation, we have achieved 86.95% power reduction in average, in contrast to the conventional way of the MUSEIC v2 chip’s processor operating at a fixed voltage and frequency. Techniques that include light sleep and deep sleep mode were also studied and implemented, which tested the system’s capability in accommodating Dynamic Power Management (DPM) techniques that can achieve greater benefits. A novel approach for implementing the deep sleep mechanism was also proposed and found that it can obtain up to 71.54% power savings, when compared to a traditional way of executing deep sleep mode. / Nuförtiden så har multifunktionella bärbara hälsoenheter fått en betydande roll. Dessa enheter drivs vanligtvis av batterier och är därför begränsade av batteritiden (från ett par timmar till ett par veckor beroende på tillämpningen). På senaste tiden har det framkommit att dessa enheter som används vid en fast spänning och frekvens kan användas vid flera spänningar och frekvenser. Genom att byta till lägre spänning och frekvens på grund av effektbehov så kan enheterna få enorma fördelar när det kommer till energibesparing. Dynamisk skalning av spänning och frekvens-tekniker (såkallad Dynamic Voltage and Frequency Scaling, DVFS) har visat sig vara användbara i detta sammanhang för en effektiv avvägning mellan energi och beteende. Hos Imec så använder sig bärbara enheter av den internt utvecklade MUSEIC v2 (Multi Sensor Integrated circuit version 2.0). Systemet är optimerat för effektiv och korrekt insamling, bearbetning och överföring av data från flera (hälso) sensorer. MUSEIC v2 har begränsad möjlighet att styra spänningen och frekvensen dynamiskt. I detta examensarbete undersöker vi hur traditionella DVFS-tekniker kan appliceras på MUSEIC v2. Experiment utfördes för att ta reda på de optimala effektlägena och för att effektivt kunna styra och även skala upp matningsspänningen och frekvensen. Eftersom att ”overhead” skapades vid växling av spänning och frekvens gjordes också en övergångsanalys. Realtidsoch icke-realtidskalkyler genomfördes baserat på dessa tekniker och resultaten sammanställdes och analyserades. I denna process granskades flera toppmoderna schemaläggningsalgoritmer och skalningstekniker för att hitta en lämplig teknik. Genom att använda vår föreslagna skalningsteknikimplementering har vi uppnått 86,95% effektreduktion i jämförelse med det konventionella sättet att MUSEIC v2-chipets processor arbetar med en fast spänning och frekvens. Tekniker som inkluderar lätt sömn och djupt sömnläge studerades och implementerades, vilket testade systemets förmåga att tillgodose DPM-tekniker (Dynamic Power Management) som kan uppnå ännu större fördelar. En ny metod för att genomföra den djupa sömnmekanismen föreslogs också och enligt erhållna resultat så kan den ge upp till 71,54% lägre energiförbrukning jämfört med det traditionella sättet att implementera djupt sömnläge.