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Frequency dividers design for multi-GHz PLL systemsBarale, Francesco 16 June 2008 (has links)
In this work, a programmable frequency divider suitable for millimeter wave
phase-lock loops is presented. The frequency divider has been implemented in a
90 nm standard CMOS technology. To the extent of maximizing the operative input
frequency, the higher frequency digital blocks of the frequency divider have been
realized using dynamic precharge-evaluation logic. Moreover, a non-conventional
method to implement non-power-of-2 division ratios has been used for the higher
frequency divider stages (input stages).
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Submicron CMOS components for PLL-based frequency synthesis /Ahmed, Syed Irfan, January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2002. / Includes bibliographical references (p. 215-223). Also available in electronic format on the Internet.
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A 20-GHz bipolar varactor-tuned VCO using switched capacitors to add tuning range /Stewart, Malcolm D., January 1900 (has links)
Thesis (M. App. Sc.)--Carleton University, 2003. / Includes bibliographical references (p. 140-143). Also available in electronic format on the Internet.
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A multi-functional digital receiver with adaptive filtering and bit synchronization /Powell, Stephen, January 1900 (has links)
Thesis (M. App. Sc.)--Carleton University, 2003. / Includes bibliographical references (p. 94-96). Also available in electronic format on the Internet.
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A multi-band voltage-controlled ring oscillator /Milicevic, Sinisa, January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2005. / Includes bibliographical references (p. 151-152). Also available in electronic format on the Internet.
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A fully differential CMOS charge pump and VOC at high frequency /Chiu, James. January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2005. / Includes bibliographical references (p. 81-82). Also available in electronic format on the Internet.
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Quantization noise reduction in PLLs using multiphase VCOs /Miletic, Igor, January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2005. / Includes bibliographical references (p. 130-137). Also available in electronic format on the Internet.
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A 5.8mW fully integrated multi-gigahertz frequency synthesizer in 0.13-um CMOS /Karam, Vincent, January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2006. / Includes bibliographical references (p. 54). Also available in electronic format on the Internet.
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A 0.18 um CMOS half-rate clock and data recovery circuit with reference-less dual loop /Huang, Wenjie. January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2006. / Includes bibliographical references (p. 70-71). Also available in electronic format on the Internet.
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High-speed CMOS dual-modulus presalers for frequency synthesis /Desikachari, Ranganathan. January 1900 (has links)
Thesis (M.S.)--Oregon State University, 2004. / Typescript (photocopy). Includes bibliographical references (leaves 61-63). Also available on the World Wide Web.
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