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Low temperature metal-based micro fabrication and packaging technology /Ma, Wei. January 2005 (has links)
Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2005. / Includes bibliographical references. Also available in electronic version.
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A thermal analysis tool for three-dimensional models of multilayer microelectronicsCreel, Kenneth E. 04 May 2010 (has links)
This work details a computer-based modeling tool for predicting temperatures in three-dimensional multilayer microelectronic packages. It is capable of modeling surface connections (e.g., wire bonds and pins), edge connections (e.g., leads), and thermal vias. A three-dimensional control-volume finite difference method is used, permitting transient as well as steady solutions. Numerical behavior is examined with respect to the device geometry and external environment. The features of this tool are demonstrated on a sample multilayer package. The effects of the modeling scheme are discussed.
An alternate version of the program removes a layer from the numerical model to simplify the solution of the problem. To compensate for the removal of the layer a contact resistance is added. This replaces the thermal resistance the removed layer provided in the z-direction. The x-y conductivity of the adjacent layers are modified based on the removed layer thickness and conductivity. This measure imitates the spreading resistance or conductance that the removed layer provided. The effect of removing a layer in the model is studied, documenting the relationship between layer thickness and conductivity and the error introduced by removing the layer. A simple relationship is sought which can indicate the instances in which the computer model can be simplified. The results are applicable to any method including finite element and series-analytical methods. / Master of Science
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Synthesis of tin, silver and their alloy nanoparticles for lead-free interconnect applicationsJiang, Hongjin 26 March 2008 (has links)
This thesis is devoted to the research and development of low processing temperature lead-free interconnect materials for microelectronic packaging applications with an emphasis on fundamental studies of nanoparticles synthesis, dispersion and oxidation prevention, and nanocomposites fabrication.
Oxide-free tin (Sn), tin/silver (96.5Sn3.5Ag) and tin/silver/copper (96.5Sn3.0Ag0.5Cu) alloy nanoparticles with different sizes were synthesized by a low temperature chemical reduction method. Both size dependent melting point and latent heat of fusion of the synthesized nanoparticles were obtained. The nano lead-free solder pastes/composites created by dispersing the SnAg or SnAgCu alloy nanoparticles into an acidic type flux spread and wet on the cleaned copper surface at 220 to 230 ¡æ. This study demonstrated the feasibility of nano sized SnAg or SnAgCu alloy particle pastes for low processing temperature lead-free interconnect applications in microelectronic packaging.
Surface functionalized silver nanoparticles and silver fakes were used as fillers for electrically conductive adhesives (ECAs) applications. During the curing of epoxy resin (150 ¡æ), the surfactants were debonded from the particles and at the same time the oxide layers on the particle surfaces were removed which facilitated the sintering of Ag nanoparticles. The contact interfaces between fillers were significantly reduced and an ultra highly conductive ECA with a resistivity of 5 ¡Á 10-6 ohm.cm was obtained.
To enhance the adhesion of carbon nanotube (CNT) films to substrates, an ultra highly conductive ECA were used as a media to transfer the CNT films to copper substrates. The polymer wetted along the CNTs during curing process by the capillary force. An ohmic contact was formed between the copper substrates and the transferred CNTs. This process could overcome the serious obstacles of integration of CNTs into integrated circuits and microelectronic device packages by offering low processing temperatures and improved adhesion of CNTs to substrates. The transferred CNTs can be used to simultaneously form electrical and mechanical connections between chips and substrates.
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Electromigration analysis of high current carrying adhesive-based copper-to-copper interconnectionsKhan, Sadia Arefin 05 July 2012 (has links)
"More Than Moore's Law" is the driving principle for the electronic packaging industry. This principle focuses on system integration instead of transistor density in order to achieve faster, thinner, and smarter electronic devices at a low cost. A core area of electronics packaging is interconnection technology, which enables ultra-miniaturization and high functional density. Solder bump technology is one of the original, and most common interconnection methods for flip chips. With growing demand for finer pitch and higher number of I/Os, solder bumps have been forced to smaller dimensions and therefore, are subjected to higher current densities. However, the technology is now reaching its fundamental limitations in terms of pitch, processability, and current-handling due to electromigration. Electromigration in solder bumps is one of the major causes of device failures. It is accelerated by many factors, one of which is current crowding. Current crowding is the non-uniform distribution of current at the interface of the solder bump and under-bump metallurgy, resulting in an increase in local current density and temperature. These factors, along with the formation of intermetallic compounds, can lead to voiding and ultimately failure. Electromigration in solder bumps has prevented pitch-scaling below 180-210 microns, producing a shift in the packaging industry to other interconnection approaches, specifically copper pillars with solder. This research aims to explore the electromigration resistance of an adhesive-based copper-to-copper (Cu-Cu) interconnection method without solder, which is thermo-compression bonded at a low temperature of 180C. While solder bumps are more susceptible to electromigration, Cu is capable of handling two orders of magnitude higher current density. This makes it an ideal candidate for next generation flip chip interconnections.
Using finite element analysis, the current crowding and joule heating effects were evaluated for a 30 micron diameter Cu-Cu interconnection in comparison with two existing flip chip interconnection techniques, Cu pillar with solder and Pb-free solder. A test vehicle (TV) was fabricated for experimental analysis with 760 bumps arranged in an area-array format with a bump diameter of 30 micron. Thermo-mechanical reliability of the test vehicle was validated under thermal cycling from -55C to 125C. The Cu-Cu interconnections were then subjected to high current and temperature stress from 1E4 to 1E6 amps per square centimeter at a temperature of 130C. The results establish the high thermo-mechanical reliability and high electromigration resistance of the proposed Cu-Cu interconnection technology.
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All-copper chip-to-substrate interconnections for flip-chip packagesLightsey, Charles Hunter 09 July 2010 (has links)
Avatrel 8000P's excellent photo-definition properties and mechanical strength make it an ideal polymer collar material. Avatrel 8000P is a high contrast, I-line sensitive mixture that can be developed in traditional aqueous-base developers. The great photolithographical performance of this photopolymer can be partly contributed to the minimal amount of light absorbed by the base norbornene polymer. The processing conditions noted in this work are an optimized version, which have been shown to give superior photolithographical performance. The simple baking procedures make Avatrel 8000P easier to process than SU-8. The ability to develop Avatrel 8000P in aqueous base can reduce chemical waste. As shown by SEM images, high fidelity structures with aspect ratios of 7:1 can be fabricated in thick films with vertical sidewalls. Bonding between two copper surfaces over various gap sizes was achieved by electroless deposition without the addition of surfactants or inhibitors in the bath. The effect of anneal temperature on the electroless bond formed was analyzed. The electroless bond strength increased with anneal temperature. However, the bond strength estimation for samples annealed at 80°C to 120°C is a minimum value due to the failure location of most of the pillars and the resulting area used in the calculation of bond strength. Grain growth from copper recrystallization and removal of small defects improve the bond strength. Large voids at the interface of the two pillars were related to rough starting surfaces for the electroplated pillars.
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Fast methods for full-wave electromagnetic simulations of integrated circuit package modulesTerizhandur Varadharajan, Narayanan 25 April 2011 (has links)
Fast methods for the electromagnetic simulation of integrated circuit (IC) package modules through model order reduction are demonstrated. The 3D integration of multiple functional IC chip/package modules on a single platform gives rise to geometrically complex structures with strong electromagnetic phenomena. This motivates our work on a fast full-wave solution for the analysis of such modules, thus contributing to the reduction in design cycle time without loss of accuracy. Traditionally, fast design approaches consider only approximate electromagnetic effects, giving rise to lumped-circuit models, and therefore may fail to accurately capture the signal integrity, power integrity, and electromagnetic interference effects.
As part of this research, a second order frequency domain full-wave susceptance element equivalent circuit (SEEC) model will be extracted from a given structural layout. The model so obtained is suitably reduced using model order reduction techniques. As part of this effort, algorithms are developed to produce stable and passive reduced models of the original system, enabling fast frequency sweep analysis. Two distinct projection-based second order model reduction approaches will be considered: 1) matching moments, and 2) matching Laguerre coefficients, of the original system's transfer function. Further, the selection of multiple frequency shifts in these schemes to produce a globally representative model is also studied. Use of a second level preconditioned Krylov subspace process allows for a memory-efficient way to address large size problems.
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Development of microwave and millimeter-wave pin grid array and ball grid array packagesLiang, Hongwei 12 1900 (has links)
No description available.
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Study of thermo-mechanical reliability of area-array packagesHanna, Carlton Eissey 08 1900 (has links)
No description available.
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Analytical and experimental analysis of heat transfer from current microelectronics package designsRay, Atris A., III 12 1900 (has links)
No description available.
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Design, synthesis, and characterization of novel, low dielectric, photodefinable polymersRomeo, Michael Joseph 08 July 2008 (has links)
Polymers play an integral part in the semiconductor electronic industry. Due to the expanding diversity of a polymer s structural design and the resulting properties, different polymers serve as different components in the makeup and fabrication of the electronic package. The limiting factor in computer processing speed shifts from the transistors gate delay to the interconnect delay below a circuit line width of 1.8 μm for interlayer dielectrics. Silicon dioxide has been used as the insulating layer between metal lines for many computer chip generations. Low dielectric constant polymers will need to supplant silicon dioxide as interlayer dielectrics in order to develop reliable circuits for future generations. Along with serving as interlayer dielectrics, low dielectric constant polymers are also incorporated in first and second level electronic packaging.
Deposition and patterning of these polymers can be significantly reduced by using photodefinable polymers. Most photodefinable polymers are in a precursor form for exposure and development in order to dissolve in industrial developers. Once developed, the polymer precursors are cured to produce the final polymer structure. This temperature is as high as 350 oC for many polymers. Thermal curing sets limitations on the use of the polymer in the electronics industry because of either the unwanted stress produced or the incompatibility of other electronic components that do not survive the thermal cure.
In addition to a low dielectric constant and photodefinability, many other properties are needed for successful implementation. Polymers must be soluble in organic solvents in order to spin coat films. Water absorption increases the dielectric constant of the patterned films and can lead to various adhesion problems and cause delamination of the film. Mismatches between the coefficients of thermal expansion in adjacent layers can produce residual film stresses which leads to warping of the substrate or interfacial delamination. The glass transition temperature must be high because the thermal expansion is greatly increased when the glass transition temperature is exceeded. A high Young s modulus is also required to withstand external forces from thermal, electrical, and packaging stresses.
The goal of this research was to develop novel, low dielectric, photodefinable polymers that can be processed at low temperatures. All polymers discussed will contain one of two monomers with hexafluoroalcohol (HFA) functional groups. Fluorine provides many properties that are advantageous for low dielectric applications whereas alcohols absorb water and increase the dielectric constant. Characterization of the polymers show the effect the fluorine has on the alcohol s high water absorption. All polymers will be synthesized by condensation polymerization of a diamine with a dianhydride or diacid chloride. All other polymers will contain a novel HFA diamine. A new thermoplastic polymer structure based on the cyclization of an HFA situated ortho to an amide linkage produces a benzoxazine ring in the polymer backbone. Cyclization to form polybenzoxazines occurs at temperatures considerably lower than that needed to form polyimides. The lowest processing temperatures are achieved with protection of the HFA that can be cleaved with a photoacid generator.
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