Submitted by Caroline Xavier (caroline.xavier@pucrs.br) on 2017-09-11T13:09:26Z No. of bitstreams: 1 DIS_GUILHERME_CARDOSO_MEDEIROS_COMPLETO.pdf: 10767866 bytes, checksum: f8ce0a0593916dec149c9417c21ff36e (MD5) / Made available in DSpace on 2017-09-11T13:09:26Z (GMT). No. of bitstreams: 1 DIS_GUILHERME_CARDOSO_MEDEIROS_COMPLETO.pdf: 10767866 bytes, checksum: f8ce0a0593916dec149c9417c21ff36e (MD5) Previous issue date: 2017-08-17 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior - CAPES / Miniaturiza??o tem sido adotada como o principal objetivo da ind?stria de Circuitos Integrados (CIs) nos ?ltimos anos, uma vez que agrega muitos benef?cios tais como desempenho, maior densidade, e baixo consumo de energia. Junto com a miniaturiza??o da tecnologia CMOS, o aumento na quantidade de dados a serem armazenados no chip causaram a amplia??o do espa?o ocupado por mem?rias do tipo Static Random-Access Memory (SRAM) em System-on-Chips (SoCs). Tal miniaturiza??o e evolu??o da nanotecnologia proporcionou muitas revolu??es na ind?stria de semicondutores, tornando necess?rio tamb?m a melhoria no processo de fabrica??o de CIs. Devido a sensibilidade causada pela miniaturiza??o e pelas variabilidades de processo de fabrica??o, eventuais defeitos introduzidos durante fabrica??o podem danificar o CI, afetando o n?vel de confiabilidade do CI e causando perdas no rendimento por die fabricado. A miniaturiza??o adotada pela ind?stria de semicondutores impulsionou a pesquisa de novas tecnologias visando a substitui??o de transistores do tipo CMOS. Transistores FinFETs, devido a suas propriedades el?tricas superiores, emergiram como a tecnologia a ser adotada pela ind?stria. Com a fabrica??o de mem?rias utilizando a tecnologia FinFET, surge a preocupa??o com testes de mem?ria, uma vez que modelos de falhas e metodologias de teste utilizados para tecnologias planares podem n?o ser suficientes para detectarem todos os defeitos presented em tecnologias multi-gate. Uma vez que esta nova tecnologia pode ser afetada por novos tipos de falhas, testes que dependem da execu??o de opera??es, m?todos de endere?amento, checagem de padr?es, e outros tipos de condi??es de est?mulo, podem deixar de serem estrat?gias confi?veis para o teste dos mesmos. Neste contexto, este trabalho de mestrado prop?e uma metodologia baseada em hardware para testar mem?rias em FinFET que monitore par?metros do bloco de mem?ria e gere sinais baseados nessas caracter?sticas. Atrav?s do uso de sensores que monitoram os par?metros do circuito (como consumo de corrente, tens?o nas bit lines) e detectam mudan?as dos padr?es monitorados, os sensores criam pulsos que representam essas varia??es. Esses pulsos s?o modulados usando t?cnicas de modula??o. Uma vez que defeitos resistivos alteram os par?metros monitorados, c?lulas afetadas por esses defeitos apresentam diferentes sinais modulados, validando a metodologia proposta e permitindo a detec??o destes defeitos e consequentemente aumentando o yield de fabrica??o e a confiabilidade do circuito ao longo da sua vida. A metodologia baseada em hardware proposta neste trabalho foi implementada utilizando sensores integrados no pr?prio CI, e foi dividida em duas abordagens: monitoramento de consumo de corrente e monitoramento da tens?o nas bit lines. Cada abordagem foi validada com a inje??o de 12 defeitos resistivos de diferentes naturezas e localiza??es, a ap?s validados considerando diferentes temperaturas de opera??o e o impacto da varia??o de processo de fabrica??o. / Miniaturization has been the industry?s main goal over the last few years, as it brings benefits such as high performance and on-chip integration as well as power consumption reduction. Alongside the constant scale-down of Integrated Circuits (ICs) technology, the increasing need to store more and more information has resulted in the fact that Static Random Access Memories (SRAMs) occupy great part of Systems-on-Chip (SoCs). The constant evolution of nanotechnology brought many revolutions to semiconductors, making it also necessary to improve the integrated circuit manufacturing process. Therefore, the use of new, complex processing steps, materials, and technology has become necessary. The technology-shrinking objective adopted by the semiconductor industry promoted research for technologies to replace CMOS transistors. FinFET transistors, due to their superior electrical properties, have emerged as the technology most probably to be adopted by the industry. However, one of the most critical downsides of technology scaling is related to the non-determinism of device?s electrical parameters due to process variation. Miniaturization has led to the development of new types of manufacturing defects that may affect IC reliability and cause yield loss. With the production of FinFET-based memories, there is a concern regarding embedded memory test and repair, because fault models and test algorithms used for memories based on conventional planar technology may not be sufficient to cover all possible defects in multi-gate memories. New faults that are specific to FinFETs may exist, therefore, current test solutions, which rely on operations executing specific patterns and other stressing conditions, may not stand to be reliable tools for investigating those faults. In this context, this work proposes a hardware-based methodology for testing memories implemented using FinFET technology that monitors aspects of the memory array and creates output signals deriving from the behavior of these characteristics. Sensors monitor the circuit?s parameters and upon changes from their idle values, create pulses that represent such variations. These pulses are modulated applying the pulse width modulation techniques. As resistive defects alter current consumption and bit line voltages, cells affected by resistive defects present altered modulated signals, validating the proposed methodology and allowing the detection of these defects. This further allows to increase the yield after manufacturing and circuit reliability during its lifetime. Considering how FinFET technology has evolved and the likelihood that ordinary applications will employ FinFET-based circuits in the future, the development of techniques to ensure circuit reliability has become a major concern. The presented hardware-based methodology, which was implemented using On-Chip Sensors, has been divided in two approaches: monitoring current consumption and monitoring the voltage level of bit lines. Each approach has been validated by injecting a total of 12 resistive defects, and evaluated considering different operation temperatures and the impact of process variation.

Neste trabalho foi desenvolvido um estudo sistemático dos mecanismos de difusão responsáveis pelo switching de resistência em memórias resistivas. Essas memórias possuem estrutura semelhante a de um capacitor, a qual sofre uma transição de resistência induzida pela aplicação de um campo elétrico. A transição é provocada pela formação de filamentos condutivos no interior da matriz semicondutora. Os filamentos podem ser constituídos por metal originado de um dos eletrodos (ECM) ou por regiões do óxido deficientes em oxigênio (VCM), geradas pela difusão de vacâncias de oxigênio. Dispositivos de TiO2 foram construídos e sua resposta elétrica foi adquirida através de medidas elétricas do tipo I-V para diferentes metais de eletrodo. Técnicas de análise por feixe de íons, como retroespalhamento Rutherford por micro-feixe e perfilometria com reação nuclear ressonante, foram usadas para detalhamento dos processos de difusão. Constatou-se uma dependência do comportamento elétrico em função do método de deposição da camada semicondutora, sua espessura e os parâmetros da medida de tensão. No caso do filamento ser composto por átomos de metal, espectros de micro-RBS foram adquiridos para identificar a sua estrutura no interior do óxido. Ainda, observaram-se bolhas na superfície do eletrodo superior dos dispositivos com difusão de vacâncias de oxigênio após o tratamento elétrico. Nesse mesmo contexto, foi medida a difusividade e energia de ativação da difusão de oxigênio em filmes finos de TiOy. / In this work we developed a systematic study of diffusion mechanisms which are responsible for resistance switching in resistive memories. The structure of these memories is similar to a capacitor which suffers resistance transition induced by electrical field. The transition is caused by the formation of conductive filaments inside the semiconductor matrix. The filaments may be constituted by metal from one of the electrodes (ECM) or by oxygen deficient areas (VCM), generated from oxygen vacancies diffusion. Devices of TiO2 have been built and its electrical response was acquired through electrical measurements (I-V) for different electrode metals. Ion beam techniques such as micro-probe Rutherford Backscattering and Nuclear Reaction Profiling were used to detail the diffusion processes. It was observed a dependence in the electrical behaviour with the semiconductor layer deposition method, its thickness and bias measurement parameters. In the case which filaments are composed by metal atoms, measurements of micro-RBS were performed to identify its structure inside the oxide. Also, bubbles have been observed over the surface of top electrode in devices with oxygen vacancies diffusion after the electrical treatment. In this context, it was measured diffusivity and activation energy for oxygen diffusion in thin TiOy films.

abstract: This work investigates the effects of ionizing radiation and displacement damage on the retention of state, DC programming, and neuromorphic pulsed programming of Ag-Ge30Se70 conductive bridging random access memory (CBRAM) devices. The results show that CBRAM devices are susceptible to both environments. An observable degradation in electrical response due to total ionizing dose (TID) is shown during neuromorphic pulsed programming at TID below 1 Mrad using Cobalt-60. DC cycling in a 14 MeV neutron environment showed a collapse of the high resistance state (HRS) and low resistance state (LRS) programming window after a fluence of 4.9x10^{12} n/cm^2, demonstrating the CBRAM can fail in a displacement damage environment. Heavy ion exposure during retention testing and DC cycling, showed that failures to programming occurred at approximately the same threshold, indicating that the failure mechanism for the two types of tests may be the same. The dose received due to ionizing electronic interactions and non-ionizing kinetic interactions, was calculated for each ion species at the fluence of failure. TID values appear to be the most correlated, indicating that TID effects may be the dominate failure mechanism in a combined environment, though it is currently unclear as to how the displacement damage also contributes to the response. An analysis of material effects due to TID has indicated that radiation damage can limit the migration of Ag+ ions. The reduction in ion current density can explain several of the effects observed in CBRAM while in the LRS. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2018

abstract: Deep learning (DL) has proved itself be one of the most important developements till date with far reaching impacts in numerous fields like robotics, computer vision, surveillance, speech processing, machine translation, finance, etc. They are now widely used for countless applications because of their ability to generalize real world data, robustness to noise in previously unseen data and high inference accuracy. With the ability to learn useful features from raw sensor data, deep learning algorithms have out-performed tradinal AI algorithms and pushed the boundaries of what can be achieved with AI. In this work, we demonstrate the power of deep learning by developing a neural network to automatically detect cough instances from audio recorded in un-constrained environments. For this, 24 hours long recordings from 9 dierent patients is collected and carefully labeled by medical personel. A pre-processing algorithm is proposed to convert event based cough dataset to a more informative dataset with start and end of coughs and also introduce data augmentation for regularizing the training procedure. The proposed neural network achieves 92.3% leave-one-out accuracy on data captured in real world. Deep neural networks are composed of multiple layers that are compute/memory intensive. This makes it difficult to execute these algorithms real-time with low power consumption using existing general purpose computers. In this work, we propose hardware accelerators for a traditional AI algorithm based on random forest trees and two representative deep convolutional neural networks (AlexNet and VGG). With the proposed acceleration techniques, ~ 30x performance improvement was achieved compared to CPU for random forest trees. For deep CNNS, we demonstrate that much higher performance can be achieved with architecture space exploration using any optimization algorithms with system level performance and area models for hardware primitives as inputs and goal of minimizing latency with given resource constraints. With this method, ~30GOPs performance was achieved for Stratix V FPGA boards. Hardware acceleration of DL algorithms alone is not always the most ecient way and sucient to achieve desired performance. There is a huge headroom available for performance improvement provided the algorithms are designed keeping in mind the hardware limitations and bottlenecks. This work achieves hardware-software co-optimization for Non-Maximal Suppression (NMS) algorithm. Using the proposed algorithmic changes and hardware architecture With CMOS scaling coming to an end and increasing memory bandwidth bottlenecks, CMOS based system might not scale enough to accommodate requirements of more complicated and deeper neural networks in future. In this work, we explore RRAM crossbars and arrays as compact, high performing and energy efficient alternative to CMOS accelerators for deep learning training and inference. We propose and implement RRAM periphery read and write circuits and achieved ~3000x performance improvement in online dictionary learning compared to CPU. This work also examines the realistic RRAM devices and their non-idealities. We do an in-depth study of the effects of RRAM non-idealities on inference accuracy when a pretrained model is mapped to RRAM based accelerators. To mitigate this issue, we propose Random Sparse Adaptation (RSA), a novel scheme aimed at tuning the model to take care of the faults of the RRAM array on which it is mapped. Our proposed method can achieve inference accuracy much higher than what traditional Read-Verify-Write (R-V-W) method could achieve. RSA can also recover lost inference accuracy 100x ~ 1000x faster compared to R-V-W. Using 32-bit high precision RSA cells, we achieved ~10% higher accuracy using fautly RRAM arrays compared to what can be achieved by mapping a deep network to an 32 level RRAM array with no variations. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2018

Doença renal crônica é uma afecção comum em cães e gatos, especialmente em gatos senis, e importante causa de morbidade e mortalidade. Além da idade avançada, fatores como alterações congênitas, alimentação inadequada, utilização de drogas nefrotóxicas, intoxicações e doenças infecciosas predispõem às lesões do parênquima renal. Em felinos a descrição histopatológica mais frequente é a nefrite tubulointersticial difusa. Independente da causa do dano ao néfron, a doença renal crônica é uma afecção irreversível e geralmente progressiva. Este estudo teve por objetivo realizar uma análise da contribuição da ultrassonografia utilizando-se o modo B e Doppler colorido e pulsado para o diagnóstico e estagiamento da doença renal crônica em 45 felinos. Sendo 16 do grupo controle, felinos que não portavam manifestações clínicas relacionadas ao sistema urinário, apresentavam concentração sérica de creatinina inferior a 1,6mg/dL; quatro do estágio 1, felinos com taxas de creatinina sérica inferior a 1,6mg/dL com alterações ultrassonográficas; 17 do estágio II, felinos com taxas de creatinina 1,6 a 2,8mg/dL; oito do estágio III / IV, felinos com taxa de creatinina sérica de 2,9 a 5,0mg/dL agrupados aos felinos com taxa de creatinina sérica acima de 5,0mg/dL. Os rins foram avaliados ultrassonograficamente por meio das características: ecogenicidade da cortical, regularidade de contorno e definição corticomedular no modo B; comprimento, largura e altura nos cortes longitudinal, transversal e dorsal no modo B; preenchimento das artérias interlobares, arqueadas e interlobulares por meio do Doppler colorido; e índice de resistividade dos vasos intrarenais por meio do Doppler pulsado. Foi determinada a relação comprimento do rim pelo diâmetro luminal da aorta nos felinos normais e nefropatas. Conclui-se que o aumento da ecogenicidade da cortical demonstrou-se uma característica relevante a ser considerada na avaliação ultrassonográfica da doença renal crônica. O Doppler colorido mostrou-se uma ferramenta importante no diagnóstico da doença renal crônica, especialmente quando as alterações detectadas à avaliação ultrassonográfica pelo modo B não eram expressivas. O índice de resistividade não se apresentou acima do limite da normalidade nos estágios iniciais da doença renal crônica, sugerindo não ser útil como preditor da nefropatia crônica. As alterações na avaliação ultrassonográfica modo B associadas ao aumento do índice de resistividade podem indicar um pior prognóstico da evolução da doença renal crônica. Achados ultrassonográficos como ecogenicidade da cortical aumentada, irregularidade de contorno, indefinição corticomedular, diminuição do preenchimento vascular pelo Doppler colorido e aumento do índice de resistividade são elementos importantes a serem considerados no estabelecimento do diagnostico da doença renal crônica em felinos. / Chronic kidney disease is common in dogs and cats, especially in older cats, and an important cause of morbidity and mortality. Factors like advanced age, congenital alterations, inappropriate nutrition, use of nephrotoxic drugs, intoxications and infectious disease may lead to parenchymal lesions in kidney. The most frequent histopathologic change in cats is diffuse tubulointertitial nephritis. Independent of the cause of the nephron damage, the chronic renal disease is an irreversible and usually progressive affection. This study aim to analyze the contribution of ultrasography in the diagnosis and staging of chronic kidney diseases using B mode, color Doppler and spectral Doppler. Sixteen presenting no manifestation of urinary disease and serum creatinine levels less than 1,6mg/dL served at control group; four cats represented stage I, with serum creatinine levels less than 1,6mg/dL and ultrasonographic changes; 17 cats represented stage II, with serum creatinine levels between 1,6 and 2,8mg/dL; eight cats represented stage III/IV, with serum creatinine levels between 2,9 e 5,0mg/dL, grouped with the felines with serum creatinine levels above 5,0mg/dL. The kidneys underwent an ultrasonographic examination observing: cortical echogenicity, regularity of the contour and corticomedullary definition in the B mode; length, width and height in the longitudinal, transverse and dorsal planes in the B mode; filling of the interlobars, arcuate and interlobulars arteries by the color Doppler; and resistive index of the intrarenal vessels using the pulsed Doppler. The ratio between the length of the kidney and the luminal diameter of the aorta in normal felines and in felines with kidney disease was established. The increase in echogenicity of the cortex showed to be a relevant characteristic to be considered in the ultrasonographic evaluation of chronic kidney disease. The color Doppler showed to be an important tool in the diagnosis of the chronic kidney disease, especially when the alterations in the B mode werent expressive. The resistive index did not present itself above of the normal limits in the initial stages of the chronic kidney disease, suggesting its uselessness as a predictor of the chronic kidney disease. Changes in B mode associated with increase in resistive index may indicate a poor prognostics of the chronic kidney disease. Increase in the echogenicity of the cortical, contour irregularity, corticomedullary indefinition, reduced vascular filling detected by color Doppler and the increase in the resistive index were important elements to be considered in the diagnosis of the chronic kidney disease.

Cette thèse présente mon travail de recherche accompli depuis 2010 pour développer les détecteurs Micromegas du spectromètre CLAS12 qui sera installé dans le hall B du laboratoire Jefferson aux Etats-Unis. Les Micromegas sont des détecteurs gazeux robustes, rapides et bon marché. Ils doivent cependant être adaptés à l'environnement spécifique de CLAS12 car les défis sont nombreux : présence d'un champ magnétique fort, éloignement de l'électronique, fonctionnement avec un taux de hadrons élevé, nécessité de courber les détecteurs, espace disponible restreint. Ma thèse a commencé par des tests de détecteurs en faisceau au CERN qui ont permis d'estimer que le taux de décharges dans les Micromegas de CLAS12 serait de quelques Hertz. Une part importante de ce document est ainsi consacrée à l'étude de plusieurs méthodes innovantes dont l'objectif est de minimiser le temps mort dû aux décharges. J'ai donc mené des tests intensifs portant sur l'optimisation du filtre haute tension de la microgrille, l'introduction d'une feuille de GEM dans un Micromegas ou encore l'utilisation de Micromegas dits résistifs. Ces derniers donnant d'excellents résultats, des prototypes à l'échelle 1, dont l'un fabriqué par un industriel, ont été testés. La mécanique et le point de fonctionnement (gaz, tensions, géométrie...) des détecteurs ont ensuite été validés par des tests en laboratoire. Toutefois, afin de s'assurer un meilleur rapport signal sur bruit, des optimisations de la microgrille du détecteur ont été menées. Le CEA Saclay étant également responsable du développement de l'électronique des Micromegas pour CLAS12, j'ai comparé ses performances avec une autre électronique, vérifier sa résolution temporelle et déterminer le rapport signal sur bruit lorsque des limandes de 2 m connectent le détecteur à l'électronique. Les progrès réalisés dans le cadre de CLAS12 ont par ailleurs initié d'autres projets. J'ai ainsi effectué des simulations basées sur des pseudo-données pour valider la faisabilité d'une expérience portant sur les mésons exotiques pour laquelle nous avons proposé un trajectographe composé de Micromegas. / This thesis presents my work performed since 2010 to develop Micromegas detectors for the CLAS12 spectrometer that will be installed in the Hall B of Jefferson Laboratory (USA). The Micromegas are robust, fast and cheap gaseous detectors. Nevertheless, they must be adapted to the specific CLAS12 environment as there are many challenges to face : presence of a strong magnetic field, off-detector frontend electronics, high hadrons rate, necessity to curve the detectors, few space available. My PhD started by beam tests at CERN that allowed to evaluate the spark rate in CLAS12 Micromegas at a few Hertz. An important part of this document is therefore devoted to the study of several innovative methods to minimize the dead time induced by sparks. Thus, I have performed intensive tests on the optimization of the micromesh high voltage filter, with on Micromegas equipped with a GEM foild or on resistive Micromegas. The latter giving excellent results, full scale prototypes, one of which built by a company, have been tested. The mechanics and the working point (gas, voltages, geometry...) of the detectors have then be validated by laboratory tests. However, to ensure a better signal over noise ratio, the micromesh has been optimized. The CEA Saclay being also responsible for the development of the electronics for CLAS12 Micromegas, I have compared its performance with another electronics, verify its time resolution and determine the signal over noise ratio when 2 m long cables are connecting the electronics to the detector. The progress realized in the context of CLAS12 have furthermore triggered other projects. So, I have carried out simulations based on pseudo-data to validate the feasibility of a meson spectroscopy experiment for which we have proposed a Micromegas based tracker.

Thesis (MSc. (Physics)) --University of Limpopo, 2015 / This study investigated the extent to which learners from rural and peri-urban areas understand what the symbols represent and their roles in simple direct current resistive electrical circuits. The emphasis was on simple direct current resistive electrical circuits that consist of batteries and bulbs. The study was carried out with Grade 12 learners at high school level in the Limpopo Provincial Department of Education. It used both qualitative and quantitative data collection methods to investigate learners’ understanding of direct current resistive electrical circuits at rural and peri-urban schools. It used questionnaires and structured interviews to collect the data so that the results could provide in-depth understanding and generalizability. The results revealed that learners knew the symbols used in direct current resistive circuits, however, when the circuit was populated with a number of known symbols it became complex to such an extent that some learners struggled to identify the symbols. As it appeared, learners could not conceptualize the role played by a battery, conductor, ammeter and voltmeter in direct current resistive electrical circuit. In addition, the study also revealed that learners experience difficulties when translating a real circuit to a schematic circuit. This study suggests that deeper focus has to be directed towards developing leaners’ understanding of the working and role played by each symbol in a schematic circuit. Learners were operating at far lower conceptual basis and thought of conductor as a hollow pipe like material. Results were also compared in terms of geographical location of the school, and findings indicate that the rural school was performing better than peri-urban school. The results highlight a number of the frequently encountered alternative frameworks which learners come across when they are faced with schematic circuit diagrams. Most of the alternative frameworks found are well documented in literature (for example current consumption, difficulty with understanding electric concepts, difficulty with concept differentiation, and no firm alternative frameworks). vi The participants in this study were not exposed to practical work. This suggests the results might be different with learners exposed to practical work. It is therefore recommended that future studies look at the understanding of the role played by individual electrical components with learners who had practical experience with real electrical circuits. Majority of learners in this study could not communicate their scientific conclusions using English, as the English is their second language.

<p>An active optical shutter for infrared light (3-5 μm) has been designed, exploiting the phase transition in thermochromic vanadium dioxide (VO₂). A spin coating processing route for VO₂ films has been adapted to manufacture reproducible depositions onto sapphire (Al₂O₃) substrates. The VO₂ films have been characterized by X-ray powder diffraction (XRPD) and infrared spectroscopy (FTIR), showing 55 % transmittance in the open mode and 0.1 % in the closed mode.</p><p>The VO₂ film temperature determines the operating mode of the shutter, and a resistive circuit of gold was deposited on top of the film for heating purposes. Switching times from the open to the closed mode down to 15 ms have been measured.</p><p>This work is a part of a comprehensive project at the Swedish Defence Research Agency (FOI), aiming to improve active components for protection against lasers. The shutter within this work is at this stage an early prototype, and needs further development and complementary systems such as a control unit to be implemented in an optical system.</p>

Two experimental projects involving perovskite manganese oxide compounds are presented. The first involved dielectric and transport studies of the insulator-metal transition as a function of charge-carrier doping in La1-xCaxMnO3 (0 < x < 0.15) bulk samples. The results provide new insight into the role of competing magnetic, lattice and Coulomb energies in determining the insulator-metal transition near x=0.22. The second project involved the growth, structural characterization, and resistive anisotropy of a-axis oriented Nd0.2Sr0.8MnO3 thin films with thicknesses t in the range 10 nm< t < 150 nm. Thicker films develop regular crack arrays which are the origin of a highly anisotropic in-plane electrical resistance. These cracks form parallel to the crystallographic c-axis on films with tensile strain deposited on NdGaO3 (100) and La0.3Sr0.7Al0.65Ta0.35O3 (110) substrates. Films grown under compressive strain on LaAlO3 (110) substrates have no cracks.

Silicon oxide (SiO x 1 ∠ x [∠, double =]2) has long been used and considered as a passive and insulating component in the construction of electronic devices. In contrast, here the active role of SiO x in constructing a type of resistive switching memory is studied. From electrode-independent electrical behaviors to the visualization of the conducting filament inside the SiO x matrix, the intrinsic switching picture in SiO x is gradually revealed. The thesis starts with the introduction of some similar phenomenological switching behaviors in different electronic structures (Chapter 1), and then generalizes the electrode-material-independent electrical behaviors on SiO x substrates, providing indirect evidence to the intrinsic SiO x switching (Chapter 2). From planar nanogap systems to vertical sandwiched structures, Chapter 3 further discusses the switching behaviors and properties in SiO x . By localization of the switching site, the conducting filament in SiO x is visualized under transmission electron microscope using both static and in situ imaging methods (Chapter 4). With the intrinsic conduction and switching in SiO x largely revealed, Chapter 5 discusses its impact and implications to the molecular electronics and nanoelectronics where SiO x is constantly used. As comparison, another type of memory effect in semiconductors (carbon nanotubes) based on charge trapping at the semiconductor/SiO x interface is discussed (Chapter 6).