High performance inductors are playing an increasing role in modern communication systems. Despite the superior performance offered by discrete components, parasitic capacitances from bond pads, board traces and packaging leads reduce the high frequency performance and contribute to the urgency of an integrated solution. Embedded inductors have the potential for significant increase in reliability and performance of the IC. Due to the driving force of CMOS integration and low costs of silicon-based IC fabrication, these inductors lie on a low resistivity silicon substrate, which is a major source of energy loss and limits the frequency response. Therefore, the quality factor of inductors fabricated on silicon continues to be low. The research presented in this thesis investigates amorphous Si and porous Si to improve the resistivity of Si substrates and explores amorphous Si as a structural material for low temperature MEMS fabrication. Planar inductors are built-on undoped amorphous Si in a novel application and a 56% increase in quality factor was measured. Planar inductors are also built-on a porous Si and amorphous Si bilayer and showed 47% improvement. Amorphous Si is also proposed as a low temperature alternative to polysilicon for MEMS devices. Tunable RF MEMS inductors and transformers are fabricated based on an amorphous Si and aluminum bimorph coil that is suspended and warps in a controllable manner. The 3-D displacement is accurately predicted by thermomechanical simulations. The tuning of the devices is achieved by applying a DC voltage and due to joule heating the air gap can be adjusted. A tunable inductor with a 32% tuning range from 5.6 to 8.2 nH and a peak Q of 15 was measured. A transformer with a suspended coil demonstrated a 24% tuning range of the mutual coupling between two stacked windings. The main limitation posed by post-CMOS integration is a strict thermal budget which cannot exceed a critical temperature where impurities can diffuse and materials properties can change. The research carried out in this work accommodates this temperature restriction by limiting the RF fabrication processes to 150°C to facilitate system integration on silicon.

In today’s communication devices, the need for high performance inductors is increasing as they are extensively used in RF integrated circuits (RFICs). This need is even more pronounced for variable inductors as they are widely required in tunable filters, voltage controlled amplifiers (VCO) and low noise amplifiers (LNA). For RFICs, the main tuning elements are solid state varactors that are used in conjunction with invariable inductors. However, they have limited linearity, high resistive losses, and low self resonant frequencies. This emphasizes the need for developing another tuning element that can be fabricated monolithically with ICs and can offer high range of tuning. Due to the ease of CMOS integration and low cost silicon based IC fabrication, the inductors currently used are a major source of energy loss, therefore driving the overall quality factor and performance of the chip down. During the last decade there has been an increase in research in RF MicroelectroMechanical Systems (RF MEMS) to develop high quality on chip tunable RF components. MEMS capacitors were initially proposed to substitute the existing varactors, however they can not be easily integrated on top of CMOS circuits. RF MEMS variable inductors have recently attracted attention as a better alternative. The research presented here explores using porous anodic alumina (PAA) in CMOS and MEMS fabrication. Due to its low cost and low temperature processing, PAA is an excellent candidate for silicon system integration. At first, PAA is explored as an isolation layer between the inductor and the lossy silicon substrate. Simulations show that although the dielectric constant of the PAA is tunable, the stress produced by the required thicker layers is problematic. Nevertheless, the use of PAA as a MEMS material shows much more promise. Tunable RF MEMS inductors based on bimorph sandwich layer of aluminum PAA and aluminum are fabricated and tested. A tuning range of 31% is achieved for an inductance variation of 5.8 nH to 7.6 nH at 3 GHz. To further improve the Q, bimorph layers of gold and PAA are fabricated on Alumina substrates. A lower tuning range is produced; however the quality factor performance is greatly improved. A peak Q of over 30 with a demonstrated 3% tuning range is presented. Depending on the need for either high performance or tunability, two types of tunable RF MEMS inductors are presented. Although PAA shows promise as a mechanical material for MEMS, the processing parameters (mainly stress and loss tangent) need to be improved if used as an isolation layer. To our knowledge, this is the first time this material has been proposed and successfully used as a structural material for MEMS devices and CMOS processes.

Multi-band and multi-mode radios are becoming prevalent and necessary in order to provide optimal data rates across a network with a diverse and spotty landscape of coverage areas (3G, HSPA, LTE, etc.). As the number of required bands and modes increases, the aggregate cost of discrete RF signal chains justi es the adoption of tunable solutions. Tunable fi lters are one of the pieces crucial to signal chain amalgamation. The main requirements for a tunable fi lter are high unloaded quality factor, wide tuning range, high tuning speed, high linearity, and small size. MEMS technology is the most promising in terms of tuning range, quality factor, linearity and size. In addition, a fi lter that maintains a constant passband bandwidth as the center frequency is tuned is preferred since the analog baseband processing circuitry tends to be tailored for a particular signal bandwidth. In this work, a novel design technique for tunable fi lters with controlled and predictable bandwidth variation is presented. The design technique is presented alongside an analysis and modeling method for predicting the final filter response during design optimization. The method is based on the well known coupling matrix model. In order to demonstrate the design and modeling technique, a novel coupling structure for stripline fi lters is presented that results in substantial improvements in coupling bandwidth variation over an octave tuning range when compared to combline and interdigitated coupled line fi lters. In order for a coupled resonator filter to produce an equal ripple Chebyshev response, each resonator of the fi lter must be tuned to precisely the same resonant frequency. Production tuned fi lters are routinely tuned in the lab and production environments by skilled technicians in order to compensate for manufacturing tolerances. However, integrated tunable filters cannot be tuned by traditional means since they are integrated into systems on circuit boards or inside front end modules. A fixed tuning table for all manufactured modules is inadequate since the required tuning accuracy exceeds the tolerance of the tuning elements. In this work, we develop tuning techniques for the automatic in-circuit tuning of tunable filters using scalar transmission measurement. The scalar transmission based techniques obviate the use of directional couplers. Techniques based on both swept and single frequency scalar transmission measurement are developed. The swept frequency technique, based on the Hilbert transform derived relative groupdelay, tunes both couplings and resonant frequencies while the single frequency technique only tunes the center frequency. High performance filters necessitate high resonator quality factors. Although fi lters are traditionally treated as passive devices, tunable fi lters need to be treated as active devices. Tuning elements invariably introduce non-linearities that limit the useful power handling of the tunable fi lter. RF MEMS devices have been a topic of intense research for many years for their promising characteristics of high quality factor and high power handling. Control and reliability issues have resulted in a shift from continuously tunable devices to discretely switched devices. However, fi lter tuning applications require fine resolution and therefore many bits for digital capacitor banks. An analog/digital hybrid tuning approach would enable the tuning range of a switched capacitor bank to be combined with the tuning resolution of an analog tunable capacitor. In this work, a device-level position control mechanism is proposed for piezoresistive feedback of device capacitance over the device's tuning range. It is shown that piezoresistve position control is ef ective at improving capacitance uncertainty in a CMOS integrated RF MEMS variable capacitor.

In order to apply to S-Band (1-4.5 GHz) of wireless communication system, we designed and fabricated a high-insolating RF-MEMS switch by surface micromachining technology in this study. In terms of the micro switch, we performed the structural design, high frequency simulation, components process integration and high-frequency measurement in this study. Especially for making components be high-isolation, low-loss and low-driving voltage, we proposed the following three methods: (i) adjusting the space and width of the transmission lines to improve the RF performance; (ii) applying the stress imbalance, by using dual metal composite top electrode, to form a arched contact electrode and reduce the drive voltage efficiently; (iii) using non-isometric spring structure to stabilize the electrode movement of the components. Besides, we did the optimizing simulation for this study, which were supported by Ansoft-HFSS and ADS, in terms of the micro switch which has different structural design as mentioned above. The size of the optimized RF micro-switch which we developed for this study is only 145 £gm ¡Ñ 205 £gm. Switched from on-state to off-state, the component needs 36.5V drive voltage only. According to the result of the commercial network analyzer in 1-4.5GHz frequency range, the isolation rate of the components reaches -59.721dB while off-state; the insert los reaches -1.625dB while on-state.

The electro-optical properties of the ZnO thin film are affected by the deposition parameters. In this study, we find the optimum growth parameters to grow high quality ZnO film. We change the RF power to adjust the surface roughness. The higher RF power will result in a higher deposition rate and rough surface roughness. We obtained an optimum surface roughness of 1.811nm at 50W RF power. The ZnO films have more than 80% transmittance in visible range, and obvious absorption in UV range. A significant peak in the wavelength of 385nm is observed in PL measurement. For the electric characteristics, the resistivity of as-grown ZnO films is high and decreases with post annealing treatment. We have obtained a minimum resistivity of 2.764¡Ñ10-2(£[-cm) at 700oC annealing treatment. Under the fixed 50RF power and 5sccm Ar flux, the optical characteristics and the crystal qualities are worse in the lower pressure (below 5mTorr). The ZnO films have lowest resistivity of 1.826¡Ñ10-2(£[-cm) in the 15mTorr and, strongest PL intensities in 25mTorr after 700oC annealing treatment. After the optimum growth condition, we enhance the optical characteristics through the surface Plasmon effect of the metal nanoparticles. The nano gold particles in the diameter of 50nm and 200-250nm can be obtained under the 5nm and 10nm Au film deposition and annealing at 700oC, respectively. For the optical characteristics, the PL intensity and optical transmittance are enhanced dependent on the size and position of the gold nanoparticles. For the electric characteristics, the n-ZnO/p-Si shows a good rectification effect. The mechanisms of current conduction are space charge current limit, and tunnel current. Sample with 50nm diameter has a significant space charge current limit mechanism. In the C-V measurement, we observed the hysteresis curve in the sample with gold nanoparticles. The sample with larger gold particles have larger memory window of ¡µVFB=0.23.

This thesis investigates the effects of varying the crystallographic orientations of epitaxial ZnO thin films to produce functional ZnO P-N diodes. First, with the atomic layer deposition (ALD), a p-type m-oriented ZnO epitaxial layer is deposited onto an also m-oriented Al2O3 substrate. Then an n-type ZnO layer, mostly textured along the c-axis, is grown atop to form a P-N diode by RF sputtering method. The Hall Effect of the m-ZnO thin film is measured separately at various temperatures and magnetic fields in Quantum Design¡¦s Physical Property Measurement System (PPMS) to determine the nature of the charge carriers. The m-oriented ZnO films are found to be p-type semiconductors, with carrier concentration approximately ~ 1021 1/cm3, which falls in the category of highly-doped degenerate semiconductor. In order to further prove that these films are indeed p-type, naturally n-type c-textured ZnO films are put on the m-films at room temperature by magnetron sputtering to see if the current-voltage (I-V) curves do follow the P-N junction characteristics. In optimizing the c-ZnO film quality and reducing the effects of the junction defects, the gas-mixture ratio between argon and oxygen was varied to compare for the changes in the performance of the resulted materials and devices. X-ray diffraction was used to characterize the crystallographic orientations and the general qualities of the samples by 2£c-£s scan, rocking scan, £p-scan and pole figure measurement. Understanding of the P-N diode is acquired through the analysis of the leakage current and the quantum tunneling phenomena as manifested in the I-V characteristics.

Much of the current research in magnetic resonance engineering focuses on reducing the acquisition time for obtaining an image while simultaneously maximizing the Signal to Noise ratio (SNR) of the image. It is known that improvement in imaging time or resolution is obtained at the cost of SNR. Therefore wherever possible, RF coil engineers design the coil in such a manner so as to maximize SNR for that coil design. In one such design consideration, most coil designers prefer placing low impedance preamplifiers near the coil. The further the pre-amplifiers are from the coil, the greater will be the signal loss due to transmission and higher will be its input impedance as perceived at the coil which would degrade inter-coil isolation. Owing to the current trend of using increasing number of receiver channels (32, 64 or 128) for parallel imaging, placing the preamplifiers near the coil would greatly complicate the coil construction. The primary objective of this research was to find the relation between SNR and referred preamp impedance and whether preamps need to be placed on the coil, or if they can be placed outside the magnet at the end of a transmission line which would simplify the construction of large count array. In addition, SNR was studied as a function of coil design parameters - coil loading, array coil separation, and system frequency. Both theoretical and experimental methods were used to undertake this investigation. A popular electromagnetic modeling technique, finite difference time domain (FDTD), was used to model SNR in arrays of two 3 inch loop coils at 3T and 1.5T. Results were also verified through bench measurement at 3T and 1.5T and by evaluating SNR. To verify the robustness of our results and to assess the possibility of using low cost standard 50 ohm preamps, we carried out additional bench measurements at 4.7T. Results demonstrated that preamplifier placement is critical at low field strength. At higher field strength, SNR degradation due to preamplifier placement was less owing to heavier coil loading.

This thesis presents the theory and design of fixed and Radio Frequency (RF) Microelectromechanical Systems (MEMS) -based tunable microwave filters for RF and microwave applications. The methodology for the design of coupled resonator filters is explained in detail and is used to design an end-coupled microstrip filter at 1.5 GHz with inductive loading using a stepped microstrip discontinuity to lower the resonance frequency of the half-wavelength microstrip resonator. The fabricated endcoupled filter shows center frequencies of 1.36 GHz and 1.03 GHz in the unloaded and loaded state respectively, with insertion losses between 1.2-1.5 dB and return loss better than 10 dB in both states. The filter response shows spurious passbands at approximately twice the filter center frequencies. To overcome this problem and improve the upper rejection skirt of the filter, microstrip resonators with tapped input/output coupling and mixed inter-resonator coupling are used to suppress the spurious passband by introducing a transmission zero at spurious resonance frequency. Measurement results for the fabricated tapped-resonator filters show an improvement of the upper rejection skirt due to spurious suppression to a level of -40 dB, with insertion loss of 1.2-1.5 dB for the same center frequencies. The concepts developed from fabrication and measurement of fixed-tuned microstrip filters are used to design an inductively-loaded RF MEMS tunable filter with adjustable spurious suppression implemented using packaged metal-contact switches. The two-pole 5% filter has a tuning range of 17% from 1.06 GHz to 1.23 GHz with an insertion loss of 1.56-2.28 dB and return loss better than 13 dB over the tuning range. The inductive loading mechanism is used to tune the open-ended quarter wavelength stub such that a tunable transmission zero supresses the spurious resonance as the filter center frequency is tuned. The spurious passband response in both states is suppressed below -20 dB. The unloaded quality factor (Q) of the filter varies from 127 to 75 as the filter is tuned. The equivalent circuit model for the series metalcontact packaged RF MEMS switch used in the tunable filter is derived from full-wave electromagnetic simulations and used to predict the effect of MEMS switch parasitics on the overall performance of the tunable filter.

Ultra-wideband technology (UWB) has received tremendous attention since the FCC license release in 2002, which expedited the research and development of UWB technologies on consumer products. The applications of UWB range from ground penetrating radar, distance sensor, through wall radar to high speed, short distance communications. The CMOS integrated circuit is an attractive, low cost approach for implementing UWB technology. The improving cut-off frequency of the transistor in CMOS process makes the CMOS circuit capable of handling signal at multi-giga herz. However, some design challenges still remain to be solved. Unlike regular narrow band signal, the UWB signal is discrete pulse instead of continuous wave (CW), which results in the occupancy of wide frequency range. This demands that UWB front-end circuits deliver both time domain and frequency domain signal processing over broad bandwidth. Witnessing these technique challenges, this dissertation aims at designing novel, high performance components for UWB signal generation, down-conversion, as well as accurate timing control using low cost CMOS technology. We proposed, designed and fabricated a carrier based UWB transmitter to facilitate the discrete feature of the UWB signal. The transmitter employs novel twostage -switching to generate carrier based UWB signal. The structure not only minimizes the current consumption but also eliminates the use of a UWB power amplifier. The fabricated transmitter is capable of delivering tunable UWB signal over the complete 3.1GHz -10.6GHz UWB band. By applying the similar two-stage switching approach, we were able to implement a novel switched-LNA based UWB sampling receiver frontend. The proposed front-end has significantly lower power consumption compared to previously published design while keep relatively high gain and low noise at the same time. The designed sampling mixer shows unprecedented performance of 9-12dB voltage conversion gain, 16-25dB noise figure, and power consumption of only 21.6mW(with buffer) and 11.7mW(without buffer) across dc to 3.5GHz with 100M-Hz sampling frequency. The implementation of a precise delay generator is also presented in the dissertation. It relies on an external reference clock to provide accurate timing against process, supply voltage and temperature variation through a negative feedback loop. The delay generator prototype has been verified having digital programmability and tunable delay step resolution. The relative delay shift from desired value is limited to within 0.2%.

This dissertation presents the fundamental theory and design procedure of the sub-Nyquist rate sampling receiver front-end that exploits signal sparsity by employing Compressive Sensing (CS) techniques. The CS receiver serves as an Analog-to-Information Conversion (AIC) system that works at sampling rates much lower than the Nyquist rate. The performance of a parallel path CS front-end structure that employs current mode sampling techniques is quantified analytically. Useful and fundamental design guidelines that are unique to CS are provided based on the analytical tools. Simulations with IBM 90nm CMOS process verify the theoretical derivations and the circuit implementations. Based on these results, it is shown that instantaneous receiver signal bandwidth of 1.5 GHz and 44 dB of signal to noise plus distortion ratio (SNDR) are achievable in simulations assuming 0.5 ps clock jitter is present. The ADC and front-end core power consumption is estimated to be 120.8 mW. The front-end is fabricated with IBM 90nm CMOS process, and a BPSK sub-Nyquist rate communication system is realized as a prototype in the testing. A 1.25 GHz reference clock with 4.13 ps jitter variance is employed in the test bench. The signal frequency, phase and amplitude can be correctly reconstructed, and the maximum signal SNR obtained in the testing is 40 dB with single tone input and 30 dB with multi-tones test. The CS system has a better FOM than state-of-art Nyquist rate data acquisition systems taking into account the estimated PLL power.