Surface mount devices (SMDs), such as flip chip packages and ball grid array (BGA) packages are gaining in popularity in microelectronics industry because they provide high density inputs/outputs, better electrical and thermal performance. However, these solder bump interconnections in SMDs are sandwiched between the silicon die and the substrate, which makes them challenging to be inspected. Current non-destructive solder bump inspection techniques like electrical testing, X-ray and acoustic microscopy have some application gaps. New solder bump inspection technique is urgently needed to fill these gaps. Previous work has shown the potential of using a non-contact, non-destructive laser ultrasonics and laser interferometer based inspection system for assessing solder bump qualities. The system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages and a laser interferometer to measure the transient out-of-plane displacement on the package surface. The quality of the solder bumps can be evaluated by analyzing the out-of-plane displacement. However, there are still some gaps that need to be addressed before the system is ready on the shelf. This dissertation focuses on addressing some of these existing issues. The research work consists of the following: 1) a control interface was developed to integrate all the different modules to achieve automation. 2) a new signal-processing method for analyzing the transient out-of-plane displacement signals without requiring a known-good reference chip was developed. 3) the application scope of the system was expanded to inspect the second level solder bumps in BGA packages. Two types of process-induced defects including poor-wetting and solder bump voids were investigated. Meanwhile, solder bump fatigue caused by cyclic mechanical bending and thermal cycle was also studied using this system. 4) a finite element analysis was performed to study the thermo-mechanical reliability of solder bumps in PBGA package under cyclic thermal loads. The successful completion of the research objectives has led to a laser ultrasound solder bump inspection system prototype with more user-friendliness, higher throughputs, better repeatability and more flexibility, which accelerate the commercialization the system.

Sn-based solder alloys are extensively used in electronic devices to form interconnects between different components to provide mechanical support and electrical path. The formation of a reliable solder interconnects fundamentally relies on the metallurgic reaction between the molten solder and solid pad metallization in reflowing. The resultant IMC layer at the solder/pad metallization interface can grow continuously during service or aging at an elevated temperature, uplifting the proportion of IMCs in the entire solder joint. However, the essential mechanical properties of interfacial IMC (i.e. Cu6Sn5, Cu3Sn) layers, such as Young s modulus and hardness, are drastically different in comparison with Sn-based solder and substrate. Therefore, the increasing fraction of interfacial IMCs in the solder joint can lead to significant deformation incompatibility under exterior load, which becomes an important reliability concern in the uses of solder joints for electronic interconnects. In the past decades, extensive research works were implemented and reported regarding the growth of interfacial IMC layers and its effect on the mechanical integrity of solder joints. But, the following fundamental issues in terms of mechanical and microstructural evolution in the uses of solder joints still remain unclear, demanding further research to elaborate: (1) The protrusion of IMCs: Though the growth of interfacial IMC layers along the diffusion direction in solder joints were studied extensively, the growth of IMCs perpendicular to the diffusion direction were reported in only a few papers without any further detailed investigation. This phenomena can crucially govern the long-term reliability of solder interconnects, in particular, in the applications that require a robust microstructural integrity from a solder joint. (2) Fracture behaviour of interfacial IMC layers: The fracture behaviour of interfacial IMC layers is a vital factor in determining the failure mechanism of solder joints, but this was scarcely investigated due to numerous challenges to enable a potential in-situ micro-scale tests. It is therefore highly imperative to carry out such study in order to reveal the fracture behaviour of interfacial IMC layers which can eventually provide better understanding of the influence of interfacial IMC layers on the mechanical integrity of solder joints. (3) Volume shrinkage: The volume shrinkage (or solder joint collapse) induced by the growth of interfacial IMC layers was frequently ascribed as one of the main causes of the degradation of mechanical reliability during aging due to the potentially resulted voids and residual stress at the solder/substrate interface. However, very few experimental works on the characterisation of such type of volume shrinkage can be found in literatures, primarily due to the difficulties of observing the small dimensional changes that can be encountered in the course of IMCs growth. (4) Residual stress: The residual stress within solder joints is another key factor that contributes to the failure of solder joints under external loads. However, the stress evolution in solder joints as aging progresses and the potential correlation between the residual stress and the growth of interfacial IMC layers is yet to be fully understood, as stress/strain status can fundamentally alter the course of total failure of a solder joint. (5) Crack initiation and propagation in solder joints: Modelling on the mechanical behaviour of solder joints is often undertaken primarily on the stress distribution within solder joints, for instance, under a given external loading. But there is lack of utilising numerical analysis to simulate the crack initiation and propagation within solder joints, thus the effect of interfacial IMC layers on the fracture behaviour of the solder joints can be elaborated in further details. In this thesis, the growth of interfacial IMCs in parallel and perpendicular to the interdiffusion direction in the Sn99Cu1/Cu solder joints after aging was investigated and followed by observation with SEM, with an intention of correlating the growth of IMCs along these two directions with aging durations based on the measured thickness of IMC layer and height of perpendicular IMCs. The mechanism of the protrusion of IMCs and the mutual effect between the growth of IMCs along these two directions was also discussed. The tensile fracture behaviour of interfacial Cu6Sn5 and Cu3Sn layers at the Sn99Cu1/Cu interface was characterised by implementing cantilever bending tests on micro Cu6Sn5 and Cu3Sn pillars prepared by focused ion beam (FIB). The fracture stress and strain were evaluated by finite element modelling using Abaqus. The tensile fracture mechanism of both Cu6Sn5 and Cu3Sn can then be proposed and discussed based on the observed fracture surface of the micro IMC pillars. The volume shrinkage of solder joints induced by the growth of interfacial IMC layers in parallel to the interdiffusion direction in solder joint was also studied by specifically designed specimens, to enable the collapse of the solder joint to be estimated by surface profiling with Zygo Newview after increased durations of aging. Finite element modelling was also carried out to understand the residual stress potentially induced due to the volume shrinkage. The volume shrinkage in solder joints is likely to be subjected to the constraint from both the attached solder and substrate, which can lead to the build-up of residual stress at the solder/Cu interface. Depth-controlled nanoindentation tests were therefore carried out in the Sn99Cu1 solder, interfacial Cu6Sn5 layer, Cu3Sn layer and Cu with Vickers indenter after aging. The residual stress was then evaluated in the correlation with aging durations, different interlayers and the locations in the solder joint. Finally, finite element models incorporated with factors that may contribute to the failure of solder joints, including microstructure of solder joints, residual stress and the fracture of interfacial IMC, were built using Abaqus to reveal the effect of these factors on the fracture behaviour of solder joints under applied load. The effect of growth of IMC layer during aging on the fracture behaviour was then discussed to provide a better understanding of the degradation of mechanical integrity of solder joints due to aging. The results from this thesis can facilitate the understanding of the influence of interfacial IMC layers on the mechanical behaviour of solder joints due to long-term exposure to high temperatures.

L'objectif principal de cette thèse est l'étude de la fiabilité des cartes électroniques. Ces cartes sont utilisées dans plusieurs domaines, tels que l’industrie automobile, l’aéronautique, les télécommunications, le secteur médical, ..., etc. Elles assurent toutes les fonctions nécessaires au bon fonctionnement d’un système électronique. Les cartes électroniques subissent diverses sollicitations (mécaniques, électriques et thermiques) durant la manipulation et la mise en service. Ces sollicitations sont dues aux chutes, aux vibrations et aux variations de température. Elles peuvent causer la rupture des joints de brasage des composants électroniques. Cette rupture entraine la défaillance du système électronique complet. Les objectifs de ce travail sont: - Développer un modèle numérique pour la simulation du drop-test d’une carte électronique ; - Prédire la durée de vie en fatigue des joints de brasure en tenant compte des incertitudes des diverses variables ; - Développer une méthode d’optimisation fiabiliste pour déterminer la géométrie optimale qui assure un niveau cible de fiabilité d’une carte électronique ; - Application d’une nouvelle méthode hybride d’optimisation pour déterminer la géométrie optimale d’une carte électronique et d’un joint de brasure. Cette thèse a donné lieu à deux publications dans une revue indexée, et deux projets de publication et quatre communications dans des manifestations internationales. / The main objective of this thesis is to study the electronics’ cards reliability. These cards are used in many fields, such as automotive, aerospace, telecommunications, medical. They provide all necessary electronic functions for well functioning of an electronic system. Electronic cards are undergoing various extreme stresses (mechanical, electrical, and thermal) when handling and commissioning. These stresses are due to drops, vibration and temperature variations. They may cause solder joints failures’ of electronic components. This may causes the failure of the entire electronic system. The objectives of this work are: To develop a numerical model to simulate the drop test of an electronic card; To predict the fatigue life of solder joints in uncertain environment of the variables; To develop a reliability-optimization method to determine the optimal geometry providing a targeted reliability level of an electronic card; To apply a new hybrid optimization method in order to determine the optimal geometry both of an electronic card and a solder joint.

The fundamental requirement of the research reported within this thesis is the provision of physical models to enable model based simulation of mainstream printed circuit assembly (PCA) process discrete events for use within to-be-developed (or under development) software tools which codify cause & effects knowledge for use in product and process design optimisation. To support a national competitive advantage in high reliability electronics UK based producers of aircraft electronic subsystems require advanced simulation tools which offer model based guidance. In turn, maximization of manufacturability and minimization of uncontrolled rework must therefore enhance inservice sustainability for 'power-by-the-hour' commercial aircraft operation business models.

Submitted by JOSIANE SANTOS DE OLIVEIRA (josianeso) on 2018-10-03T13:26:39Z No. of bitstreams: 1 Bernardo Bortolotto Ilha_.pdf: 35188571 bytes, checksum: cac488e47b7d5a9301e00e7ab4d1ad4b (MD5) / Made available in DSpace on 2018-10-03T13:26:39Z (GMT). No. of bitstreams: 1 Bernardo Bortolotto Ilha_.pdf: 35188571 bytes, checksum: cac488e47b7d5a9301e00e7ab4d1ad4b (MD5) Previous issue date: 2018-01-16 / UNISINOS - Universidade do Vale do Rio dos Sinos / The aging and electromigration (EM) effects were evaluated when up to 0.19 wt.% Zn was added to Sn-0.7 wt.% Cu solder. Currently, the Sn-0.7 wt.% Cu solder is being widely used in the electronic industries due to its advantages of low cost and high temperature applications. However, its usage is also limited by detrimental properties – for instance, when compared to SAC305, Sn-0.7 wt.% Cu solder has lower electromigration life time, shear strength and drop reliability. Minor Zn alloying to Pb-free solders reportedly enhances some of their properties, e.g.: stabilization of bulk microstructures by decreasing undercooling; formation of a thin interfacial diffusion barrier and, thereby, suppressing Cu3Sn and Cu6Sn5 interfacial IMC growth rate and retarding under bump metallurgy (UBM) diffusion through the solder; and also, compensation for Sn self-diffusion due to reverse polarity effect. In this research, the aging and EM effects are assessed when 0.09, 0.16 and 0.19 wt.% Zn were added to Sn-0.7 wt.% Cu solder. The samples underwent up to 500 h of isothermal aging at temperatures of 125, 150 and 175 °C, and EM samples underwent up to 200 h of stressing at a constant temperature of 150 °C and current of 3.25 A. Solder balls were fabricated on a BGA structure for the aging tests, and for the EM tests, a pair of solders was assembled in a daisy-chain structure with organic solderability preservative (OSP) and electroless nickel immersion gold (ENIG) surface finishes. The microstructural evolution and compositional distribution analyses were carried out using optical microscope with brightfield and cross polarized light, scanning electron microscope (SEM), energy dispersive spectrometer (EDS), electron probe micro analyzer (EPMA), and electron backscattered diffraction (EBSD). The addition of Zn suppresses the formation of Cu3Sn IMC and the total interfacial IMC thickness upon aging, and the samples with ENIG had smaller IMC thickness than OSP surface finish. In addition, the grains' microstructure becomes less interlaced and more stable, indicating lower undercooling. The electromigration effects on the microstructure is mainly governed by the relative orientation between the c-axis of Sn grains and the direction of current flow. When parallel, allows cathode UBM and alloying elements diffusion through the solder and formation of IMC, and, when transverse, inhibits this diffusion leading to failure by void formation at the anode UBM/solder interface due to depletion of the UBM and slow Sn self-diffusion.

Submitted by Silvana Teresinha Dornelles Studzinski (sstudzinski) on 2016-12-23T12:17:06Z No. of bitstreams: 1 Tiago de Freitas Machado_.pdf: 13489744 bytes, checksum: 639cbc0fc0de3f47a3c757ff594540e0 (MD5) / Made available in DSpace on 2016-12-23T12:17:06Z (GMT). No. of bitstreams: 1 Tiago de Freitas Machado_.pdf: 13489744 bytes, checksum: 639cbc0fc0de3f47a3c757ff594540e0 (MD5) Previous issue date: 2016-09-15 / itt Chip - Instituto Tecnológico de Semicondutores da Unisinos / O processo de soldagem de esferas em componentes do tipo esferas organizadas em matriz do inglês BGA, ball gris array é crítico para o encapsulamento de semicondutores pois uma falha pode gerar rejeitos e retrabalhos indesejáveis ao desempenho da produção. O processo atual da empresa de encapsulamentos analisada apresentou, de forma acumulada, entre os meses de janeiro a junho de 2015 uma taxa de 1220 defeitos por milhão de unidades produzidas, relacionadas ao modo de falha denominado tamanho da esfera com o código SB003. Matérias primas alternativas para aplicação em processo de soldagem de esferas em encapsulamento de semicondutores de diferentes fabricantes, podem apresentar melhor desempenho com relação a esta ocorrência. A redução das perdas de material e de defeitos no processo de soldagem de esferas é essencial para que uma empresa de encapsulamento de semicondutores se mantenha competitiva financeiramente no mercado tanto nacional quanto internacional. O objetivo deste trabalho foi avaliar através de análises de laboratório e aplicações práticas, quatro opções de fluxos de solda solúveis ou parcialmente solúveis em água. Foram comparadas as características de viscosidade, índice de acidez, pH e perda de massa através de TGA do inglês thermogravimetric analysis, aprimorando o conhecimento intrínseco sobre este material e seu comportamento nesta etapa. Foi analisado o impacto dos diferentes fluxos de solda no desempenho da soldagem, realizando a observação da ação do fluxo em um forno de refusão e a habilidade de realinhar esferas de solda fora de posição que impactam na redução da ocorrência de defeitos. Obteve-se como resultado o fluxo A com melhor performance para realinhamento, 9,58% das esferas foram reposicionadas, perda de massa gradual e menos abrupta que os demais. / The process of soldering spheres in ball grid array components, called BGA, is critical to the semiconductor packaging, because one failure can generate rejects and undiserable reworks to production performance. The current process of the packaging company analyzed presented, in accumulated form, between the months of january and june of 2015 the defect rate of 1220 defects per million of produced units, related to the failure mode denominated ball size with the code SB003. Alternative raw material for solder sphere process applied to semiconductor packaging of different manufacturer could show better performance related to these occurrence. The reduction of material waste and defects reduction in the soldering spheres process is essential to keep a semiconductor packaging company competitive financially both in the national and international market. The objective was to evaluate through laboratory analysis and practical applications four options of soldering flux water and non-water soluble. Characteristics were compared of viscosity, acidity level, pH and mass loss through thermogravimetric analysis TGA improving the intrinsic knowledge about this material and its behavior in the step. The impact was analyzed of different solder flux performance on soldering, performing observation of the flux action on the reflow oven and the ability to realign the solder spheres misplaced that impact on the reduction of the occurrence of defects. It was obtained as result the flux A with better performance of realignment, 9.58% of misplaced spheres were repositioned, present gradual mass loss and less abrupt than the others.

Embedded active and passive devices has been increasingly used by in order to integrate more functions inside the same or smaller size device and to meet the need for better electrical performance of the component assemblies. Solder joints have been used in the electronic industry as both structural and electrical interconnections between electronic packages and printed circuit boards (PCB). When solder joints are under thermal cyclic loading, mismatch in coefficients of thermal expansion (CTE) between the printed circuit boards and the solder balls creates thermal strains and stresses on the joints, which may finally result in cracking. Consequently, the mechanical interconnection is lost, leading to electrical failures which in turn causes malfunction of the circuit or whole system. When a die is embedded into a substrate, Young's modulus of the die is larger than one of the core of the substrate and the CTEs of the die is smaller than those of the substrate. As a result, mismatch in coefficients of thermal expansions (CTE) between the substrate with the embedded device and the solder balls may increase. In the present study, finite element method (FEM) is employed to find out the stress and strain distribution of ball grid array(BGA) solders under thermal cycling. The ANAND model for viscoplasticity is employed for this purpose.

Solder joints serve as both mechanical and electrical connections between elements in a package. They are subjected to shear strains generated as a result of the different behaviors of the elements in the package (tension and compression) due to the differences in coefficients of thermal expansion during service conditions. Some of the causes of solder joint failures are due to the following: Vibration: small rapid displacements of parts of the assembly. This is not necessarily an issue with electronic components but larger parts like automobiles. Humidity: the package being exposed to water or ionic species can undergo corrosion if an electrical bias exists resulting in electrical opens or electrical shorts if the corrosion products are electrically conductive. Thermal Aging: this occurs during the lifetime of the solder interconnects, the package can be exposed to high ambient temperature or high dissipated heat during use. The micro-structure of the solder joint becomes more coarse and brittle. Mechanical Shock: the package undergoes shock during a short term exposure to high loads. Thermo-mechanical fatigue: this type of failure arises as a result of the solder joints going through cyclic strains, due to different coefficients of thermal expansion of individual components in the package during service. The most prevalent long-term reliability issues that can cause interconnect failure are thermal aging and thermo-mechanical fatigue. This study aims to evaluate the reliability of solder joints using finite element method, considering solder joint failure due to thermo-mechanical fatigue. Three variations of the BGA (Ball Grid Array) package are evaluated using the finite element analysis. The SAC305 series lead (pb) free alloy of 96.5% tin, 3% silver, and 0.5% copper is employed for this study.

Thesis (M.S.)--State University of New York at Binghamton, Department of Physics, 2006. / Includes bibliographical references.

<p>The directive of the European parliament and of the council on the Restriction of the use of certain Hazardous Substances (RoHS) in Electrical and Electronic Equipment (EEE) took effect in the European Union on July 1, 2006. Japan, California, China and Korea are all closed markets for exporters of components containing lead from July 1, 2007. Taiwan and Australia are working with similar directives. The RoHS directive is the reason why this thesis about the implementation of lead-free soldering in highly reliable applications is necessary.</p><p>The European Lead Free soldering NETwork (ELFNET) status survey from 2005 shows that the majority of the companies are well informed, but 20% are still not active in lead-free soldering. The Swedish industry is for the most part prepared and 95% of the components are lead-free. The transition to lead-free soldering will have a major affect on logistics and administration, because the RoHS directive is 90% about administration and logistics problems. Only 10% is technical problems.</p><p>The higher melting point in lead-free soldering affects every stage of the lead-free manufacturing, from assembly to testing and repair.</p><p>The major concern for highly reliable applications are that there are not enough data to understand to what grade lead-free solders will perform differently from lead based solders. Five different types of reliability testing were studied in this thesis; vibration, mechanical shock, thermal shock, thermal cycling and combined environments. Whiskers, voids, brittle fractures and mixed assembly problems were also studied. Individual tests alone should not be used to make definite decisions on lead-free soldering reliability. The lower reliability for lead-free solders in some tests does not necessarily mean that lead-free solders not can be used in highly reliable applications like defence electronics.</p><p>The most important conclusions from this thesis are:</p><p>• Update or change the logistic system and mark/label according to available standards.</p><p>• Secure a good board layout.</p><p>• Secure a good process control.</p><p>• Alternative surface board should be used. Tin-silver-copper (SAC) is the most reliable solder and Electroless Nickel/Immersion Gold (ENIG) is the most reliable surface finish.</p><p>• Remember that the higher temperature affects every stage of the manufacturing.</p><p>• No increased problems with whiskers or risk of high voiding levels.</p><p>• Mixed assembly is a risk. Compatibility and contamination risks must be taken seriously.</p><p>• Which environment will the applications be in? If it is not a highly vibrating and thermal cycling environment, lead-free soldering should be safe to use.</p> / <p>Europaparlamentets och rådets direktiv om begränsning av användningen av vissa farliga ämnen i elektriska och elektroniska produkter började gälla i Europeiska unionen 1 juli, 2006. Japan, Kalifornien, Kina och Korea är alla stängda marknader för exportörer av komponenter som innehåller bly från och med 1 juli, 2007. Taiwan och Australien arbetar med liknande direktiv. RoHS-direktivet är anledningen till varför detta examensarbete om implementeringen av blyfri lödning i högtillförlitliga applikationer är nödvändigt.</p><p>En undersökning från 2005 av ELFNET visar att majoriteten av företagen är väl informerade, men 20% är fortfarande i aktiva med blyfri lödning. Den svenska industrin är till största delen väl förberedd och 95% av komponenterna är blyfria. Övergången till blyfri lödning kommer att ha stor effekt på logistik och administration, därför att 90% är administrations- och logistikproblem i RoHS-direktivet. Bara 10% är tekniska problem.</p><p>Den högre smälttemperaturen i blyfri lödning påverkar varje steg av den blyfria tillverkningen, från montering till testning och reparation.</p><p>Den stora oron för högtillförlitliga applikationer är att det inte finns tillräckligt med data för att förstå i vilken grad som blyfria lod kommer att bete sig annorlunda jämfört med blybaserade lod. Fem olika typer av tillförlitlighetstester har undersökts i detta examensarbete; vibration, mekanisk chock, termisk chock, termisk cykling och kombinerade tester. Whiskers, voids, sprödbrott och blandad montering studerades också. Individuella tester ska inte användas för att ta några definitiva beslut om blyfri lödnings tillförlitlighet. Den lägre tillförlitligheten för blyfria lod i en del tester behöver nödvändigtvis inte betyda att blyfria lod inte kan användas i högtillförlitliga applikationer som försvarselektronik.</p><p>De viktigaste slutsatserna från detta examensarbete är:</p><p>• Uppdatera eller byt logistiskt system och märk enligt tillgängliga standarder.</p><p>• Säkerställ en bra kretskortsdesign.</p><p>• Säkerställ en bra processkontroll.</p><p>• Alternativa mönsterkort bör användas. SAC är det tillförlitligaste lodet och ENIG är den tillförlitligaste ytbehandlingen.</p><p>• Kom ihåg att den ökade temperaturen påverkar varje steg i tillverkningen.</p><p>• Inga ökade problem med whiskers eller stort antal voids.</p><p>• Blandmontage är riskfyllt. Kompatibilitet och risker med kontaminering måste tas på allvar.</p><p>• Vilken miljö kommer applikationen att befinna sig i? Är det inte en starkt vibrerande eller temperaturcyklisk miljö bör blyfri lödning vara säkert att använda.</p>