Este trabalho consiste na especificação e desenvolvimento da arquitetura de um Comutador Digital para TDM Determinístico E1, visando sua posterior implementação em microeletrônica. Inicialmente são apresentados os conceitos gerais sobre os Sistemas de Comutação, bem como das principais modalidades de comutação, seguidos de um estudo aprofundado da Comutação de Circuitos e suas técnicas mais utilizadas, devido a sua Intima relação com a multiplexação TDM e a hierarquia E1. Do mesmo modo, são descritas as características das Redes Corporativas E1 e dos multiplexadores E1, junto com as funções principais do Comutador dentro do ambiente de uma rede ponto-a-ponto. Com base no estudo prévio, e proposta a arquitetura de um Comutador Digital baseado em técnicas TSI capaz de fornecer funções de comutação local e remota entre os dispositivos conectados aos multiplexadores El, que formam os nos de uma Rede Corporativa com controle centralizado. 0 projeto logico e a simulação do Comutador Digital foram realizados dentro do framework SOLO/Cadence, usando a biblioteca de Standard Cells da tecnologia CMOS de 1.2µ. O simulador lógica SILOS, disponível no SOLO/Cadence, foi utilizado para validar a arquitetura proposta. Detalhes de implementação e resultados de simulação são apresentados. O módulo de controle do Comutador Digital e apenas especificado. / This work consists in the specification and development of a Digital Circuit Switch architecture for E1l Deterministic TDM, looking toward a future microelectronics implementation. First, general concepts about Switching Systems and its basic elements, as well as the main kinds of switching are presented. Also, a meticulous study about Circuit Switching and its more used techniques is realized, because of the intrinsec relation with TDM and E1 hierarchy. In the same way, the characteristics of E1 Corporate Networks and E1 multiplexers are described, along with the main functions of the Digital Switch into an end-to-end network. Taking into account the previous study, the architecture of a Digital Switch based on TSI techniques, is proposed. This architecture is able to perform local and remote switching between the devices connected to E1 multiplexers, which form the network nodes of an end-to-end Corporate Network. The logic design and the circuit simulation of the Digital Switch were performed within SOLO/Cadence Standard Cells desing framework, using CMOS 1.2µ technology. The logic simulator SILOS was used to validate the proposed architecture. Implementation details and simulation results are presented. The Control module of the Digital Switch is only specified.

Este trabalho consiste na especificação e desenvolvimento da arquitetura de um Comutador Digital para TDM Determinístico E1, visando sua posterior implementação em microeletrônica. Inicialmente são apresentados os conceitos gerais sobre os Sistemas de Comutação, bem como das principais modalidades de comutação, seguidos de um estudo aprofundado da Comutação de Circuitos e suas técnicas mais utilizadas, devido a sua Intima relação com a multiplexação TDM e a hierarquia E1. Do mesmo modo, são descritas as características das Redes Corporativas E1 e dos multiplexadores E1, junto com as funções principais do Comutador dentro do ambiente de uma rede ponto-a-ponto. Com base no estudo prévio, e proposta a arquitetura de um Comutador Digital baseado em técnicas TSI capaz de fornecer funções de comutação local e remota entre os dispositivos conectados aos multiplexadores El, que formam os nos de uma Rede Corporativa com controle centralizado. 0 projeto logico e a simulação do Comutador Digital foram realizados dentro do framework SOLO/Cadence, usando a biblioteca de Standard Cells da tecnologia CMOS de 1.2µ. O simulador lógica SILOS, disponível no SOLO/Cadence, foi utilizado para validar a arquitetura proposta. Detalhes de implementação e resultados de simulação são apresentados. O módulo de controle do Comutador Digital e apenas especificado. / This work consists in the specification and development of a Digital Circuit Switch architecture for E1l Deterministic TDM, looking toward a future microelectronics implementation. First, general concepts about Switching Systems and its basic elements, as well as the main kinds of switching are presented. Also, a meticulous study about Circuit Switching and its more used techniques is realized, because of the intrinsec relation with TDM and E1 hierarchy. In the same way, the characteristics of E1 Corporate Networks and E1 multiplexers are described, along with the main functions of the Digital Switch into an end-to-end network. Taking into account the previous study, the architecture of a Digital Switch based on TSI techniques, is proposed. This architecture is able to perform local and remote switching between the devices connected to E1 multiplexers, which form the network nodes of an end-to-end Corporate Network. The logic design and the circuit simulation of the Digital Switch were performed within SOLO/Cadence Standard Cells desing framework, using CMOS 1.2µ technology. The logic simulator SILOS was used to validate the proposed architecture. Implementation details and simulation results are presented. The Control module of the Digital Switch is only specified.

Orientadores: Edson Moschim, Felipe Rudge / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-05T07:30:34Z (GMT). No. of bitstreams: 1 MaiaJunior_Decio_M.pdf: 1427591 bytes, checksum: 104d0be2f7926f963a037d44ed4df46a (MD5) Previous issue date: 2005 / Resumo: Um novo sistema para geração, chaveamento e roteamento de pacotes ópticos é descrito, visando aplicação em nós de redes ópticas de próxima geração (NGON). Os pacotes ópticos são compostos por um campo de cabeçalho em freqüência e um campo de carga útil digital de alta capacidade (~Gb/s). Os nós de chaveamento óptico incluem as funcionalidades de bloqueio, roteamento e retirada de pacotes, e são controlados por circuitos eletrônicos lógicos que rapidamente processam a informação contida no cabeçalho dos pacotes ópticos, permitindo baixa latência. O chaveamento é realizado pacote-a-pacote, e o tempo de reconhecimento do cabeçalho e chaveamento dos pacotes ópticos é de alguns micro-segundos (~ms) . Este sistema apresenta arquitetura simples, operação eficiente, e pode ser visto como uma solução atrativa nos aspectos técnicos e econômicos, aplicável a redes metropolitanas de acesso e, demonstra-se totalmente compatível com redes ópticas WDM / Abstract: A new system for the generation, switching and routing of optical packets is described, aimed for use in nodes of next-generation optical networks (NGON). The optical packets are composed of an in-band frequency tone header, and a high-capacity transparent digital payload (~Gb/s), occupying separate fields. The optical node switching action includes blocking, routing and drop functions, controlled by electronic logic circuits, performed on a packet-by-packet basis, with only the header information being processed. Total header processing and optical packet switching time is few micro seconds (~ms). This system is designed as a techno-economical solution for metro-access transport, having low latency and low packet loss, being fully compatible with WDM optical networks / Mestrado / Eletrônica, Microeletrônica e Optoeletrônica / Mestre em Engenharia Elétrica

Les travaux de cette thèse portent sur l'analyse des comportements chaotiques dans les convertisseurs multicellulaires séries. Ces systèmes à commutationpeuvent présenter une variété de phénomènes complexes liés à des bifurcationset au chaos. Sachant qu'un convertisseur de puissance qui a une charge purementdissipative, ne peut générer un comportement chaotique, nous avons dans la première partie de cette thèse, connecté un hacheur à deux cellules à une charge non linéaire non strictement dissipative et nous avons analysé ses comportements à l'aide des propriétés dynamiques de base et présenté les routes vers le chaos. La fin de cette partie a été consacrée à l'étude du hacheur à cinq cellules qui est une généralisation du hacheur à deux cellules. Afin de supprimer le comportement chaotique, la deuxième partie du travail a été consacrée à la synthèse d'une loi de commande hybride basé sur la modélisation par réseaux de Petri pour la régulation des tensions des condensateurs flottants et du courant de charge. / This thesis deals with the analysis of chaotic behaviors in serial multicellularconverters. These switching systems can have a variety of complex phenomenaassociated with bifurcations and chaos. Knowing that a power converter that has a purely dissipative load cannot generate chaotic behavior, we've in the first part of this thesis, we connected a two-cell chopper to a nonlinear load not strictly dissipative and we've analyzed its behaviors by using some basic dynamic properties and thus presented the routes to chaos. The end of this part was devoted to the study of the 5-cell chopper which is a generalization of the two-cell chopper. In order to eliminate the chaotic behavior, the second part was devoted to the synthesis of a controlled law based on hybrid modeling of Petri nets for the regulation of capacitor voltages and current load.

Indiana University-Purdue University Indianapolis (IUPUI) / Multi-Protocol Label Switching (MPLS) is an emerging technology which is the initial step for the forthcoming generation of communication. It uses Labels in order to identify the packets unlike the conventional IP Routing Mechanism which uses the routing table at each router to route the packet. MPLS uses the techniques of FRR with the help of RSVP/CR-LDP to overcome the link and/or node failures in the network. On the other hand there are certain limitations/drawbacks of using the above mechanisms for Failure Detection and Recovery which are multiple protocols such as RSVP/CR-LDP over OSPF/IS-IS and complex algorithms to generate backup paths since each router works individually in order to create a backup tunnel. So to overcome the listed limitations, this paper discusses a new technique for MPLS Networks which is Source Routing \cite{48}. Source Routing is the technique in which the source plays the role of directing the packet to the destination and no other router plays the role of routing the packet in the network. Using the OPNET Modeler 17.5 tool for implementing source routing when there is a network failure is performed and the results are compared by implementing RSVP/CR-LDP over the same failed network. The comparative results show that the network performance is best in the case of Source Routing implementation as compared to the RSVP and CR-LDP signaling over the MPLS Networks.

Optical packet switching (OPS) is one of the more promising solutions for meeting the diverse needs of broadband networking applications of the future. By virtue of its small data traffic granularity as well as its nanoseconds switching speed, OPS can be used to provide connection-oriented or connectionless services for different groups of users with very different networking requirements. The optical buffer and the switch fabric are two of the most important components in an OPS router. In this research, novel designs for the optical buffer and switch fabric are proposed and experimentally demonstrated. In particular, an optical buffer that is based on a folded-path delay-line tree architecture will be discussed. This buffer is the most compact non-recirculating optical delay line buffer to date, and it uses an array of high-speed ON-OFF optical reflectors to dynamically reconfigure its delay within several nanoseconds. A major part of this research is devoted to the design and performance optimization of these high-speed reflectors. Simulations and measurements are used to compare different reflector designs as well as to determine their optimal operating conditions. Another important component in the OPS router is the switch fabric, and it is used to perform space switching for the optical packets. Optical switch fabrics are used to overcome the limitations imposed by conventional electronic switch fabrics: high power consumption and dependency on the modulation format and bit-rate of the signals. Currently, only those fabrics that are based on the broadcast-and-select architecture can provide truly non-blocking multicast services to all input ports. However, a major drawback of these fabrics is that they are implemented using a large number of optical gates based on semiconductor optical amplifiers (SOA). This results in large component count and high energy consumption. In this research, a new multicast-capable switch fabric which does not require any SOA gates is proposed. This fabric relies on a passive all-optical gate that is based on the Four-wave mixing (FWM) wavelength conversion process in a highly-nonlinear fiber. By using this new switch architecture, a significant reduction in component count can be expected.

Modelling and simulation are essential ingredients of the analysis and design process in power electronics. It helps a design engineer gain an increased understanding of circuit operation. Accordingly, for a set of specifications given, the designer will choose a particular topology, select component types and values, estimate circuit performance etc. Typically hierarchical modelling, analysis and simulation rather than full detailed simulation of the system provides a crucial insight and understanding. The combination of these insights with hardware prototyping and experiments constitutes a powerful and effective approach to design. Obtaining the mathematical model of the power electronic systems is a major task before any analysis or synthesis or simulation can be performed. There are circuit oriented simulators which uses inbuilt mathematical models for components. Simulation with equation solver needs mathematical models for simulation which are trimmed according to user requirement. There are various methods in the literature to obtain these mathematical models. However, the issues of multi-domain system modelling and causality of the energy variables are not sufficiently addressed. Further, specifically to power converter systems, the issue of switching power models with fixed causality is not addressed. Therefore, our research focuses on obtaining solutions to the above using relatively untouched bond graph method to obtain models for power electronic systems. The power electronic system chosen for the present work is Switched Mode Power Converters (SMPC’s) and in particular PWM DC-DC converters. Bond graph is a labelled and directed graphical representation of physical systems. The basis of bond graph modelling is energy/power flow in a system. As energy or power flow is the underlying principle for bond graph modelling, there is seamless integration across multiple domains. As a consequence, different domains (such as electrical, mechanical, thermal, fluid, magnetic etc.) can be represented in a unified way. The power or the energy flow is represented by a half arrow, which is called the power bond or the energy bond. The causality for each bond is a significant issue that is inherently addressed in bond graph modelling. As every bond involves two power variables, the decision of setting the cause variable and the effect variable is by natural laws. This has a significant bearing in the resulting state equations of the system. Proper assignment of power direction resolves the sign-placing problem when connecting sub-model structures. The causality will dictate whether a specific power variable is a cause or the effect. Using causal bars on either ends of the power bond, graphically indicate the causality for every bond. Once the causality gets assigned, bond graph displays the structure of state space equations explicitly. The first problem we have encountered in modelling power electronic systems with bond graph is power switching. The essential part of any switched power electronic system is a switch. Switching in the power electronic circuits causes change in the structure of the system. This results in change in dynamic equations of the circuit according to position of the switch. We have proposed the switched power junctions (SPJ) to represent switching phenomena in power electronic systems. The switched power junctions are a generalization of the already existing 0-junction and 1-junction concepts of the bond graph element set. The SPJ’s models ideal switching. These elements maintain causality invariance for the whole system for any operational mode of the system. This means that the state vector of the resulting state equation of the system does not change for any operating mode. As SPJs models ideal power switching, the problem of stiff systems and associated numerical stability problems while simulating the system is eliminated. Further, it maintains one to one correspondence with the physical system displaying all the feasible modes of operation at the same time on the same graph. Using these elements, the switched mode power converters (SMPC's) are modelled in bond graph. Bond graph of the converter is the large signal model of the converter. A graphical procedure is proposed that gives the averaged large signal, steady state and small signal ac models. The procedure is suitable for the converters operating in both Continuous Conduction Mode (CCM) and in Discontinuous Conduction Mode (DCM). For modelling in DCM, the concept of virtual switch is used to model the converter using bond graph. Using the proposed method, converters of any complexity can be modelled incorporating all the advantages of bond graph modelling. Magnetic components are essential part of the power electronic systems. Most common parts are the inductor, transformer and coupled inductors which contain both the electric and magnetic domains. Gyrator-Permeance approach is used to model the magnetic components. Gyrator acts as an interface between electric and magnetic domain and capacitor model the permeance of the magnetic circuits. Components like inductor, tapped inductor, transformer, and tapped transformer are modelled. Interleaved converters with coupled inductor, zero ripple phenomena in coupled inductor converters as well as integrated magnetic Cuk converter are also modelled. Modelling of integrated magnetic converters like integrated magnetic forward converter, integrated magnetic boost converter are also explored. To carry out all the simulations of proposed bond graph models, bond graph toolbox is developed using MATLAB/SIMULINK. The MATLAB/SIMULINK is chosen since it is general simulation platform widely available. Therefore all the analysis and simulation can be carried out using facilities available in MATLAB/SIMULINK. Symbolic equation extraction toolbox is also developed which extracts state equations from bond graph model in SIMULINK in symbolic form.

The demand for high-performance and power scalable DSP processors for telecommunication and portable devices has increased significantly in recent years. The Fast Fourier Transform (FFT) computation is essential to such designs. This work presents a switch-based architecture to design radix-2 FFT processors. The processor employs M processing elements, 2M memory arrays and M Read Only Memories (ROMs). One processing element performs one radix-2 butterfly operation. The memory arrays are designed as single-port memory, where each has a size of N/(2M); N is the number of FFT points. Compared with a single processing element, this approach provides a speedup of M. If not addressed, memory collisions degrade the processor performance. A novel algorithm to detect and resolve the collisions is presented. When a collision is detected, a memory management operation is executed. The performance of the switch architecture can be further enhanced by pipelining the design, where each pipeline stage employs a switch component. The result is a speedup of Mlog2N compared with a single processing element performance. The utilization of single-port memory reduces the design complexities and area. Furthermore, memory arrays significantly reduce power compared with the delay elements used in some FFT processors. The switch-based architecture facilitates deactivating processing elements for power scalability. It also facilitates implementing different FFT sizes. The VLSI implementation of a non-pipeline switch-based processor is presented. Matlab simulations are conducted to analyze the performance. The timing, power and area results from RTL, synthesis and layout simulations are discussed and compared with other processors. / text

Orientadores: Peter Jurgen Tatsch, Marcos Rogerio Salvador / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-14T19:15:56Z (GMT). No. of bitstreams: 1 Oliveira_ViniciusGarciade_M.pdf: 16025820 bytes, checksum: 7d131f46cf420654c7f70129842770a7 (MD5) Previous issue date: 2009 / Resumo: A convergência das aplicações, dos serviços e das redes de telecomunicação está mudando o mundo e o jeito como as pessoas agem e interagem. Embora com limitações, computação distribuída, teleconferência, tele-educação rádio, televisão e jogos já são possíveis na Internet. É razoável propor que em um futuro próximo estas limitações tendam a desaparecer e será possível suportar aplicações bem mais sofisticadas e complexas, tais como realidade virtual e tele-presença. ...Observação: O resumo, na íntegra, poderá ser visualizado no texto completo da tese digital. / Abstract: The convergence of the services, applications and telecommunication networks is changing the way people do their things and interact to each other. With limitations, distributed computing, teleconference, tele-education, radio, television and games are already possible through the Internet. In a close future these limitations probably will disappear and it will be possible to provide new and more sophisticated applications as virtual reality and tele-presence....Note: The complete abstract is available with the full electronic document / Mestrado / Telecomunicações / Mestre em Engenharia Elétrica

[pt] Os avanços da Robótica nas últimas décadas permitem um aumento nas gamas de aplicações de manipuladores robóticos em diversos setores da indústria. Isto, impacta diretamente a interação Homem-Robô (HRI), resultando em um aumento de tarefas que requerem compartilhamento de ambiente de trabalho, desempenho de segurança e a habilidade de detecção de contato do manipulador robótico. Consequentemente, métodos de controle capazes de prever contato, controlar força ou trajetória para evitar danos durante colisões se tornam cada vez mais necessários seja por questões de segurança ou de desempenho. Separando a dinâmica de um manipulador de um único elo em dois modos, sendo eles modo de controle de posição (modo livre) e modo de controle de torque (modo de contato), a primeira parte desta dissertação, lida com o problema de estimação de estados para detecção do modo ativo através da implementação do método de Estimação de Estados de Horizonte móvel com Redes Neurais (NNMHSE). A efetividade do método de estimação proposto é avaliada através da comparação dos estados e modos gerados pelo MHSE e dos estimados pela Rede Neural. Este método apresentou baixos valores de RMSE, altos valores de R(2), e uma redução do tempo de processamento do algoritmo de estimação. A segunda parte desta dissertação lida com o problema de controle de posição e força chaveado para um manipulador robótico não linear, aplicando Controle Preditivo Baseado em Modelo (MPC). O algoritmo MPC chaveado implementado mostrou-se capaz de controlar efetivamente ambos os modos do sistema apresentando baixo erro na predição, aproximadamente 2 por cento no modo de controle de posição e 0.5 por cento no modo de controle de torque, mesmo considerando alterações cíclicas nos modos. Ambos os métodos provam ser adequados para controle de manipuladores robóticos colocalizados com seres humanos ou em ambientes desestruturados por meio da detecção do modo de operação e do controle chaveado posição-torque. / [en] The advances in Robotics in recent decades allow a growing range of robotic manipulator applications in various industry sectors. This directly impacts Human-Robot Interaction (HRI), increasing tasks that require a shared work environment, safety performance, and the contact detection ability of the robotic manipulator. Consequently, control methods capable of predicting contact, and controlling force or trajectory to avoid damage during collisions become increasingly necessary either for safety or performance reasons. Separating the dynamics of a single-link manipulator into two modes, namely position control mode (free mode) and torque control mode (contact mode), the first part of this dissertation deals with the estimation problem of states for active mode detection through the implementation of the Moving Horizon State Estimation with Neural Networks (NNMHSE) method. The effectiveness of the proposed estimation method is evaluated by comparing the states and modes generated by the MHSE and those estimated by the Neural Network. This method showed low RMSE values, high values of R(2), and a reduction in the processing time of the estimation algorithm. The second part of this dissertation deals with the position and force switching problem for a non-linear robotic manipulator, applying Model-Based Predictive Control (MPC). The implemented switched MPC algorithm effectively controlled both modes of the system, presenting low prediction error, approximately 2 percent in position control mode and 0.5 percent in torque control mode, even considering cyclical changes in the modes. Both methods prove to be suitable for controlling co-located robotic manipulators with humans or in unstructured environments through operation mode detection and position-torque switching control.