京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第19997号 / 工博第4241号 / 新制||工||1656(附属図書館) / 33093 / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 藤田 静雄, 准教授 船戸 充 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DGAM

No description available.

It is challenging to achieve low-resistive ohmic contacts to III-nitride semiconductors due to their wide bandgap. A common way to reduce the contact resistance is to recess the ohmic area prior to metallization. In the minimization of the contact resistance, parameters like the recess depth, anneal temperature and design of the metal stack are commonly optimized. In this work, three other approaches have been evaluated. All experiments were performed on AlGaN/GaN heterostructures. The fabricated ohmic contacts were recess etched, metallized with a Ta/Al/Ta stack, and annealed at 550-575◦C.Firstly, it is shown that the laser writer intensity, transmittance and focus offset during optical lithography affect the contact resistance. The reason is believed to be the variation in the resist profile, which has an impact on the metal coverage. At the optimum intensity/transmittance/focus condition, which generates a relatively medium undercut, a contact resistance of 0.23 Ωmm was obtained.In the second approach, the metal layer of annealed contacts was removed by wet etching, followed by the re-deposition of a metal stack and annealing. The purpose was to increase the amount of N vacancies in the AlGaN, which are responsible for the contact formation. A minimum contact resistance of 0.41 Ωmm was achieved with this method, compared to 0.28 Ωmm with the regular method (without remetallization).In the last approach, the bottom Ta layer was sputtered, whereas evaporation was used in all other cases. The minimum contact resistance was found to be 0.6 Ωmm, which was higher than for the evaporated contacts. The reason was assumed that the thickness of sputtered Ta should be thinner than the evaporated Ta due to its higher density. Moreover, the obtained lower sheet resistance is assumed to caused by the atomic scale damage due to the high energy ions during sputtering. / En utmaning med III-nitrid-halvledare är att uppnå låg-resistivitetskontakter, på grund av deras breda bandgap. Ett konventionellt tillvägagångsätt för att reducera kontaktresistansen är att fördjupa ohmska ytan före metallisering. I strävandet av att minska den ohmska resistansen sker vanligtvis en optimering av följande parametrar, recessddjup, anlöpningstemperatur och metallagersdesign. I detta arbete så har samtliga tre parametrar evaluerats. Alla experiment utfördes på AlGaN/GaNheterostrukturer. De tillverkade ohmska kontakterna var recesssetsade, metalliserade med ett Ta/Al/Ta lager och anlöpt vid 550-575◦C.Den primära undersökningen, visar att laserritar-intensitet, -transmission och fokusförskjutning under optisk litografi inverkar på kontaktresistansen. Anledningen antas vara variation i resistprofilen, vilket påverkar metallbeläggningen. Vid optimal intensitet/transmission/fokus-förhållanden, (som genererar en underskärning), blev den resulterande kontaktresistansen 0.23 Ωmm uppmätt.I en sekundär undersökning, avlägsnas ohmska kontaktens metallager genom våtetsning, följt av en återdeponering av ett nytt metallager, samt anlöpning. Syftet var att öka mängden N-vakanser i AlGaN-lagret, som formar ohmska kontakten. Minsta kontaktresistansen uppmätt var 0.41Wmm, att jämföras med 0.28 Ωmm, som uppnåddes genom den konventionella metoden (utan återmetallisering).Den sista undersökningen jämförde sputtrade med evaporerade bottenlager av Ta, (evaporation användes som standardmetod i de tidigare undersökningarna). Med sputtrning blev den minsta kontakresistansen 0.6 Ωmm, (högre än de evaporerade kontakterna). En hypotetisk förklarning kan vara att det sputtrade Ta-lagret är tunnare än det evaporerade Ta-lagret, på grund av en dess högre densitet. Därutöver, den uppmätta lägre skiktresistansen antas bero på den skada i atomskala som sker vid de höga energi-kollisioner som joner skapar vid sputtrning.

Wide bandgap semiconductors have been broadly investigated for their potential to detect and emit high energy ultraviolet (UV) photons. Advancements in deep UV optoelectronic materials would enable the efficient and affordable realization of many medical, industrial and consumer UV optical devices. The traditional growth method, vacuum deposition, is an extremely complicated and expensive process. Sol-gel processing dramatically simplifies facility requirements and can be scaled to industrial size. The work presented here involves a novel study of the ternary wide bandgap material Ni1-xMgxO. Films were developed by sol-gel spin coating for investigation of material and electrical properties. This method produced films 200-600 nm thick with surface roughness below 4 nm RMS. Sintered films indicated an improvement from 60% to 90% transmission near the band edge. Additionally, compositional analysis was performed by X-ray Photoelectron Spectroscopy and film defects were characterized by photoluminescence using a continuous wave He-Cd UV laser, revealing the expected oxygen defect at 413nm. This film growth technique has produced thin polycrystalline films with low surface roughness and a high degree of crystalline orientation; crucial characteristics for semiconductor devices. These films have demonstrated the ability to be tuned over the full compositional range from the bandgap of NiO (3.6 eV) to that of MgO (7.8 eV). Optoelectronic devices produced by standard photolithographic techniques are discussed as well as the electrical transport properties of their metal contacts. Based on initial results, these films have demonstrated strong potential as solar blind detectors of UV radiation.

In this work, a body of knowledge is presented which pertains to the growth, characterization and exploitation of high quality, novel II-IV oxide epitaxial films and structures grown by plasma-assisted molecular beam epitaxy. The two compounds of primary interest within this research are the ternary films NixMg1-xO and ZnxMg1-xO and the investigation focuses predominantly on the realization, assessment and implementation of these two oxides as optoelectronic materials. The functioning hypothesis for this largely experimental effort has been that these cubic ternary oxides can be exploited - and possibly even juxtaposed - to realize novel wide band gap optoelectronic technologies. The results of the research conducted presented herein overwhelmingly support this hypothesis in that they confirm the possibility to grow these films with sufficient quality by this technique, as conjectured. NixMg1-xO films with varying Nickel concentrations ranging from x = 0 to x = 1 have been grown on lattice matched MgO substrates (lattice mismatch ε < 0.01) and characterized structurally, morphologically, optically and electrically. Similarly, cubic ZnxMg1-xO films with Zinc concentrations ranging from x = 0 to x ≈ 0.53, as limited by phase segregation, have also been grown and characterized. Photoconductive devices have been designed and fabricated from these films and characterized. Successfully engineered films in both categories exhibit the desired deep ultraviolet photoresponse and therefore verify the hypothesis. While the culminating work of interest here focuses on the two compounds discussed above, the investigation has also involved the characterization or exploitation of related films including hexagonal phase ZnxMg1-xO, ZnO, CdxZn1-xO and hybrid structures based on these compounds used in conjunction with GaN. These works were critical precursors to the growth of cubic oxides, however, and are closely relevant. Viewed in its entirety, this document can therefore be considered a multifaceted interrogation of several novel oxide compounds and structures, both cubic and wurtzite in structure. The conclusions of the research can be stated succinctly as a quantifiably successful effort to validate the use of these compounds and structures for wide bandgap optoelectronic technologies.

The research of III-nitride wide-bandgap semiconductor devices, such as laser diodes (LDs), ultra-violet (UV) light-emitting diodes (LEDs), and high electron mobility transistors (HEMTs), has recently increased. Numerous opportunities exist for performance improvement in the wide bandgap semiconductor device structure, including material selection, compound compositions, polarization effects, and layer thicknesses. On the other hand, they can make optimization more challenging. It still takes a lot of resources to analyze and test complicated structures in a systematic manner. This dissertation creates a new path for device design by using TCAD and machine learning to deliver quick forecasts of III-nitride semiconductor device performance. The dissertation includes three major components. In Chapter 2, the TCAD-assisted HEMT device design is discussed. We demonstrate the performance improvement of using the new material BAlN as an interlayer in GaN/AlGaN HEMT devices and compare the various interlayer design alternatives for HEMTs. In chapter 3, we propose asymmetrical p-AlGaN/i-InGaN/n-AlGaN tunnel junctions (TJs) by combining machine learning (ML) with TCAD calculations. The resistances for 22254 various TJ structures were predicted by the model, which creates a tool for real-time TJ resistance prediction. Based on our TJ predictions, we proposed asymmetric TJ with higher Al content in the p-layer and lower TJ resistance. In Chapter 4, using the stacked XGBoost/LightGBM algorithm, we thoroughly examined the superlattice (SL) electron blocking layer (EBL) for AlGaN deep ultra-violet (DUV) LEDs. Based on the ML model, we suggest a low Al-content SL-EBL (1 nm/5 nm Al0.7Ga0.3N/Al0.58Ga0.42N) that is simpler, experimentally realizable and can greatly improve carrier transport. Additionally, we examine the prediction data and show how the composition and thickness affect the improvement of the IQE. The work contributes to the advancement of using SL-EBLs for high-efficiency DUV LEDs by providing methodical research on SL-EBLs. This dissertation presents novel approaches to the design of electrical and optical wide bandgap semiconductor devices, which opens up a new avenue for future research. It is possible that it might be used in a broad variety of fields, including illumination, sensing, disinfection, and power devices.

Electric and more-electric vehicle proliferation continues unabated as government mandates worldwide demand fuel economies in excess of what conventional internal combustion engines are capable of. Vehicle electrification, to any degree, is perceived to be the means by which automotive companies may meet these targets. Electrification introduces a myriad of problems including cost, weight and reliability, all of which must be addressed in their own right. The rapid commercialisation of wide-bandgap semiconductor materials which, as a whole, exhibit properties superior to ubiquitous Silicon, provides the opportunity for power electronic converter minimisation and efficiency maximisation, easing the challenge of meeting current and incoming standards. This thesis concerns itself with the design methodology of a highly power dense converter, as applied to a three-phase inverter. By using figures of merit, simple modelling techniques and novel discrete component selection tools, a converter is designed that is capable of switching 30kW of electric power at 100kHz in a small package. Testing results show that the converter, with a simple forced air heatsinking solution, can effectively switch 9kW of power and is capable of reaching 15kW. Given the temperature rise of one phase leg of the inverter relative to the others, a superior heatsink design would allow the inverter to reach its rated power levels. / Dissertation / Master of Applied Science (MASc)

Common mode performance is important for photovoltaic applications where the common mode voltage can become hazardous to people near the solar installation and can cause reliability concerns in inverters. The proposed dual-buck inverter uses hybrid unipolar modulation and a topology that is modified from the standard full-bridge dual-buck inverter to address the common mode voltage concerns. In the proposed design, the fast-switching side of the inverter is identical to a half-bridge dual-buck inverter, while the side that switches at line frequency uses a half-bridge of the standard H-bridge inverter topology. The motivation of this design is to realize the benefits of unipolar modulation and the dual-buck topology, while improving the poor common-mode voltage performance associated with unipolar modulation by utilizing hybrid switching. Unipolar switching has benefits which carry over to the hybrid switching scheme, such as reduced current ripple allowing use of smaller inductors. Additionally, the dual-buck topology enables the effective use of faster switches due to the elimination of dead time and reverse recovery concerns by using devices such as wide-bandgap GaN HEMTS and SiC Schottky diodes. The proposed inverter topology also realizes the benefits of the dual-buck topology while using half of the number of diodes and inductors compared to a standard full-bridge dual-buck inverter. The use of this modified dual-buck topology and hybrid unipolar modulation results in an inverter which has favorable common mode voltage characteristics. These characteristics indicate that this inverter would be useful in applications sensitive to common mode voltage concerns, such as photovoltaic applications. The performance of this topology using hybrid unipolar modulation is investigated using simulations and by creating and testing a 300-watt prototype inverter. / Master of Science / The popularity of photovoltaic panels has been increasing rapidly in recent years due to popular desire to reduce reliance on nonrenewable energy sources and steady reductions in the cost of solar power installations. The DC power provided by photovoltaic panels requires an inverter to create AC power to interface with the grid. However, in some scenarios the common-mode voltage can induce leakage current in the system, which can be hazardous to nearby people. Leakage current is larger for systems with high parasitic capacitance and for inverters that create high frequency components in their common mode voltage. Photovoltaic panels tend to have high parasitic capacitance, causing leakage current concerns. Additionally, advancements in wide bandgap devices enable inverters to operate at increasingly higher switching frequencies, and this is typically advantageous because it allows size reduction of expensive and heavy components used in inverter output filters. However, this can exacerbate leakage current concerns by introducing high frequency components to the common mode voltage. These developments create an incentive to investigate inverter designs that can mitigate leakage current concerns by creating favorable common mode voltage waveforms. Many existing solutions require circuit topologies with additional switches or use additional components like an isolation transformer or an additional common mode filter. These solutions add cost and complexity to inverter design. This thesis investigates a circuit topology based on a dual-buck inverter using hybrid unipolar switching, which will effectively utilize wide bandgap devices operating at high frequencies. The use of hybrid unipolar switching produces favorable common mode voltage characteristics that mitigates leakage current concerns while maintaining the quality of the output waveform, and the topology uses fewer diodes and inductors than a traditional dual-buck inverter. The design is evaluated through simulation and by creating and testing a 300-watt prototype to determine if it is suitable for photovoltaic applications and other applications where common mode voltage and leakage current are major concerns.

Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is larger than that of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this ultra-wide bandgap is the high-temperature stability due to the low intrinsic carrier concentration. Another benefit is the high critical electric field (Ec), which is estimated to be from 6 MV/cm to 8 MV/cm in Ga2O3. This allows for a superior Baliga's figure of merit (BFOM) of unipolar Ga2O3 power devices, i.e., they potentially can achieve a smaller specific on-resistance (RON,SP) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). The above prospects make Ga2O3 devices the promising candidates for next-generation power electronics. This dissertation explores the design, fabrication, characterization, and packaging of vertical β-Ga2O3 Schottky barrier diodes (SBDs) and P-N diodes. The power SBDs allow for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. Meanwhile, the Ga2O3 power P-N diodes have the benefit of smaller leakage current, and the diode structure could be a building block for many advanced diodes and transistors. Hence, the study of Ga2O3 Schottky and P-N diodes is expected to provide the foundation for developing a series of Ga2O3 power devices. Firstly, vertical Ga2O3 Schottky and P-N diodes with a novel edge termination (ET), the multi-layer Nickel Oxide (NiO) junction termination extension (JTE), are fabricated on Ga2O3 substrates. This multi-JTE NiO structure decreases the peak electric field (Epeak) at the triple point of device edge when the Ga2O3 diodes are reversely biased. For SBDs, BV reach 2.5 kV, the 1-D junction field reaches 3.08 MV/cm, and the BFOM exceeds 1 GW/cm2. For P-N diodes, BV reaches 3.3 kV, the junction field reaches 4.2 MV/cm, and the BFOM reaches 2.6 GW/cm2. These results are among the highest in Ga2O3 power devices and are comparable to the state-of-the-art vertical GaN Schottky and P-N diodes. Notably, all these diodes are small-area devices. Secondly, large-area (3 mm×3 mm anode size) Ga2O3 Schottky and P-N diodes with high current capability are fabricated to explore the packaging, thermal management, and switching characteristics of Ga2O3 diodes. The same ET is applied for the large-area P-N diode. The fabricated large-area P-N diodes have a turn-on voltage of 2 V, a differential on-resistance (Ron) of 0.2 Ω, and they can reach at least 15 A when measured in the pulse mode. The BV of large-area Ga2O3 P-N diodes varies due to the fabrication non-uniformity, but the best device achieves a BV of 1.6 kV, standing among the highest values reported for large-area Ga2O3 diodes. Also, the large-area Ga2O3 SBDs with similar current rating but with a FP ET are fabricated mainly for the packaging and thermal management studies. Thirdly, medium-area Ga2O3 P-N diodes with a current over 1 A and a higher yield of BV are fabricated to evaluate the JTE's capacitance and switching characteristics. The JTE accounts for only ~11% of the junction capacitance of this 1 A diode, and the percentage is expected to be even smaller for higher-current diodes. The turn-on/off speed and reverse recovery time of the diode are comparable to commercial SiC Schottky barrier diodes under the on-wafer switching test. These results show the viability of NiO JTE for enabling a fast switching speed in high-voltage Ga2O3 power devices. Fourthly, the fabricated large-area Ga2O3 diodes are packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity (kT) and better reliability as compared to the solder joint. Due to the low kT of Ga2O3 material, junction-side-cooled (JSC) packaging configuration is necessary for Ga2O3 devices. For the packaged device, its junction-to-case thermal resistance (RθJC) is measured in the bottom-side-cooled (BSC) and junction-side-cooled (JSC) configuration by the transient dual interface method according to the JEDEC 51-14 standard. The RθJC of the junction- and bottom-cooled Ga2O3 SBD is measured to be 0.5 K/W and 1.43 K/W, respectively. The former RθJC is lower than that of similarly-rated commercial SiC SBDs. This manifests the significance of JSC packaging for the thermal management of Ga2O3 devices. Fifthly, to evaluate the electrothermal robustness of the packaged Ga2O3 devices, the surge current capability of JSC packaged Ga2O3 SBDs are measured. The Ga2O3 SBDs with proper packaging show high surge current capabilities. The double-side-cooled (DSC) large-area Ga2O3 SBDs can sustain a peak surge current over 60 A, with a ratio between the peak surge current and the rated current superior to that of similarly-rated commercial SiC SBDs. These results show the excellent ruggedness of Ga2O3 power devices. Finally, a Ga2O3 integrated diode module consisting of four single-diode sub-modules is designed and fabricated. For many power electronics applications, high current is desired; however, for emerging semiconductors, the current upscaling is difficult by directly increasing the device area because of the limitation of heat extraction capability and the limited material/processing yield. Here we explore the paralleling of multiple Ga2O3 P-N diodes to increase the current level. For each sub-module, the JSC packaging structure is used for heat extraction, and a metal post is sintered to the anode for electric field (E-field) management. RθJC is measured to be 1 W/K for each sub-module. On-board double-pulsed test is performed for both the sub-module and the full module. The sub-module and full module demonstrate 400 V, 10 A and 150 V, 70 A switching capabilities, respectively. This is the first demonstration of Ga2O3 power module and shows a promising approach to upscale of the power level of Ga2O3 power electronics. In addition to Ga2O3 device study, a research is conducted to explore the chip size (Achip) minimization for wide-bandgap (WBG) and ultra-wide bandgap (UWBG) power devices. Achip optimization is particularly critical for WBG and UWBG power devices and modules due to the high material cost. This work presents a new, holistic, electrothermal approach to optimize Achip for a given set of target specifications including BV, conduction current (I0), and switching frequency (f). The conduction and switching losses of the device are considered, as well as the heat dissipation in the chip and its package. For a given BV and I0, the optimal Achip, Wdr, and Ndr show strong dependence on f and thermal management. Our approach offers more accurate cost analysis and design guidelines for power modules. In summary, this dissertation covers the design, fabrication, characterization, and packaging of Ga2O3 Schottky and P-N diodes, with the aim to advance Ga2O3 devices to power electronics applications. This dissertation addresses many knowledge gaps on Ga2O3 devices, including the voltage upscaling (ET), current upscaling (large-area device fabrication, packaging, and thermal management), and their concurrence (module demonstration), as well as the circuit-level switching characterizations. / Doctor of Philosophy / Power electronics is the processing of electric energy using solid-state electronics. It is ubiquitously used in consumer electronics, data centers, electric vehicles, electricity grids, and renewable energy systems. Advanced power device technologies are paramount to improving the performance of power electronic systems. Power device design centers on the concurrent realization of low on-resistance (RON), high breakdown voltage (BV), and small turn-on/turn-off power losses. A key driver for advancement of power devices is the semiconductor material. Over the last decade, power devices based on wide-bandgap semiconductors like SiC and GaN have enabled tremendous performance advancements in power electronic systems. On the horizon, Ga2O3 is an emerging semiconductor with an ultra-wide bandgap (UWBG) of 4.5–4.9 eV, which is higher than that of Si, SiC, and GaN. Benefitted from this larger bandgap, the theoretical performance of Ga2O3 power devices is superior to the Si, SiC, and GaN counterparts. Hence, Ga2O3 devices are regarded as the promising candidates for next-generation power electronics. The power diode is an important component in power circuits, and the diode structure is usually a building block for power transistors. Small-area (0.1 A current level) Ga2O3 Schottky barrier diodes (SBDs) and P-N diodes are first designed and fabricated with a novel ET, the NiO JTE, reaching a high BV from 2.5 to 3.5 kV and junction E-field up to 4.2 MV/cm. Subsequently, large-area (>15 A current level) Ga2O3 diodes are fabricated with the same ET, achieving a BV of 1.6 kV, which is among the highest BV demonstrated in large-area Ga2O3 devices. In addition, on-wafer switching tests are performed on the medium-area (1 A current level) Ga2O3 P-N diodes, and their turn-on/off speed and reverse recovery time are comparable to commercial SiC Schottky barrier diodes. In addition to voltage upscaling, current upscaling is also a key challenge for Ga2O3 power devices. To overcome the low thermal conductivity (kT) of Ga2O3, junction side cooling (JSC) packaging is used to increase the heat extraction capability of Ga2O3 diode, enabling the demonstration of a junction-to-case thermal resistance comparable to that of similarly-rated, commercial SiC diode. Benefitted from this enhanced heat extraction, the packaged Ga2O3 diodes show an excellent surge current robustness. Finally, a Ga2O3 integrated diode module consisting of four single-diode sub-modules is designed, fabricated, and tested in the on-board switching circuits up to 70 A and 400 V. This is the first demonstration of a Ga2O3 power module. In summary, this dissertation covers the design, fabrication, characterization, and packaging of Ga2O3 power diodes with the aim to advance Ga2O3 devices to power electronics applications. This dissertation addresses many knowledge gaps on the voltage upscaling, current upscaling, and the circuit-level switching characteristics of Ga2O3 power devices and modules and thus pave the road for their power electronics applications.

No description available.