L’appropriation d’algorithmes existants, la création d’outils numériques et des recherches conceptuelles ont mené à la création de deux installations audiovisuelles interactives. La première, Deep Duo, met en scène des réseaux de neurones artificiels contrôlant des synthétiseurs modulaires. La deuxième, Morphogenèse, l’œuvre d’envergure de ce mémoire, met en relation le spectateur avec des modèles profonds génératifs et le place face à des représentations artificielles de sa voix et de son visage. Les installations et leurs fonctionnements seront décrits et, à travers des exemples de stratégies créatives et des concepts théoriques en lien avec l’interactivité et l’esthétique des comportements, des pistes pour favoriser l’utilisation d’algorithmes d’apprentissage automatique à des fins créatives seront proposées. / The appropriation of existing algorithms, the creation of digital tools and conceptual research have led to the creation of two interactive audiovisual installations. The first, Deep Duo, features artificial neural networks controlling modular synthesizers. The second, Morphogenesis, the major work of this dissertation, connects the viewer with generative deep models and places them in front of artificial representations of their voice and face. We will describe these installations and their functioning and, through examples of creative strategies and theoretical concepts related to interactivity and the aesthetics of behaviour, we will propose ways to promote the use of machine learning algorithms for creative purposes.

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Articulatory synthesis is based on modeling various physical phenomena of speech production, including sound radiation from the mouth. With regard to sound radiation, the most common approach is to approximate it in terms of a simple spherical source of strength equal to the mouth volume velocity. However, because this approximation is only valid at very low frequencies and does not account for the diffraction by the head and the torso, we simulated two alternative radiation characteristics that are potentially more realistic: the radiation from a vibrating piston in a spherical baffle, and the radiation from the mouth of a detailed model of the human head and torso. Using the articulatory speech synthesizer VocalTractLab, a corpus of 10 sentences was synthesized with the different radiation characteristics combined with three different phonation types. The synthesized sentences were acoustically compared with natural recordings of the same sentences in terms of their long-term average spectra (LTAS), and evaluated in terms of their naturalness and intelligibility. The intelligibility was not affected by the type of radiation characteristic. However, it was found that the more similar their LTAS was to real speech, the more natural the synthetic sentences were perceived to be. Hence, the naturalness was not directly determined by the realism of the radiation characteristic, but by the combined spectral effect of the radiation characteristic and the voice source. While the more realistic radiation models do not per se improve synthesis quality, they provide new insights in the study of speech production and articulatory synthesis.

There has been a huge rise in interest in the design of energy efficient wireless sensor networks (WSN) and body area networks (BAN) with the advent of many new applications over the last few decades. The number of sensor nodes in these applications has also increased tremendously in the order of few hundreds in recent years. A typical sensor node in a WSN consists of circuits like RF transceivers, micro-controllers or DSP, ADCs, sensors, and power supply circuits. The RF transmitter and receiver circuits mainly the frequency synthesizers(synthesis of RF carrier and local oscillator signals in transceivers) consume a significant percentage of its total power due to its high frequency of operation. A charge-pump phase locked loop (CP-PLL) is the most commonly used frequency synthesizer architecture in these applications. The growing demands of WSN applications, such as low power consumption larger number of sensor nodes, single chip solution, and longer duration operation presents several design challenges for these transmitter and frequency synthesizer circuits in these applications and a few are listed below, Low power frequency synthesizer and transmitter designs with better spectral performance is essential for an energy efficient operation of these applications. The spurious tones in the frequency synthesizer output will mix the interference signals from nearby sensor nodes and from other interference sources present nearby ,to degrade the wireless transmitter and receiver performance[1]. With the increased density of sensor nodes (more number of in-band interference sources) and degraded performance of analog circuits in the nano-meter CMOS process technologies, the spur reduction techniques are essential to improve the performance of frequency synthesizers in these applications. A single chip solution of sensor nodes with its analog and digital circuits integrated on the same die is preferred for its low power, low cost, and reduced size implementation. However, the parasitic interactions between these analog and digital sub-systems integrated on a common substrate, degrade the spectral performance of frequency synthesizers in these implementations[2]. Therefore, techniques to improve the mixed signal integration performance of these circuits are in great demand. In this thesis, we present a custom designed energy efficient 2.4 GHz BFSK/ASK transmitter architecture using a low power frequency synthesizer design technique taking advantage of the CMOS technology scaling benefits. Furthermore, a few design guidelinesandsolutionstoimprovethespectralperformanceoffrequency synthesizer circuits and in-turn the performance of transmitters are also presented. The target application being short distance, low power, and battery operated wireless communication applications. The contributions in this thesis are, Spectral performance improvement techniques The CP mismatch current is a dominant source of reference spurs in the nano-meter CMOS PLL implementations due to its worsened channel length modulation effect [3]. In this work, we present a CP mismatch current calibration technique using an adaptive body bias tuning of its PMOS transistors. Chip prototype of 2.4 GHzCP-PLLwith the proposed CP calibration technique was fabricated in UMC 0.13 µm CMOS process. Measurements show a CP mismatch current of less than 0.3 µA(0.55 %) using the proposed calibration technique over the VCO control voltage range 0.3 to 1 V. The closed loop PLL measurements using the proposed technique exhibited a 9dB reduction in the reference spur levels across the PLL output frequency range 2.4 -2.5 GHz. The parasitic interactions between analog and digital circuits through the common substrate severely affects the performance of CP-PLLs. In this work, we experimentally demonstrate the effect of periodic switching noise generated from the digital buffers on the performance of charge-pump PLLs. The sensitivity of PLL performance metrics such as output spur level, phase noise, and output jitter are monitored against the variations in the properties of a noise injector digital signal. Measurements from a 500 MHz CP-PLL shows that the pulsed noise injection with the duty cycle of noise injector signal reduced from 50% to 20%, resulted in a 12.53 dB reduction in its output spur level and a 107 ps reduction in its Pk-Pk deterministic period jitter performance. Low power circuit techniques A low power frequency synthesizer design using a digital frequency multiplication technique is presented. The proposed frequency multiply by 3 digital edge combiner design having a very few logic gates, demonstrated a significant reduction in the power consumption of frequency synthesizer circuits, with an acceptable spectral performance suitable for these relaxed performance applications. A few design guidelines and techniques to further improve its spectral performance are also discussed and validated through simulations. Chip prototypes of 2.4 GHz CP-PLLs with and without digital frequency multiplier circuits are fabricated in UMC 0.13 µm CMOS process. The 2.4 GHz CP-PLL using the proposed digital frequency multiplication technique (10.7 mW) consumed a much reduced power compared to a conventional implementation(20.3 mW). A custom designed, energy efficient 2.4 GHz BFSK/ASK transmitter architecture using the proposed low power frequency synthesizer design technique is presented. The transmitter uses a class-D power amplifier to drive the 50Ω antenna load. Spur reduction techniques in frequency synthesizers are also used to improve the spectral performance of the transmitter. A chip prototype of the proposed transmitter architecture was implemented in UMC0.13 µm CMOS process. The transmitter consume14 mA current from a 1.3V supply voltage and achieve improved energy efficiencies of 0.91 nJ/bit and 6.1 nJ/bit for ASK and BFSK modulations with data rates 20Mb/s & 3Mb/s respectively.

The main aim of the thesis is to develop a solution of a frequency synthesizer for a microwave communication systems. Specifically, it suggests a design for frequency synthesizer with phase-locked loop. At beginning of the thesis the principle and basic properties of this method of signal generation are explained. Then it is followed by a brief discussion of the parameters of synthesizers and their influence on design. Another part of the work is the analysis of circuit the frequency synthesizer with the phase-locked loop MAX2871, which is followed by a proposal for the design of the frequency synthesizer module hardware. The last part of the work deals with practical implementation, verification of function and measurement of achieved parameters and their evaluation.

The master´s thesis is focused on design of ADSR filter and voltage controlled amplifier (VCA). Three additional circuits performing analog signal processing are added. Functionality of designed circuits is verified in simulation program. All designed circuits are practically realized. Thesis includes complete design of the mentioned circuits and all necessary informations for its practical realization. All designed circuits are measured and the results are presented.