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Synthesis and Functionalization of Coiled Carbon FilamentsHikita, Muneaki January 2014 (has links)
No description available.
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Electrochemically Induced Urea to Ammonia on Ni Based CatalystLu, Fei 19 September 2017 (has links)
No description available.
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Development of MOCVD GaN Homoepitaxy for Vertical Power Electronic Device ApplicationsZhang, Yuxuan 02 September 2022 (has links)
No description available.
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Matériaux nanostructurés polymères conjugués/nanotubes de carbone verticalement alignés pour la réalisation de supercondensateurs / Nanostructured materials based on conjugated polymers and vertically aligned carbon nanotubes for supercapacitor applicationsPorcher, Marina 14 December 2016 (has links)
Les travaux réalisés dans le cadre de cette thèse ont porté sur la réalisation de matériaux composites nanostructurés à base de nanotubes de carbone verticalement alignés (NTC alignés) et de polymères π-conjugués en vue de leur utilisation en tant que matériaux d’électrodes dans des dispositifs de stockage d’énergie de type supercondensateurs. Dans une première partie, les travaux se sont focalisés sur la croissance par CVD d’aérosol de NTC sur des substrats d’acier inoxydable via le dépôt préalable d’une sous-couche céramique SiOx. Grâce à l’optimisation de ce procédé, des tapis de NTC longs, denses et alignés pouvant directement servir de supports à l’électrodépôt de polymères π-conjugués ont pu être obtenus. Dans une seconde partie, les travaux se sont concentrés sur l’électrodépôt de poly(3-méthylthiophène) (P3MT) en milieu liquide ionique EMITFSI sur les tapis de NTC alignés à partir d’une méthode chronopotentiométrique « séquencée » permettant de réaliser des dépôts homogènes dans la profondeur des tapis. Une composition massique optimale de 70 % de P3MT permettant d’atteindre des capacitances spécifiques de 170 F.g-1 de polymère tout en conservant des cinétiques de charge-décharges élevées, comparativement à des composites NTC/P3MT enchevêtrés, a pu être déterminée. A partir des matériaux composites optimisés, des dispositifs symétriques NTC/P3MT // P3MT/NTC et hybrides CA // P3MT/NTC ont été assemblés. Le dispositif hybride à notamment permis d’atteindre une tension de 2,7 V et une capacitance de système de 26 F.g-1 en milieu EMITFSI à 25 °C. Par ailleurs, une énergie maximale de 23 Wh.kg-1 et une puissance maximale de 6,9 kW.kg-1 ont été obtenues avec une perte de seulement 7 % après 4000 cycles. Pour finir, l’électrodépôt de polypyrrole (Ppy) a été étudié dans différents milieux liquides ioniques protiques et aprotiques. Après des études réalisées par microbalance à cristal de quartz permettant de mieux comprendre les mécanismes d’insertion des espèces ioniques lors de la croissance du polymère conjugué et lors de son dopage positif réversible, des dépôt de Ppy ont été réalisés et optimisés dans la profondeur des tapis de NTC alignés. Des nanocomposites NTC alignés/Ppy présentant des capacitances spécifiques comprises entre 100 et 130 F.g-1 ont ainsi pu être obtenus. / This thesis focused on the elaboration of nanostructured composite materials based on vertically aligned carbon nanotubes (aligned CNT) and π-conjugated polymers and their use as electrode materials in supercapacitor-type energy storage devices. The first part focused on aligned CNT growth by aerosol-assisted CVD on stainless steel substrates and the deposition of a SiOx ceramic sublayer. Thanks to the optimization of this growth process, long, dense, and aligned CNT carpets which can directly act as support for the electrodeposition of π-conjugated polymers were obtained. The second part focused on the electrodeposition of poly (3-methylthiophene) (P3MT) in EMITFSI ionic liquid medium on aligned CNT carpets using a “pulsed” chronopotentiometric method to produce homogeneous deposits in the depth of the carpets. An optimal P3MT mass composition of 70 %, which helped achieve a specific capacitance of 170 F.g-1 of polymer while maintaining high charge-discharge kinetics, compared with NTC/P3MT entangled composites, was determined. NTC/P3MT // P3MT/NTC symmetrical devices and CA // P3MT/NTC hybrid devices were assembled using the optimized composite materials. The hybrid device reached a voltage of 2.7 V and a system capacitance of 26 F.g-1 in EMITFSI at 25 ° C. Furthermore, a maximum energy of 23 Wh.kg-1 and a maximum power of 6.9 kW.kg-1 were obtained with only a 7 % loss after 4000 cycles. Finally, the electrodeposition of polypyrrole (Ppy) was investigated in different protic and aprotic ionic liquids. After quartz crystal microbalance studies in order to better understand the insertion mechanisms of ionic species during conjugated polymer growth and during its reversible positive doping, the electrodeposition of Ppy within the deepness of the aligned CNT carpets was optimized. Aligned CNT/Ppy nanocomposites with specific capacitances ranging between 100 and 130 F.g-1 were obtained.
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Interfaces dans les matériaux céramiques multicouchesThibaud, Simon 22 December 2010 (has links)
L’augmentation du nombre d’interfaces dans une matrice céramique permet d’améliorer sa ténacité. L’étude de la structure feuilletée de la nacre a démontré que cette ténacité pouvait être accrue par la présence de pontages entre les couches. Dans la première partie, le modèle de décohésion proposé par Pompidou et al. a été utilisé pour choisir un bicouche dont l’interface est naturellement favorable aux décohésions. Compte tenu du contexte de l’étude, cette analyse a permis de choisir le couple SiC/pyC comme bi-couche de base pour l’étude des interfaces. Par la suite, des matrices multicouches modèles (SiC/pyC)n (SiC, carbure de silicium issu du mélange CH3SiCl3/H2 – pyC, pyrocarbone à partir du propane) ont été élaborées par dépôt chimique en phase vapeur (CVD). Deux voies de pontage ont été abordées. La première met en œuvre une discontinuité entre les couches : les conditions d’élaboration ont été optimisées de façon à contrôler la croissance de couches minces massives et le développement de particules de surface (submicroniques) faisant office de pontage. La deuxième est basée sur un gradient de composition entre les couches de SiC grâce au développement d’une couche de SiC riche en co-dépôt de carbone, une interphase mixte est créée. Le pontage est assuré par la présence simultanée dans les couches à gradient de composition de grains de SiC et d’une phase carbonée. Les propriétés physico-chimiques et structurales des différents éléments des matrices ont été analysées et les différents comportements des fissures dans chacune des matrices ont été observés à la suite d’essais mécaniques. / The improvement of ceramic matrix toughness may be achieved through the presence of interfaces. Moreover, studies on a mother of pearl structure have shown the usefulness of mineral bridges between the layers. On the first part of this work, the Pompidou model was used for the selection of a bi-layered ceramic with an interface which is naturally favorable to crack deflection. SiC/pyC was taken as basic material for the interfaces study. Then, multilayered ceramic matrices (SiC/pyC)n (silicon carbide from CH3SiCl3/H2 mixture – pyC from propane) were fabricated using chemical vapor deposition (CVD). In the study, two bypass ways were proposed. On the one hand, a physical discontinuity exists between the different layers: elaboration parameters were optimized in order to develop both bulk layers and submicronic surface particles, acting as ceramic bypass. On the other hand, composition gradient films were developed between each SiC layers: by realizing carbon rich SiC layers, a mixed interphase was created. The presence of both SiC grains and carbon phases ensures the bypass structure. Physico-chemical and structural properties of multilayered ceramic matrices were analyzed and the crack propagation in each of them was observed following mechanical tests.
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Quantum Chemical Feasibility Study of Methylamines as Nitrogen Precursors in Chemical Vapor DepositionRönnby, Karl January 2015 (has links)
The possibility of using methylamines instead of ammonia as a nitrogen precursor for the CVD of nitrides is studied using quantum chemical computations of reaction energies: reaction electronic energy (Δ𝑟𝐸𝑒𝑙𝑒𝑐) reaction enthalpy (Δ𝑟𝐻) and reaction free energy (Δ𝑟𝐺). The reaction energies were calculated for three types of reactions: Uni- and bimolecular decomposition to more reactive nitrogen species, adduct forming with trimethylgallium (TMG) and trimethylaluminum (TMA) followed by a release of methane or ethane and surface adsorption to gallium nitride for both the unreacted ammonia or methylamines or the decomposition products. The calculations for the reaction entropy and free energy were made at both STP and CVD conditions (300°C-1300°C and 50 mbar). The ab inito Gaussian 4 (G4) theory were used for the calculations of the decomposition and adduct reactions while the surface adsorptions were calculated using the Density Functional Theory method B3LYP. From the reactions energies it can be concluded that the decomposition was facilitated by the increasing number of methyl groups on the nitrogen. The adducts with mono- and dimethylamine were more favorable than ammonia and trimethylamine. 𝑁𝐻2 was found to be most readily to adsorb to 𝐺𝑎𝑁 while the undecomposed ammonia and methylamines was not willingly to adsorb.
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Light Matter Interactions in Two-Dimensional Semiconducting Tungsten Diselenide for Next Generation Quantum-Based Optoelectronic DevicesBandyopadhyay, Avra Sankar 12 1900 (has links)
In this work, we explored one material from the broad family of 2D semiconductors, namely WSe2 to serve as an enabler for advanced, low-power, high-performance nanoelectronics and optoelectronic devices. A 2D WSe2 based field-effect-transistor (FET) was designed and fabricated using electron-beam lithography, that revealed an ultra-high mobility of ~ 625 cm2/V-s, with tunable charge transport behavior in the WSe2 channel, making it a promising candidate for high speed Si-based complimentary-metal-oxide-semiconductor (CMOS) technology. Furthermore, optoelectronic properties in 2D WSe2 based photodetectors and 2D WSe2/2D MoS2 based p-n junction diodes were also analyzed, where the photoresponsivity R and external quantum efficiency were exceptional. The monolayer WSe2 based photodetector, fabricated with Al metal contacts, showed a high R ~502 AW-1 under white light illumination. The EQE was also found to vary from 2.74×101 % - 4.02×103 % within the 400 nm -1100 nm spectral range of the tunable laser source. The interfacial metal-2D WSe2 junction characteristics, which promotes the use of such devices for end-use optoelectronics and quantum scale systems, were also studied and the interfacial stated density Dit in Al/2D WSe2 junction was computed to be the lowest reported to date ~ 3.45×1012 cm-2 eV-1.
We also examined the large exciton binding energy present in WSe2 through temperature-dependent Raman and photoluminescence spectroscopy, where localized exciton states perpetuated at 78 K that are gaining increasing attention for single photon emitters for quantum information processing. The exciton and phonon dynamics in 2D WSe2 were further analyzed to unveil other multi-body states besides localized excitons, such as trions whose population densities also evolved with temperature. The phonon lifetime, which is another interesting aspect of phonon dynamics, is calculated in 2D layered WSe2 using Raman spectroscopy for the first time and the influence of external stimuli such as temperature and laser power on the phonon behavior was also studied. Furthermore, we investigated the thermal properties in 2D WSe2 in a suspended architecture platform, and the thermal conductivity in suspended WSe2 was found to be ~ 1940 W/mK which was enhanced by ~ 4X when compared with substrate supported regions.
We also studied the use of halide-assisted low-pressure chemical vapor deposition (CVD) with NaCl to help to reduce the growth temperature to ∼750 °C, which is lower than the typical temperatures needed with conventional CVD for realizing 1L WSe2. The synthesis of monolayer WSe2 with high crystalline and optical quality using a halide assisted CVD method was successfully demonstrated where the role of substrate was deemed to play an important role to control the optical quality of the as-grown 2D WSe2. For example, the crystalline, optical and optoelectronics quality in CVD-grown monolayer WSe2 found to improve when sapphire was used as the substrate. Our work provides fundamental insights into the electronic, optoelectronic and quantum properties of WSe2 to pave the way for high-performance electronic, optoelectronic, and quantum-optoelectronic devices using scalable synthesis routes.
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Fabricação de novas heteroestruturas a partir de estruturas SOI obtidas pela técnica \'smart-cut\'. / New semiconductor heterostructures based on SOI structures obtained by \"smart-cut\" process.Neisy Amparo Escobar Forhan 17 March 2006 (has links)
Esta pesquisa engloba o estudo e desenvolvimento de novas heteroestruturas semicondutoras, tomando como base as estruturas SOI (Silicon-On-Insulator - silício sobre isolante) obtidas pela técnica Smart Cut, estudadas nestes últimos anos no Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). Esta técnica combina a solda direta para a união de lâminas e a implantação iônica (I/I) de íons leves para a separação de camadas especificadas. São essenciais na preparação destas estruturas SOI, processos de I/I, limpeza e ativação das superfícies das lâminas e recozimentos em fornos a temperaturas moderadas. Estudamos também, diferentes métodos para a obtenção de novas heteroestruturas, basicamente combinando as técnicas de fabricação da estrutura SOI e os métodos de formação do carbeto de silício (SiC), que chamaremos de heteroestruturas SiCOI (Silicon Carbide-On-Insulator). O método usado para a formação do SiC depende, em cada caso, das características desejadas para o filme que, ao mesmo tempo, estão relacionadas com a aplicação à qual estará destinado. Analisamos três métodos de obtenção do material SiC com características específicas diferentes. A metodologia proposta aborda as seguintes tarefas: Tarefa 1: Obtenção de estruturas SOI pelo método convencional utilizado em trabalhos anteriores e melhoramento das características superficiais da estrutura resultante. Tarefa 2: partindo de uma lâmina de Si previamente coberta por uma camada isolante, fabricar a heteroestrutura SiC/isolante/Si, onde a camada de SiC é crescida pelo método de deposição química de vapor assistida por plasma (PECVD). O filme obtido por deposição PECVD é amorfo e portanto são necessárias etapas de cristalização posteriores ao crescimento. Tarefa 3: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por implantação de íons de carbono (C+) na camada ativa de Si da estrutura SOI para sua transformação em SiC. Tarefa 4: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por conversão direta da camada ativa de Si da estrutura SOI em SiC como resultado da carbonização do Si usando exposição a ambiente de hidrocarbonetos. Como resultado deste trabalho foram obtidas estruturas SOI Smart Cut com valor médio de rugosidade superficial dentro dos valores esperados segundo a bibliografia consultada. Durante o desenvolvimento de heteroestruturas SiC/isolante/Si obtidas utilizando a técnica de PECVD obtivemos filmes com boas características estruturais. Os recozimentos feitos em ambiente de N2 aparentemente trazem resultados satisfatórios, conduzindo à completa cristalização dos filmes. Nas análises feitas para a fabricação de heteroestruturas SiC/isolante/Si utilizando I/I de carbono confirma-se a formação de c-SiC depois de realizado o recozimento térmico. / In this work we study new semiconductors heterostructures, based on SOI (Silicon-On- Insulator) structures obtained by \"Smart-Cut\" process, that were studied in the last years at Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). This technique combines high-dose hydrogen ion implantation (I/I) and direct wafer bonding. To produce SOI structures some processes are essential: I/I process, cleaning and activation of the surfaces, and conventional thermal treatments at moderated temperatures. We also investigate different methods to obtain new heterostructures, basically combining SOI technologies and silicon carbide (SiC) growth processes, which will be called as SiCOI (Silicon Carbide-On-Insulator) heterostructures. The utilized methods to obtain the SiC are related, in each case, with the desired film\'s characteristics, which at the same time are associated with the final application. We analyze three methods to obtain SiC material with specific different characteristics. The proposed methodology approaches the following tasks: Task 1: Fabrication of SOI structures by the conventional technology previously used by us, and the improvement of superficial characteristic of the final structure. Task 2: Fabrication of SiC/insulator/Si heterostructures from Si substrate previously covered with an insulator capping layer, where the SiC layer is deposited by plasma enhanced chemical vapor deposition (PECVD). The PECVD film is amorphous and therefore, a thermal annealing step is necessary for crystallization. Task 3: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is synthesized through a high dose carbon implantation into the thin silicon overlayer of a SOI wafer. Task 4: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is achieved by direct carbonization conversion of the silicon overlayer of a SOI wafer In this work we have obtained Smart Cut SOI structures with surface roughness similar to the previous reported. We also obtained SiC/insulator/Si heterostructures with good structural characteristics using PECVD technique. The investigated N2 thermal annealing appears to be suitable for the crystallization of all the amorphous films deposited by PECVD. We have shown the possibility of using carbon ion implantation and subsequent thermal annealing to form c-SiC for SiC/insulator/Si heterostructures.
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Low temperature epitaxy of Si, Ge, and Sn based alloys / Epitaxie basse température d'empilement à base de Si, Ge et SnAubin, Joris 03 October 2017 (has links)
Les matériaux (Si)GeSn sont très prometteurs pour les composants optiques sur puce fonctionnant dans le Moyen Infra-Rouge (MIR). Lors de cette thèse de doctorat, j’ai étudié le Dépôt Chimique en Phase Vapeur d’alliages GeSn. L’épitaxie basse température de Ge pur, de Ge dopé phosphore et d’alliages GeSi a tout d’abord été explorée. L’utilisation du digermane (Ge2H6) au lieu du germane (GeH4) nous a permis d’augmenter considérablement la vitesse de croissance du germanium à des températures en dessous de425 °C. Des concentrations très importantes en atome de P électriquement actifs ont été atteintes à 350 °C, 100 Torr en chimie Ge2H6 + PH3 (au maximum 7.5x1019 cm-3). Nous avons par la suite combiné le Ge2H6 avec le disilane (Si2H6) ou le dichlorosilane (SiH2Cl2) afin d’étudier la cinétique de croissance du GeSi à 475 °C, 100 Torr. Des concentrations de Ge définitivement plus élevées (77-82%) et une meilleure qualité de surface ont été obtenues avec le SiH2Cl2. Finalement, la croissance basse température d’alliages GeSn a été étudiée dans notre bâti d’épitaxie industriel 200 mm. Le digermane (Ge2H6) et le tétrachlorure d'étain (SnCl4) ont été utilisés pour explorer la cinétique de croissance et les mécanismes de relaxation des contraintes du GeSn. Une large gamme de concentrations en Sn, i.e. 6-16%, a été sondée et ces points de fonctionnement utilisés pour épitaxier des couches épaisses de GeSn partiellement relaxées. Nous avons ainsi mis en évidence l’intérêt d’utiliser une structure dite en escalier, en termes de qualité cristalline et de morphologie de surface. Un tel empilement, avec 16% de Sn dans sa partie supérieure, a montré une structure de bande directe et a conduit à une émission laser (dans des micro-disques) à une longueur d’onde de 3.1 µm. Ce laser a fonctionné jusqu’à 180 K et a un seuil de 377 kW/cm² à 25K. / (Si)GeSn is very promising for use in Mid Infra-Red (MIR) group-IV optical components on chip. During this PhD, I have studied the Reduced Pressure Chemical Vapor Deposition of GeSn alloys. The very low temperature epitaxy of pure Ge, heavily phosphorous doped Ge and Ge-rich SiGe alloys have first of all been investigated. Using digermane (Ge2H6) instead of germane (GeH4) enabled us to dramatically increase the Ge growth rate at temperatures 425 °C and lower. Very high electrically active P concentrations were obtained at 350 °C, 100 Torr with a Ge2H6 + PH3 chemistry (at most 7.5x1019 cm-3). We have then combined digermane with disilane (Si2H6) or dichlorosilane (SiH2Cl2) in order to study the GeSi growth kinetics at 475 °C, 100 Torr. Definitely higher Ge concentrations (77-82%) and smoother surfaces have been obtained with SiH2Cl2. We have then explored the low temperature epitaxy of high Sn content GeSn alloys in our 200 mm industrial RP-CVD tool. Digermane (Ge2H6) and tin tetrachloride (SnCl4) were used to investigate the GeSn growth kinetics and strain relaxation mechanisms. Large range of Sn concentrations, i.e. in the 6-16% range, was probed and data points used to grow thick, partially relaxed GeSn layers. The benefits of using Step-Graded structures, in terms of crystalline quality and surface morphology, was conclusively demonstrated for thick GeSn layers with high Sn contents. Such a stack, with 16% of Sn in the top part, was direct bandgap and led to a laser operation (in micro-disks) up to 180 K at an emission wavelength of 3.1 µm and with a lasing threshold of 377 kW/cm² at 25K.
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Fabricação de novas heteroestruturas a partir de estruturas SOI obtidas pela técnica \'smart-cut\'. / New semiconductor heterostructures based on SOI structures obtained by \"smart-cut\" process.Escobar Forhan, Neisy Amparo 17 March 2006 (has links)
Esta pesquisa engloba o estudo e desenvolvimento de novas heteroestruturas semicondutoras, tomando como base as estruturas SOI (Silicon-On-Insulator - silício sobre isolante) obtidas pela técnica Smart Cut, estudadas nestes últimos anos no Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). Esta técnica combina a solda direta para a união de lâminas e a implantação iônica (I/I) de íons leves para a separação de camadas especificadas. São essenciais na preparação destas estruturas SOI, processos de I/I, limpeza e ativação das superfícies das lâminas e recozimentos em fornos a temperaturas moderadas. Estudamos também, diferentes métodos para a obtenção de novas heteroestruturas, basicamente combinando as técnicas de fabricação da estrutura SOI e os métodos de formação do carbeto de silício (SiC), que chamaremos de heteroestruturas SiCOI (Silicon Carbide-On-Insulator). O método usado para a formação do SiC depende, em cada caso, das características desejadas para o filme que, ao mesmo tempo, estão relacionadas com a aplicação à qual estará destinado. Analisamos três métodos de obtenção do material SiC com características específicas diferentes. A metodologia proposta aborda as seguintes tarefas: Tarefa 1: Obtenção de estruturas SOI pelo método convencional utilizado em trabalhos anteriores e melhoramento das características superficiais da estrutura resultante. Tarefa 2: partindo de uma lâmina de Si previamente coberta por uma camada isolante, fabricar a heteroestrutura SiC/isolante/Si, onde a camada de SiC é crescida pelo método de deposição química de vapor assistida por plasma (PECVD). O filme obtido por deposição PECVD é amorfo e portanto são necessárias etapas de cristalização posteriores ao crescimento. Tarefa 3: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por implantação de íons de carbono (C+) na camada ativa de Si da estrutura SOI para sua transformação em SiC. Tarefa 4: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por conversão direta da camada ativa de Si da estrutura SOI em SiC como resultado da carbonização do Si usando exposição a ambiente de hidrocarbonetos. Como resultado deste trabalho foram obtidas estruturas SOI Smart Cut com valor médio de rugosidade superficial dentro dos valores esperados segundo a bibliografia consultada. Durante o desenvolvimento de heteroestruturas SiC/isolante/Si obtidas utilizando a técnica de PECVD obtivemos filmes com boas características estruturais. Os recozimentos feitos em ambiente de N2 aparentemente trazem resultados satisfatórios, conduzindo à completa cristalização dos filmes. Nas análises feitas para a fabricação de heteroestruturas SiC/isolante/Si utilizando I/I de carbono confirma-se a formação de c-SiC depois de realizado o recozimento térmico. / In this work we study new semiconductors heterostructures, based on SOI (Silicon-On- Insulator) structures obtained by \"Smart-Cut\" process, that were studied in the last years at Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). This technique combines high-dose hydrogen ion implantation (I/I) and direct wafer bonding. To produce SOI structures some processes are essential: I/I process, cleaning and activation of the surfaces, and conventional thermal treatments at moderated temperatures. We also investigate different methods to obtain new heterostructures, basically combining SOI technologies and silicon carbide (SiC) growth processes, which will be called as SiCOI (Silicon Carbide-On-Insulator) heterostructures. The utilized methods to obtain the SiC are related, in each case, with the desired film\'s characteristics, which at the same time are associated with the final application. We analyze three methods to obtain SiC material with specific different characteristics. The proposed methodology approaches the following tasks: Task 1: Fabrication of SOI structures by the conventional technology previously used by us, and the improvement of superficial characteristic of the final structure. Task 2: Fabrication of SiC/insulator/Si heterostructures from Si substrate previously covered with an insulator capping layer, where the SiC layer is deposited by plasma enhanced chemical vapor deposition (PECVD). The PECVD film is amorphous and therefore, a thermal annealing step is necessary for crystallization. Task 3: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is synthesized through a high dose carbon implantation into the thin silicon overlayer of a SOI wafer. Task 4: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is achieved by direct carbonization conversion of the silicon overlayer of a SOI wafer In this work we have obtained Smart Cut SOI structures with surface roughness similar to the previous reported. We also obtained SiC/insulator/Si heterostructures with good structural characteristics using PECVD technique. The investigated N2 thermal annealing appears to be suitable for the crystallization of all the amorphous films deposited by PECVD. We have shown the possibility of using carbon ion implantation and subsequent thermal annealing to form c-SiC for SiC/insulator/Si heterostructures.
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