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Mode Matching Analysis and Design of Substrate Integrated Waveguide ComponentsKordiboroujeni, Zamzam 14 November 2014 (has links)
The advent of Substrate Integrated Circuit (SIC) technology, and specifically Substrate
Integrated Waveguide (SIW) technology has made it feasible to design and fabricate low loss and high quality factor (Q-factor) microwave and millimeter wave structures on a compact and integrable layout and at a low cost. The SIW structure is the planar realization of the conventional rectangular waveguide (RWG). In this technology, the side walls of the waveguide are replaced with two rows of metallic vias, which are connecting two conductor sheets, located at the top and bottom of a dielectric slab. The motivation for this thesis has been to develop an analytical method to efficiently analyze SIW structures, and also design different types of passive microwave components based on this technology.
As SIW structures are imitating waveguide structures in a planar format, the field
distributions inside these structures are very close to those in waveguides. However,
due to the very small substrate height in conventional planar technologies, and also
the existence of a row of vias, instead of a solid metallic wall, there is a reduced set of
modes in SIW compared to regular waveguide. This fact has given us an opportunity
to deploy efficient modal analysis techniques to analyze these structures. In this thesis, we present a Mode Matching Techniques (MMT) approach for the analysis of H-plane SIW structures.
One of the areas of application, which can significantly benefit from having an efficient analytical method, is designing and optimizing new circuits. Having such an analytical tool, which is faster than commercially available field solvers by an order of magnitude, new components can be designed, analyzed and optimized in a fast and inexpensive manner. Based on this technique, various types of passive microwave components including filters, diplexers, power dividers and couplers, some of which are among the first to be reported in SIW technology, are designed and analyzed in this thesis. Also based on this technique, the most accurate formula for the effective waveguide width of the SIW is presented in this thesis.
In order to provide means to excite and measure SIW components, transitions between
these structures and other planar topologies like microstrip and coplanar waveguide (CPW) are needed. More importantly, low-reflection transitions to microstrip are required to integrate SIW circuits with active components, and therefore it is vital to provide low-reflection transitions so that the component design is independent of the influences of the transitions. In this thesis, a new wideband microstrip-to-SIW transition, with the lowest reported reflection coefficient, is also introduced. / Graduate / 0544 / zkordi@ece.uvic.ca
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A Fully Integrated Multi-Band Multi-Output Synthesizer with Wide-Locking-Range 1/3 Injection Locked Divider Utilizing Self-Injection Technique for Multi-Band Microwave SystemsLee, Sang Hun 2012 August 1900 (has links)
This dissertation reports the development of a new multi-band multi-output synthesizer, 1/2 dual-injection locked divider, 1/3 injection-locked divider with phase-tuning, and 1/3 injection-locked divider with self-injection using 0.18-micrometer CMOS technology. The synthesizer is used for a multi-band multi-polarization radar system operating in the K- and Ka-band.
The synthesizer is a fully integrated concurrent tri-band, tri-output phase-locked loop (PLL) with divide-by-3 injection locked frequency divider (ILFD). A new locking mechanism for the ILFD based on the gain control of the feedback amplifier is utilized to enable tunable and enhanced locking range which facilitates the attainment of stable locking states. The PLL has three concurrent multiband outputs: 3.47-4.313 GHz, 6.94-8.626 GHz and 19.44-21.42-GHz. High second-order harmonic suppression of 62.2 dBc is achieved without using a filter through optimization of the balance between the differential outputs. The proposed technique enables the use of an integer-N architecture for multi-band and microwave systems, while maintaining the benefit of the integer-N architecture; an optimal performance in area and power consumption.
The 1/2 dual-ILFD with wide locking range and low-power consumption is analyzed and designed together with a divide-by-2 current mode logic (CML) divider. The 1/2 dual-ILFD enhances the locking range with low-power consumption through optimized load quality factor (QL) and output current amplitude (iOSC) simultaneously. The 1/2 dual-ILFD achieves a locking range of 692 MHz between 7.512 and 8.204 GHz. The new 1/2 dual-ILFD is especially attractive for microwave phase-locked loops and frequency synthesizers requiring low power and wide locking range.
The 3.5-GHz divide-by-3 (1/3) ILFD consists of an internal 10.5-GHz Voltage Controlled Oscillator (VCO) functioning as an injection source, 1/3 ILFD core, and output inverter buffer. A phase tuner implemented on an asymmetric inductor is proposed to increase the locking range.
The other divide-by-3 ILFD utilizes self-injection technique. The self-injection technique substantially enhances the locking range and phase noise, and reduces the minimum power of the injection signal needed for the 1/3 ILFD. The locking range is increased by 47.8 % and the phase noise is reduced by 14.77 dBc/Hz at 1-MHz offset.
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Multi-Port Reflectometer in Multilayer Microstrip-Slot Technology for Ultra Wideband ApplicationsNorhudah Seman Unknown Date (has links)
A microwave reflectometer is an instrument to measure a complex ratio between reflected and incident waves at an input port of a uniform transmission line that is terminated in a Device Under Test (DUT). The conventional reflectometer is formed by a four-port network with two ports connected to a microwave source and DUT, and the remaining ports coupled to a heterodyne receiver which acts as a Complex Ratio Detector (CRT). By using the heterodyne receiver technique, the two microwave signals at the input to CRT are converted in the linear manner to an Intermediate Frequency (IF) of hundreds of kHz where they are processed using digital means. As the ratio of two original microwave signals has to be preserved at IF, a very advanced electronic circuitry is required to accomplish the linear conversion process. This complicated electronic circuitry leads to a large size of the conventional reflectometer and its high price tag. Many applications require compact-size and low-cost reflectometers. They can be built using N-port networks, with N being greater than 5, equipped only in scalar (power) detectors. The thesis describes the concept of a multi-port reflectometer which determines the complex reflection coefficient of DUT with the use of scalar detectors instead of the complex ratio detector. It is shown that this device can be designed using an assembly of linear circuits in the form of quadrature (Q) and/or divider (D) hybrids. Assuming ideal operation of these components, it is shown that the reflection coefficient of DUT can be determined using simple mathematical operations on the power values measured by scalar detectors. Alternatively, it can be obtained from the intersection of power circles in a complex reflection coefficient plane. These simple mathematical expressions can be used to obtain an approximate real-time operation of reflectometer. For more accurate results, the multi-port has to be calibrated using calibration standards. A review of full calibration methods for a multi-port reflectometer is presented. In order to obtain wideband performance, the multi-port reflectometer has to be formed by components all having wideband performance. To obtain its low manufacturing cost, these components should preferably be of planar format and lead to a full integration of reflectometer. The thesis investigates a variety of planar couplers and dividers which can offer wideband performances. However, not all of them can lead to a fully integrated multi-port reflectometer. In order to overcome this shortfall, a multilayer microstrip-slot technique is proposed and investigated to obtain wideband components that can lead to a full integration of multi-port reflectometer. It is demonstrated that through the use of multilayer microstrip-slot technique, ultra wideband microwave 3-dB couplers and two-way dividers of in-phase or out-of-phase type can be designed. It is shown that the chosen configurations of dividers are compatible with the 3-dB couplers so that a fully integrated reflectometer can be formed. This compatibility is accomplished through the use of suitably designed microstrip to slotline transitions. An attractive feature of the designed couplers and dividers is that they are of sub-wavelength size and thus are very compact. A fine operation of these components is demonstrated via full electromagnetic wave simulations and experimental tests over and ultra wide frequency band of 3.1 to 10.6 GHz. Rogers substrate RO4003 featuring a relative dielectric constant of 3.38 and a loss tangent of 0.0027 is chosen as a microwave substrate for the design of these components. The design and analysis are carried out with the commercially available full EM simulator CST Microwave Studio while the experimental tests are done with the Vector Network Analyser, HP8510C. By using these components, an ultra wideband complex ratio measuring unit (CRMU), which is the heart of a multi-port reflectometer, is designed. This CRMU is fully integrated and of compact size. Its operation over an ultra wide frequency band is demonstrated via simulations. A particular attention is paid to its real-time mode of operation. Using this mode of operation, the complex ratio of two waves can be displayed on an oscilloscope using an analog electronics performing simple mathematical operations on the measured powers by detectors. While discussing the operation of CRMU, the attention is paid to the location and spacing of power circles centres (q-points) which are used for geometrical interpretation of operation of this device. Good operation of CRMU in this approximate operation mode indicates that the device will operate very well when it is fully calibrated. For simulations of CRMU, CST Microwave Studio, Agilent’s Advanced Design System (ADS) and MATLAB software are applied. Having accomplished the successful design of CRMU, the last step includes the formation of a fully integrated multi-port reflectometer. To this purpose an extra circuitry including multilayer microstrip-slot 3-dB couplers is added to CRMU. The purpose of this additional circuitry is to reroute the incident and reflected signals from the DUT to the input ports of CRMU. A few configurations of multi-port relectometer formed by multilayer microstrip-slot couplers or dividers are investigated via simulations with respect to real-time mode of operation. Then, the best performing configuration is selected for the final development. The device is manufactured in Rogers RO4003 substrate. Its S-parameters are measured with HP8510C analyser and compared with the simulated values. Having obtained a relatively good agreement between the simulated and measured results, the device is calibrated using multiple calibration standards. Its operation is verified for selected DUTs by comparing the measured reflection coeffcients with those obtained using the conventional VNA (HP8510C) over an ultra wide frequency band. A relatively good agreement is obtained between the two sets of measured results. The obtained results prove that the multilayer microstrip-slot technology can successfully be used for the development of a compact low-cost and fully integrated UWB multi-port reflectometer. Because of its compact size and good electrical performance, this device can be used in many microwave sub-systems offering a limited space for implementation of microwave measurements. The thesis shows that the accomplished multi-port device can also be used to build UWB communication transceivers. The concept of such UWB transceivers is addressed in the final sections of this thesis.
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Résolution séquentielle et parallèle du problème de la satisfiabilité propositionnelle. / Sequential and parallel resolution of the problem of propositionnal satistifiabilityGuo, Long 08 July 2013 (has links)
Cette thèse porte sur la résolution séquentielle et parallèle du problème de la satisfiabilité propositionnelle(SAT). Ce problème important sur le plan théorique admet de nombreuses applications qui vont de la vérification formelle de matériels et de logiciels à la cryptographie en passant par la planification et la bioinformatique. Plusieurs contributions sont apportées dans cette thèse. La première concerne l’étude et l’intégration des concepts d’intensification et de diversification dans les solveurs SAT parallèle de type portfolio. Notre seconde contribution exploite l’état courant de la recherche partiellement décrit par les récentes polarités des littéraux « progress saving », pour ajuster et diriger dynamiquement les solveurs associés aux différentes unités de calcul. Dans la troisième contribution, nous proposons des améliorations de la stratégie de réduction de labase des clauses apprises. Deux nouveaux critères, permettant d’identifier les clauses pertinentes pour la suite de la recherche, ont été proposés. Ces critères sont utilisés ensuite comme paramètre supplémentaire de diversification dans les solveurs de type portfolio. Finalement, nous présentons une nouvelle approche de type diviser pour régner où la division s’effectue par ajout de contraintes particulières. / In this thesis, we deal with the sequential and parallel resolution of the problem SAT. Despite of its complexity, the resolution of SAT problem is an excellent and competitive approach for solving thecombinatorial problems such as the formal verification of hardware and software, the cryptography, theplanning and the bioinfomatics. Several contribution are made in this thesis. The first contribution aims to find the compromise of diversification and intensification in the solver of type portfolio. In our second contribution, we propose to dynamically adjust the configuration of a core in a portfolio parallel sat solver when it is determined that another core performs similar work. In the third contribution, we improve the strategy of reduction of the base of learnt clauses, we construct a portfolio strategy of reduction in parallel solver. Finally, we present a new approach named "Virtual Control" which is to distribute the additional constraints to each core in a parallel solver and verify their consistency during search.
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Jednofázový síťový wattmetr / Single-phase wattmeterKolouch, Petr January 2019 (has links)
This diploma thesis deals with wattmeters. The introduction is devoted to approach the issue. Subsequently, the principle of sensing of circumferential quantities, sampling theory and basic theory is explained. The next chapter discusses Arduino development kits. The practical part deals with the design of the circuit diagram and the printed circuit board. Further described is designed software. The final part tests the parameters of the designed power meter.
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ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management SystemsLINKNATH SURYA BALASUBRAMANIAN (8781929) 04 May 2020 (has links)
The drastic increase in Internet usage demands the need for processing data in real time with higher efficiency than ever before. Symbiote Coprocessor Unit (SCU), developed by Dr. Pranav Vaidya, is a hardware accelerator which has potential of providing data processing speedup of up to 150x compared with traditional data stream processors. However, SCU implementation is very complex, fixed, and uses an outdated host interface, which limits future improvement. Mr. Tareq S. Alqaisi, an MSECE graduate from IUPUI worked on curbing these limitations. In his architecture, he used a Xilinx MicroBlaze microcontroller to reduce the complexity of SCU along with few other modifications. The objective of this study is to make SCU suitable for mass production while reducing its power consumption and delay. To accomplish this, the execution unit of SCU has been implemented in application specific integrated circuit and modules such as ACG/OCG, sequential comparator, and D-word multiplier/divider are integrated into the design. Furthermore, techniques such as operand isolation, buffer insertion, cell swapping, and cell resizing are also integrated into the system. As a result, the new design attains 67.9435 µW<p></p> of dynamic power as compared to 74.0012 µW<p></p> before power optimization along with a small increase in static power, 39.47 ns of clock period as opposed to 52.26 ns before time optimization.
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Radar Characteristics Study for the Development of Surrogate Roadside ObjectsLin, Jun January 2018 (has links)
Indiana University-Purdue University Indianapolis (IUPUI) / Driving safety is a very important topic in vehicle development. One of the biggest
threat of driving safety is road departure. Many vehicle active safety technologies
have been developed to warn and mitigate road departure in recent years. In order to
evaluate the performance of road departure warning and mitigation technologies, the
standard testing environment need to be developed. The testing environment shall
be standardized to provide consistent and repeatable features in various locations
worldwide and in various seasons. The testing environment should also be safe to the
vehicle under test in case the safety features do not function well. Therefore, soft,
durable and reusable surrogates of roadside objects need to be used. Meanwhile, all
surrogates should have the same representative characteristics of real roadside objects
to di erent automotive sensors (e.g. radar, LIDAR and camera). This thesis describes
the study on identifying the radar characteristics of common roadside objects, metal
guardrail, grass, and concrete divider, and the development of the required radar
characteristics of surrogate objects. The whole process is divided into two steps. The
rst step is to nd the proper methods to measure the radar properties of those three
roadside objects. The measurement result of each roadside object will be used as
the requirement for making its surrogate. The second step is to create the material
for developing the surrogate of each roadside object. In the experimental results
demonstrate that all three surrogates satisfy their radar characteristics requirements.
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ASIC implemented MicroBlaze-based Coprocessor for Data Stream Management SystemsBalasubramanian, Linknath Surya 05 1900 (has links)
Indiana University-Purdue University Indianapolis (IUPUI) / The drastic increase in Internet usage demands the need for processing data in real time with higher efficiency than ever before. Symbiote Coprocessor Unit (SCU), developed by Dr. Pranav Vaidya, is a hardware accelerator which has potential of providing data processing speedup of up to 150x compared with traditional data stream processors. However, SCU implementation is very complex, fixed, and uses an outdated host interface, which limits future improvement. Mr. Tareq S. Alqaisi, an MSECE graduate from IUPUI worked on curbing these limitations. In his architecture, he used a Xilinx MicroBlaze microcontroller to reduce the complexity of SCU along with few other modifications. The objective of this study is to make SCU suitable for mass production while reducing its power consumption and delay. To accomplish this, the execution unit of SCU has been implemented in application specific integrated circuit and modules such as ACG/OCG, sequential comparator, and D-word multiplier/divider are integrated into the design. Furthermore, techniques such as operand isolation, buffer insertion, cell swapping, and cell resizing are also integrated into the system. As a result, the new design attains 67.9435 µW of dynamic power as compared to 74.0012 µW before power optimization along with a small increase in static power, 39.47 ns of clock period as opposed to 52.26 ns before time optimization.
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Multi-Function and Flexible Microwave DevicesZhou, Mi 12 1900 (has links)
In this dissertation, some multi-function and flexible RF/microwave devices have been studied to solve the issues in the modern microwave system designs. First, a power divider with two functions is proposed. The first function is a zero-phase delay power divider using zero-phase impedance transformer. The second function is a power divider with impedance transforming property. To achieve the first function, the two arms are treated as zero-phase impedance transformers. When the phase requirement is relaxed, the second function is obtained. Shunt transmission line stubs are employed to connect the isolation resistor, which provides great flexibility in the design. Then, a balun with transparent termination impedance and flexible open arms is designed. The design parameters of the balun are independent to the port impedance. This property allows the balun to work with different system impedances. Furthermore, the two output ports of the balun do not need to be connected together, which enables the device to have a very flexible structure. Finally, the continuous research of a tunable/reconfigurable coupler with equal output impedance is presented. In addition to the tunable/reconfigurable responses, unequal output impedance property is added to the microstrip line coupler. To shrink the size at the low frequency and make it easy for fabrication at higher frequency, the coupler is redesigned using lumped components. To validate the design theories, simulations are carried out. Moreover, prototypes of the power divider and the balun are fabricated and characterized. The simulation and measurement results match well with the theoretical calculation.
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Null Convention Logic Asynchronous Register Full PathCompletion Feedback Loop Using Two Stage Voltage Divider.Taylor, Christopher P. 04 June 2014 (has links)
No description available.
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