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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
71

A comprehensive study of 3D nano structures characteristics and novel devices

Zaman, Rownak Jyoti 10 April 2012 (has links)
Silicon based 3D fin structure is believed to be the potential future of current semiconductor technology. However, there are significant challenges still exist in realizing a manufacturable fin based process. In this work, we have studied the effects of hydrogen anneal on the structural and electrical characteristics of silicon fin based devices: tri-gate, finFET to name a few. H₂ anneal is shown to play a major role in structural integrity and manufacturability of 3D fin structure which is the most critical feature for these types of devices. Both the temperature and the pressure of H₂ anneal can result in significant alteration of fin height and shape as well as electrical characteristics. Optimum H₂ anneal is required in order to improve carrier mobility and device reliability as shown in this work. A new hard-mask based process was developed to retain H₂ anneal related benefit while eliminating detrimental effects such as reduction of device drive current due to fin height reduction. We have also demonstrated a novel 1T-1C pseudo Static Random Access Memory (1T-1C pseudo SRAM) memory cell using low cost conventional tri-gate process by utilizing selective H₂ anneal and other clever process techniques. TCAD-based simulation was also provided to show its competitive advantage over other types of static and dynamic memories in 45nm and beyond technologies. A high gain bipolar based on silicon fin process flow was proposed for the first time that can be used in BiCMOS technology suitable for low cost mixed signal and RF products. TCAD-based simulation results proved the concept with gain as high 100 for a NPN device using single additional mask. Overall, this work has shown that several novel process techniques and selective use of optimum H₂ anneal can lead to various high performance and low cost devices and memory cells those are much better than the devices using current conventional 3D fin based process techniques. / text
72

STRUCTURAL AND MATERIAL INNOVATIONS FOR HIGH PERFORMANCE BETA-GALLIUM OXIDE NANO-MEMBRANE FETS

Jinhyun Noh (10225202) 12 March 2021 (has links)
<p>Beta-gallium oxide (<i>β</i>-Ga<sub>2</sub>O<sub>3</sub>) is an emerging wide bandgap semiconductor for next generation power devices which offers the potential to replace GaN and SiC. It has an ultra-wide bandgap (UWBG) of 4.8 eV and a corresponding <i>E</i><sub>br </sub>of 8 MV/cm. <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>also possesses a decent intrinsic electron mobility limit of 250 cm<sup>2</sup>/V<i>·</i>s, yielding high Baliga’s figure of merit of 3444. In addition, the large bandgap of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>gives stability in harsh environment operation at high temperatures. </p> <p>Although low-cost large-size <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>native bulk substrates can be realized by melt growth methods, the unique property that (100) surface of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>has a large lattice constant of 12.23 Å allows it to be cleaved easily into thin and long nano-membranes. Therefore, <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>FETs on foreign substrates by transferring can be fabricated and investigated before <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>epitaxy technology becomes mature and economical viable. Moreover, integrating <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>on high thermal conductivity materials has an advantage in terms of suppressing self-heating effects. </p><p>In this dissertation, structural and material innovations to overcome and improve critical challenges are summarized as follows: 1) Top-gate nano-membrane <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>FETs on a high thermal conductivity diamond substrate with record high maximum drain current densities are demonstrated. The reduced self-heating effect due to high thermal conductivity of the substrate was verified by thermoreflectance measurement. 2) Local electro-thermal effect by electrical bias was applied to enhance the electrical performance of devices and improvements of electrical properties were shown after the annealing. 3) Thin thermal bridge materials such as HfO<sub>2 </sub>and ZrO<sub>2 </sub>were inserted between <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>and a sapphire substrate to reduce self heating effects without using a diamond substrate. The improved thermal performance of the device was analyzed by phonon density of states plots of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>and the thin film materials. 4) Nano-membrane tri-gate <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>FETs on SiO<sub>2</sub>/Si substrate fabricated via exfoliation have been demonstrated for the first time. 5) Using the robustness of <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>in harsh environments, <i>β</i>-Ga<sub>2</sub>O<sub>3 </sub>ferroelectric FETs operating as synaptic devices up to 400 °C were demonstrated. The result offers the potential to use the novel device for ultra-wide bandgap logic applications, specifically neuromorphic computing exposed to harsh environments.<br></p>

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