Diplomová práca sa zaoberá štúdiom koexistencie, ktorá môže nastať medzi bezdrôtovými komunikačnými systémami LoRa a Wi-Fi v bezlicenčnom ISM pásme 2,4 GHz. V teoretickej časti práce sú stručne popísané fyzické vrstvy obidvoch systémov. Následne sú definované spoločné frekvenčné pásma a koexistenčné scenáre, ktoré môžu vzniknúť medzi uvažovanými systémami v spoločnom rádiofrekvenčnom (RF) pásme. V experimentálnej časti práce je prezentované laboratórne meracie pracovisko, ktoré bolo navrhnuté na meranie rôznych koexistenčných scenárov medzi technológiou LoRa a Wi-Fi. Funkčnosť navrhnutej koncepcie je overená experimentálnym meraním. Výsledky meraní sú detailne komentované a prezentované. Je navrhnutá laboratórna úloha a vzorový protokol pre vzdelávacie účely v Laboratóriu Mobilných a Bezdrôtových komunikácií.

Avec la prolifération des appareils électroniques portables et mobiles communicants, il est recommandé de pouvoir échanger des données rapidement et commodément entre les appareils. Avec la pénurie de bande passante et la congestion dans le spectre des fréquences faibles, la technologie de communication à ondes millimétriques (Mm-wave) est considérée comme l'une des technologies clés du futur pour permettre des applications sans fil à débit élevé grâce à son large spectre abondant. Les nœuds de technologie CMOS avancés sont dotés de ft et fmax plus élevés qui permettent une utilisation peu coûteuse et généralisée de ce spectre. Cependant, de nombreux défis associés à la conception de circuits et de systèmes RF millimétriques en utilisant des technologies CMOS avancées ont été identifiés. L’amplificateur de puissance (PA) a été identifié comme étant le bloc le plus difficile à concevoir dans un émetteur-récepteur intégré RF millimétrique. Le concept au niveau du système de l’architecture basse puissance est d’abord étudié et des blocs clés tels que l’antenne 60 GHz et le modulateur OOK dans la technologie CMOS 130nm ont été présentés. Cette thèse explore également les défis de conception de l’amplificateur de puissance à ondes millimétriques dans la technolgie 28nm UTBB-FDSOI. Trois conceptions différentes d’amplificateur de puissance de 60 GHz ont été démontrées dans 28nm LVT FDSOI : 1) Un PA cascode à deux étages, 2) Un PA différentiel à deux étages à base de transformateur, 3) Un PA différentiel à deux étages à puissance combinée. Les performances simulées, y compris la prise en compte des parasites principaux de disposition ont été présentées. Les travaux futurs incluront l’intégration sur puce avec le PA. / With the proliferation of portable and mobile electronic devices, there is a strong need to exchange data quickly and conveniently between devices encouraging to overcome challenges in bandwidth shortages and congestion in the lower frequencies spectrum. Millimeter-wave (Mm-wave) technology is considered as one of the future key technologies to enable high data rates wireless applications due to its large abundant spectrum. Advanced CMOS technology nodes comes with high ft and fmax, enable low cost and widespread use of this spectrum. However, many associated challenges ranging from device, circuit and system perspectives for the implementation of a highly integrated mm-wave transceiver especially the power amplifier (PA) which identified to be the most challenging RF block to be designed. The system level concept of low power architecture is firstly studied and key blocks such as 60 GHz antenna and OOK modulateur in 130nm CMOS technology were presented. This thesis also explores the design challenges of mm-wave power amplifier in 28nm UTBB-FDSOI technology. Three different designs of 60 GHz power amplifier were demonstrated in 28nm LVT FDSOI : 1) A two-stage cascode PA, 2) A two-stage differential PA with low-km TMN, 3) A power combined two-stage differential PA with low-km TMN. The simulated performance including the consideration of key layout parasitics were presented. Future work will include for on-chip integration with the PA.

Le développement des radars automobiles, à la bande de fréquences 76-77 GHz, a connu une croissance importante au cours de la dernière décennie. Les développements en cours doivent faire face à deux grands défis. Le premier défi est la réduction du coût pour équiper plus de catégories de voitures avec ces radars. Le deuxième défi est l'amélioration des performances du radar afin de satisfaire les demandes croissantes des autorités de sécurité routière et d'équiper la voiture autonome. L'émetteur-récepteur radar automobile constitue le cœur du système. Par conséquent, une pression importante est exercée sur les fournisseurs de semi-conducteurs pour développer des radars de nouvelle génération avec des performances supérieures et à un coût inférieur par rapport aux générations précédentes. Améliorer les performances de l'émetteur-récepteur passe par par l'amélioration de ces quatre paramètres : le facteur de bruit, le niveau de puissance de l'émetteur, le bruit de phase et la dissipation thermique. La réduction de coût peut être obtenue en réduisant le temps de test, les tailles de la puce et du PCB et le coût du boitier. Dans ce travail, nous proposons une réduction du coût du boitier et de la taille du PCB, en plus de l'amélioration de la dissipation thermique grâce à une encapsulation intégré au niveau plaquette (FI-WLP pour Fan-In Wafer Level Package). Le boitier WLCSP (Wafer Level Chip Scale Package), le plus connu FI-WLP, a été choisi pour cette application. C'est la première fois dans l'histoire des semi-conducteurs que le FI-WLP est utilisé pour du Silicium à des fréquences aussi élevées. Le premier chapitre décrit le système radar et ses principaux composants. Il met l'accent sur la contribution de l'émetteur-récepteur, puis le boitier, sur les performances du radar. Le deuxième chapitre fournit une méthodologie pour la modélisation électromagnétiques et la validation expérimentale de ces modèles, appliquée à des structures passives sur puce. Des innovations, améliorant significativement les performances électriques du boitier WLCSP, sont révélées dans le troisième chapitre. La caractérisation du WLCSP est en soi un défi. De nouvelles méthodologies de caractérisation de ce boitier sont alors proposées dans le même chapitre. Par la suite, un nouveau mélangeur encapsulé en WLCSP est conçu et présenté dans le quatrième chapitre. Le facteur de bruit obtenu est à l'état de l'art, malgré l'utilisation du très contraignant boitier FI-WLP. Tous les résultats de simulation de la transition WLCSP et du mélangeur sont validés par des mesures. Cette caractérisation confirme les excellentes performances attendues du boitier et du circuit conçus. / The development of automotive radars, at the frequency band 76-77 GHz, has experienced a significant growth over the last decade. Ongoing developments have to cope with two main challenges. The first challenge is reducing the cost to equip more car categories with these radars. The second challenge is to improve radar performance in order to satisfy the increasing demands of the road safety authorities and to equip the autonomous car. The automotive radar transceiver is the masterpiece of the system. Therefore, significant pressure is exerted on the semiconductor suppliers to develop next generation radars with superior performances and at lower cost than previous generations. Improving the radar transceiver performances requires improving these four main parameters: Noise Figure (NF), Power Amplifier (PA) power, Phase Noise (PN) and heat dissipation. Lowering the cost can be achieved by reducing test time, chip and PCB sizes, and wafers and package costs. We propose, in this work, a reduction of package cost and PCB size and improvement of heat dissipation by using a FI-WLP. The Wafer Level Chip Scale Package (WLCSP), the best known FI-WLP, was chosen for this application. It is the first time, in Silicon semiconductors history, that a FI-WLP is used at such high frequencies. The first chapter describes the radar system in general and its main components. It focuses on the contribution of the transceiver then the package to the radar performances. The second chapter provides a methodology for EM models validation based on the modeling and experimental validation of passive structures on-chip. Innovations, significantly improving the WLCSP electrical performances, are revealed in the third chapter. The characterization of WLP is, itself, a challenge and novel methodologies to perform it are proposed in the same chapter. Thereafter, a new WLCSP packaged mixer, where block core and RF input matching are co-optimized, is designed and presented in the fourth chapter. The obtained NF is at the state-of-the-art, whereas the very constraining FI-WLP is used. All WLCSP transition and mixer simulation results are validated through measurement. This characterization confirms the excellent performances expected from this novel package and circuit designs.

The demand of smaller and portable electronic devices has contributed to the realisation of compact embedded systems using PCB miniaturization techniques. The commercial market is faced with competition of handheld users’ devices in medical, communication and automotive industries which are smaller and lighter electronic devices. The possibilities of higher degree of integration in planar technology using cost effective electronic components has lead to different art of design and fabrication of compact units. In this work, a central station and a base station front-end with small form factor have been realized using commercial components on PCBs. These electronic compacts units were integrated in the IF-over-Fiber system architecture. The IF-over-Fiber architecture comprised of miniaturized electronic components for quadrature modulation and upconversion. The central station supports multi-Gbps data rate modulation formats in order to increase the spectral efficiency of the transmitted information. Multilevel modulation formats are considered spectrally efficient and can double the transmission capacity by transmitting more information in the amplitude, phase, polarization or a combination of all. The BS front-end comprises of the 60 GHz upconverter and a 60 GHz planar 2×2 microstrip antenna. The 10 GHz IF carrier allows an optical transmission with higher spectral efficiency in optical domain, as well as it is less susceptible to dispersion induced power fading inherent in optical fiber. Characterization of the designed central station and base station front-end through measurements are presented and discussed. The IF-over-Fiber system analysis is made for the 2 Gbps QPSK transmission with respect to error vector magnitude (EVM), eye and constellation diagrams.

In an extensive outdoor propagation study, low antenna heights of 1.7 m are used at both the transmitter and the receiver to measure over 3500 wideband power-delay profiles (PDPs) of the channel for a peer-to-peer communications system. Rural and urban areas are studied in 22 different transmitter-receiver links. The results are used to characterize the narrowband path loss, mean delay, root-mean-square (RMS) delay spread, and timing jitter of the peer-to-peer wideband channel. Small-scale fading characteristics are measured in detail by measuring and analyzing 160 PDPs within each local area. This thesis shows the measurement setup for the calculation of fading rate variance and angular spread and reports the first known attempt to calculate angular spread from track power measurements. New analysis presented in this thesis shows the effect of measurement error in the calculation of angular spread. The expected characteristics of angular spread are derived using two different angle-of-arrival (AOA) models from the literature. Measurement results show initial validation of Durgin's angular spread theory. A new measurement-based algorithm for simulating wideband fading processes is developed and implemented. This simulation technique shows promise in the simulation of high-bit rate peer-to-peer radio communication systems. / Master of Science

This works demonstrates the feasibility of the inverse-Class-F harmonic tuning approach for mm-wave silicon PAs. This research addresses the challenges and limitations of the high efficiency inverse-Class-F PAs for mm-wave silicon technology. This work proposes different load networks to mitigate the challenges which are verified with implementations at different mm-wave frequencies with the highest power efficiency performances reported so far: PAE= 50% @ 24 GHz, PAE = 43% @ 41 GHz, and PAE = 23% @ 94 GHz. The design methodology and detailed analysis of the proposed load networks presented and verified with implementation and measured results. / Ph. D.

In order to carry out the complicated computation inside the high performance computing (HPC) systems, tens to hundreds of parallel processor chips and physical wires are required to be integrated inside the multi-chip package module (MCM). The physical wires considered as the electrical interconnects between the processor chips, however, have the challenges on placements and routings because of the unequal progress between the semiconductor and I/O size reductions. The primary goal of the research is to overcome package design challenges - providing a hybrid computing architecture with implemented 60 GHz antennas as the high efficient wireless interconnect which could generate over 10 Gbps bandwidth on the data transmissions. The dissertation is divided into three major parts. In the first part, two different performance metrics, power loss required to be recovered (PRE) and wireless link budget, on evaluating the antenna's system performance within the chip to chip wireless interconnect are introduced to address the design challenges and define the design goals. The second part contains the design concept, fabrication procedure and measurements of implemented 60 GHz broadband antenna in the application of multi-chip data transmissions. The developed antenna utilizes the periodically-patched artificial magnetic conductor (AMC) structure associated with the ground-shielded conductor in order to enhance the antenna's impedance matching bandwidth. The validation presents that over 10 GHz -10 dB S11 bandwidth which indicates the antenna's operating bandwidth and the horizontal data transmission capability which is required by planar type chip to chip interconnect can be achieved with the design concept. In order to reduce both PRE and wireless link budget numbers, a 60 GHz two-element array in the multi-chip communication is developed in the third part. The third section includes the combined-field analysis, the design concepts on two-element array and feeding circuitry. The simulation results agree with the predicted field analysis and demonstrate the 5dBi gain enhancement in the horizontal direction over a single 60 GHz AMC antenna to further reduce both PRE and wireless link budget numbers.

This thesis examines the use of two coupled loops as an alternative method of connection for high frequency signals between passive elements on microwave laminates and integrated circuits; replacing traditional interconnect methods such as wire bonds and solder bumps which require costly back end of line processing. The loops harness both electric and magnetic fields in order to create the interconnection, and can be placed around the perimeter of the IC; here they do not interfere with placement of the existing electronics on the chip, or occupy space which may be required for large components such as spiral inductors. A parametric model for these coupled loops was developed in this thesis. This model allows for rapid initial dimension choice when provided a variety of different parameters such as the IC process geometry, and loop stack geometry. Once initial dimensions are obtained from the model, full-wave simulation can be used to finalize the design and examine effects of process design rules such as metal density requirements. Following model development a prototype system, consisting of a two metallic loops (one located on a low-loss microwave laminate, the other on a 0.13 u m CMOS IC), was fabricated. These loops were then stacked in order to couple the signal from a planar antenna array (printed on the laminate) onto the IC. This antenna-to-chip system was simulated and measured to have center frequencies of 25 GHz and 23 GHz respectively, with a peak gain greater than 5 dBi at the beams broadside (8 dBi in simulation). These results agree quite well, with discrepancies arising primarily from the presence of adhesive between the loops. This adhesive wicked underneath the IC during assembly, which was not accounted for during simulation, but can easily be done so. The radiation pattern from the antenna was measured to have a HPBW of 16 degrees in the elevation plane and 100 degrees in the azimuth plane. These correspond nicely with simulated results and produce a suitable system for automotive radar application; where harsh environments present difficulties to current interconnects such as wire bonds. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2013-09-09 21:55:06.971

The Internet of Things (IoT) has the vision to interconnect everything of the physical world and the virtual world. Advanced automated and adaptive connectivity of objects, systems, and services is expected to be achieved under the IoT context, especially in the industrial environment. Industry 4.0 with the goal of intelligent and self-adaptable manufacturing is driven by the IoT. The Object Layer, where real-time and reliable information acquisition from the physical objects carried out, is the basic enabler in the 3-layer industrial IoT system. Such acquisition system features deterministic access, reliable communication with failure resistance mechanism, latency-aware real-time response, deployable structure/protocol, and adaptive performance on various QoS demands. This thesis proposes a reliable RFID communication system for acquisition in the industrial environment. A discrete gateway structure and a contention-free communication protocol are designed to fulfill the unique system requirements. Such gateway structure offers a flexible configuration of readers and RF technologies. It enables a full duplex communication between the objects and the gateway. The designed MF-TDMA protocol can enhance the failure resistance and emergency report mechanism thanks to the separation of control link and data link in the gateway. Specifically, an optional ARQ mechanism, an independent/uniform synchronization and control method, and a slot allocation optimization algorithm are designed besides time-division and frequency-division multiplexing. Protocol implementations for different industrial situations illustrate the system ability for supporting the demands of various QoS. Finally, a 2.4-GHz/UWB hybrid positioning platform is explored based on the introduced RFID system. Taking advantage of the UWB technology, the positioning platform can achieve positioning accuracy from meter level to centimeter level. Hybrid tag prototype and specific communication process based on the MF-TDMA protocol are designed. An SDR UWB reader network, capable of evaluating multiple algorithms, is built to realize accurate positioning with an improved algorithm proposed. / <p>QC 20161109</p>

The smart environments and the connected human seems to be the future of wireless communications. The development of new frequency bands in the millimeter range will allow us to create high data rate communications which will led to the Wireless Body Environment Networks. In this kind of scenarios, it is expected that the user and the environment will interact. In order to develop such new applications, it is necessary to first study the propagation mechanisms and then, the communication channel underlying body centric environments. This thesis treats of channel models for 60 GHz Body Area Networks and more particularly of three kinds of scenarios: (i) the communication between an external base station and a worn node (off-body); (ii) the communication between two worn nodes (on-body); the communication between an external base station and a hand-held device (near-body). An indoor off-body channel model is numerically proposed and implemented. The model is based on the IEEE 802.11ad indoor standard channel at 60 GHz and a fast computation solution of the scattering of a plane wave by a circular cylinder. The model is developed for two orthogonal polarizations and the communications performances are studied. The on-body propagation is studied for two different configurations: line-of-sight and non-line-of-sight communications on the body. These scenarios led to different solutions for the channel knowing as, respectively, Norton’s equations and creeping formulations. These solutions are obtained using simplified geometries which has been experimentally validated. Further, in order to improve the propagation on the human body, a technique using metallic plates has been proposed. This technique has been theoretically studied using Milligton’s equations and experimentally assessed on a flat phantom with the properties of the human skin. The proposed method allows to save up to 20 dB. Finally, the near-body communication scenario has been introduced and studied. The near-body region is extended from 5 to 30 cm away of the user body which corresponds to the arm’s reach and models a handheld device. A numerical algorithm has been proposed to model indoor near-body environments. Also, a special has been given to statistical body shadowing. It has been shown that the fading follows a Two-Wave Diffuse Power distribution. / Doctorat en Sciences de l'ingénieur et technologie / info:eu-repo/semantics/nonPublished