Neuron is the basic computing unit in brain-inspired neural networks. Although a multitude of excellent artificial neurons realized with conventional transistors have been proposed, they might not be energy and area efficient in large-scale networks. The recent discovery of ferroelectricity in hafnium oxide (HfO₂) and the related switching phenomena at the nanoscale might provide a solution. This study employs the newly reported accumulative polarization reversal in nanoscale HfO₂-based ferroelectric field-effect transistors (FeFETs) to implement two key neuronal dynamics: the integration of action potentials and the subsequent firing according to the biologically plausible all-or-nothing law. We show that by carefully shaping electrical excitations based on the particular nucleation-limited switching kinetics of the ferroelectric layer further neuronal behaviors can be emulated, such as firing activity tuning, arbitrary refractory period and the leaky effect. Finally, we discuss the advantages of an FeFET-based neuron, highlighting its transferability to advanced scaling technologies and the beneficial impact it may have in reducing the complexity of neuromorphic circuits.

These are the abstracts of the presentations of the 7th PhD conference held on 9 June 2023 in Freiberg.

Depuis l'invention du transistor MOS à effet de champ dans les années 60, l'exploitation de cette brique élémentaire a permis une évolution exponentielle du domaine de la microélectronique, avec une course effrénée vers la miniaturisation des dispositifs électroniques CMOS. Dans ce contexte, l'introduction des oxydes "high-κ" (notamment HfO2) a permis de franchir la barrière sub-nanométrique de l'EOT (Equivalent Oxide Thickness) pour l’oxyde de grille. Les travaux actuels concernent notamment la recherche de matériaux "high-κ" et de procédés qui permettraient d'avoir une interface abrupte, thermodynamiquement stable avec le silicium, pouvant conduire à des EOTs de l'ordre de 5Å. L’objectif de cette thèse, était d’explorer le potentiel de l’oxyde LaAlO3 amorphe déposé sur silicium par des techniques d’Épitaxie par Jets Moléculaires, en combinant des études sur les propriétés physico-chimiques et électriques de ce système. Le travail de thèse a d’abord consisté à définir des procédures d'élaboration sur Si de couches très minces (≈4nm), robustes et reproductibles, afin de fiabiliser les mesures électriques, puis à optimiser la qualité électrique des hétérostructures en ajustant les paramètres de dépôt à partir de corrélations entre résultats électriques et propriétés physico-chimiques (densité, stœchiométrie, environnement chimique…) et enfin à valider un procédé d'intégration du matériau dans la réalisation de MOSFET. La stabilité et la reproductibilité des mesures ont été atteintes grâce à une préparation de surface du substrat adaptée et grâce à l'introduction d'oxygène atomique pendant le dépôt de LaAlO3, permettant ainsi une homogénéisation des couches et une réduction des courants de fuite. Après optimisation des paramètres de dépôt, les meilleures structures présentent des EOTs de 8-9Å, une constante diélectrique de 16 et des courants de fuite de l'ordre de 10-2A/cm². Les caractérisations physico-chimiques fines des couches par XPS ont révélé des inhomogénéités de composition qui peuvent expliquer que le κ mesuré soit inférieur aux valeurs de LaAlO3 cristallin (20-25). Bien que les interfaces LAO/Si soient abruptes après le dépôt et que LaAlO3 soit thermodynamiquement stable vis-à-vis du silicium, le système LAO amorphe /Si s’est révélé instable pour des recuits post-dépôt effectués à des températures supérieures à 700°C. Un procédé de fabrication de MOSFETs aux dimensions relâchées a été défini pour tester les filières high-κ. Les premières étapes du procédé ont été validées pour LaAlO3. / Since MOS Field Effect Transistor invention in the 60's, the exploitation of this elementary piece of technology allowed an exponential evolution in the microelectronic field, with a frantic race towards miniaturization of CMOS electronic devices. In this context, the introduction of "high-κ" oxides (notably HfO2) allowed to cross the sub-nanometer barrier of EOT (Equivalent Oxide Thickness) for the gate oxide. Current work are notably related to "high-κ" research materials and processes that would allow an abrupt and thermodynamically stable interface with respect to silicon, that may lead to EOTs of about 5Å. The purpose of this thesis was to explore the potential of amorphous oxide LaAlO3 deposited on silicon by techniques of molecular beam epitaxy, combining studies of the physicochemical and electrical properties of this system. The thesis work has first consisted in defining procedures for the preparation of very thin (≈ 4 nm), robust and reproducible layers on Si in order to allow reliable electrical measurements then to optimize the electrical quality of the hetero-structures by adjusting deposition parameters from correlations between electrical results and physicochemical properties (density, stoichiometry, chemical environment...) and finally to validate a method for integrating the material in the realization of MOSFET. The stability and reproducibility of the measurements were achieved thanks to an adapted surface preparation of the substrate and by the introduction of atomic oxygen during the LaAlO3 deposition, thus allowing homogenization of layers and reducing leakage currents. After optimizing the deposition parameters, the best structures exhibit EOTs of 8-9 A, a dielectric constant of 16 and leakage currents in the range of 10-2 A/cm². Accurate physico-chemical characterizations of thin layers by XPS revealed composition inhomogeneities that can explain why the measured κ is less than values of crystalline LaAlO3 (20-25). Although the LAO/Si interfaces are steep after deposition and LaAlO3 is thermodynamically stable with respect to the silicon, amorphous system LAO/Si has proven unstable during post-deposition annealing carried out at temperatures above 700 ° C. A process for producing MOSFETs with released dimensions was defined to test high-κ field. The first stages of the process have been validated for LaAlO3.

This Thesis describes the synthesis and characterisation of sulfonamide supported titanium, zirconium and aluminium complexes and their use as ring opening polymerisation catalysts for ε-caprolactone and rac-lactide. Chapter 1 introduces polyester use, development and characterisation in general. Metal catalysed ring opening polymerisation of cyclic esters is considered in a literature review of the field. Titanium, zirconium and aluminium complexes supported by polydentate sulfonamide ligands are also discussed. Chapter 2 describes the synthesis and characterisation of new sulfonamide supported titanium amide, isopropoxide and zirconium isopropoxide complexes. Their application as catalysts for the ring opening polymerisation of ε-caprolactone and rac-lactide is discussed and compared with known zirconium isopropoxide complexes supported by bis(phenolate) amine ligands. Chapter 3 describes the synthesis and characterisation of Cs symmetric titanium amide and alkoxide complexes supported by dianionic, tri- and tetradentate sulfonamide ligands. Zirconium alkyl and amide complexes supported by C3- symmetric trianionic ‘tren’ type ligands bearing three different sulfonamide groups are also presented. The application of these complexes for the ring opening polymerisation of ε-caprolactone and rac-lactide is described and compared with the complexes presented in Chapter 2. Chapter 4 provides an overview of the synthesis and characterisation of aluminium alkoxide and alkyl complexes supported by dianionic, tri- and tetradentate sulfonamide ligands. Solution state behaviour and solid state structures are presented and discussed. An assessment of these complexes for the ring opening polymerisation of rac-lactide is presented. Chapter 5 presents full experimental procedures and characterisation data for the new complexes reported. CD Appendix contains .cif files for all new crystallographically characterised complexes described, and additional polymerisation graphs.

Depuis l'invention du transistor MOS à effet de champ dans les années 60, l'exploitation de cette brique élémentaire a permis une évolution exponentielle du domaine de la microélectronique, avec une course effrénée vers la miniaturisation des dispositifs électroniques CMOS. Dans ce contexte, l'introduction des oxydes "high-κ" (notamment HfO2) a permis de franchir la barrière sub-nanométrique de l'EOT (Equivalent Oxide Thickness) pour l'oxyde de grille. Les travaux actuels concernent notamment la recherche de matériaux "high-κ" et de procédés qui permettraient d'avoir une interface abrupte, thermodynamiquement stable avec le silicium, pouvant conduire à des EOTs de l'ordre de 5Å. L'objectif de cette thèse, était d'explorer le potentiel de l'oxyde LaAlO3 amorphe déposé sur silicium par des techniques d'Épitaxie par Jets Moléculaires, en combinant des études sur les propriétés physico-chimiques et électriques de ce système. Le travail de thèse a d'abord consisté à définir des procédures d'élaboration sur Si de couches très minces (≈4nm), robustes et reproductibles, afin de fiabiliser les mesures électriques, puis à optimiser la qualité électrique des hétérostructures en ajustant les paramètres de dépôt à partir de corrélations entre résultats électriques et propriétés physico-chimiques (densité, stœchiométrie, environnement chimique...) et enfin à valider un procédé d'intégration du matériau dans la réalisation de MOSFET. La stabilité et la reproductibilité des mesures ont été atteintes grâce à une préparation de surface du substrat adaptée et grâce à l'introduction d'oxygène atomique pendant le dépôt de LaAlO3, permettant ainsi une homogénéisation des couches et une réduction des courants de fuite. Après optimisation des paramètres de dépôt, les meilleures structures présentent des EOTs de 8-9Å, une constante diélectrique de 16 et des courants de fuite de l'ordre de 10-2A/cm². Les caractérisations physico-chimiques fines des couches par XPS ont révélé des inhomogénéités de composition qui peuvent expliquer que le κ mesuré soit inférieur aux valeurs de LaAlO3 cristallin (20-25). Bien que les interfaces LAO/Si soient abruptes après le dépôt et que LaAlO3 soit thermodynamiquement stable vis-à-vis du silicium, le système LAO amorphe /Si s'est révélé instable pour des recuits post-dépôt effectués à des températures supérieures à 700°C. Un procédé de fabrication de MOSFETs aux dimensions relâchées a été défini pour tester les filières high-κ. Les premières étapes du procédé ont été validées pour LaAlO3.

Ferroelectric field effect transistor (FeFET) memories based on a new type of ferroelectric material (silicon doped hafnium oxide) were studied within the scope of the present work. Utilisation of silicon doped hafnium oxide (Si:HfO2) thin films instead of conventional perovskite ferroelectrics as a functional layer in FeFETs provides compatibility to the CMOS process as well as improved device scalability. The influence of different process parameters on the properties of Si:HfO2 thin films was analysed in order to gain better insight into the occurrence of ferroelectricity in this system. A subsequent examination of the potential of this material as well as its possible limitations with the respect to the application in non-volatile memories followed. The Si:HfO2-based ferroelectric transistors that were fully integrated into the state-of-the-art high-k metal gate CMOS technology were studied in this work for the first time. The memory performance of these devices scaled down to 28 nm gate length was investigated. Special attention was paid to the charge trapping phenomenon shown to significantly affect the device behaviour.

Recently, high-κ materials have become the focus of research and been extensively utilized as the gate dielectric layer in aggressive scaled complementary metal-oxide-semiconductor (CMOS) technology. Hafnium dioxide (HfO2) is the most promising high-κ material because of its excellent chemical, thermal, mechanical and dielectric properties and also possesses good thermodynamic stability and better band offsets with silicon. Hence, HfO2 has already been used as gate dielectric in modern CMOS devices. For future technologies, it is very difficult to scale the silicon transistor gate length, so it is a necessary requirement of replacing the channel material from silicon to some high mobility material. Two-dimensional layered materials such as graphene and molybdenum disulfide (MoS2) are potential candidates to replace silicon. Due to its planar structure and atomically thin nature, they suit well with the conventional MOSFET technology and are very stable mechanically as well as chemically. HfO2 plays a vital role as a gate dielectric, not only in silicon CMOS technology but also in future nano-electronic devices such as graphene/MoS2 based devices, since high-κ media is expected to screen the charged impurities located in the vicinity of channel material, which results in enhancement of carrier mobility. So, for sustenance and enhancement of new technology, extensive study of the functional materials and its processing is required. In the present work, optimization of HfO2 thin films for gate dielectric applications in Nano-electronic devices using electron beam evaporation is discussed. HfO2 thin films have been optimized in two different thickness regimes, (i) about 35 nm physical thicknesses for back gate oxide graphene/MoS2 transistors and (ii) about 5 nm physical thickness to get Equivalent Oxide Thickness (EOT) less than 1 nm for top gate applications. Optical, chemical, compositional, structural and electrical characterizations of these films have been done using Ellipsometry, X-ray Photoelectron Spectroscopy (XPS), Rutherford Back Scattering (RBS), X-ray Diffraction (XRD), Capacitance-Voltage and Current-Voltage characterization techniques. The amount of O2 flow rate, during evaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post deposition annealing (PDA) and post metallization annealing (PMA) in forming gas ambient (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O2 flow rate shows the best properties as measured on MOS capacitors. A high density film (ρ=8.2 gram/cm3, 85% of bulk density) with high dielectric constant of κ=19 and leakage current density of J=2.0×10-6 A/cm2 at -1 MV/cm has been achieved at optimized deposition conditions. Bilayer graphene on HfO2/Si substrate has been successfully identified and also transistor has been fabricated with HfO2 (35 nm) as a back gate. High transconductance compared to other back gated devices such as SiO2/Si and Al2O3/Si and high mobility have been achieved. The performance of back gated bilayer graphene transistors on HfO2 films deposited at two O2 flow rates of 3 SCCM and 20 SCCM has been evaluated. It is found that the device on the film deposited at 3 SCCM O2 flow rate shows better properties. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices. MoS2 layers on the optimized HfO2/Si substrate have been successfully identified and transistor has been fabricated with HfO2 (32 nm) as a back gate. The device is switching at lower voltages compared to SiO2 back gated devices with high ION/IOFF ratio (>106). The effect of film thickness on optical, structural, compositional and electrical properties for top gate applications has been studied. Also the effect of gate electrode material and its processing on electrical properties of MOS capacitors have been studied. EOT of 1.2 nm with leakage current density of 1×10-4 A/cm2 at -1V has been achieved.

Ferroelectric field-effect transistors (FeFET) based on hafnium oxide offer great opportunities for Logic-in-Memory applications, due to their natural ability to combine logic (transistor) and memory (ferroelectric material), their low-power operation, and CMOS compatible integration. Besides aggressive scaling, dense integration of FeFETs is necessary to make electronic circuits more area-efficient. This paper investigates the impact of ultra-dense co-integration of a FeFET and an n-type selector FET, sharing the same active area, arranged in a 2TNOR memory array. The examined FeFETs exhibit a very similar switching behavior as FeFETs arranged in a standard AND-type array, indicating that the ultra-dense co-integration does not degrade the FeFET performance, and thus, paves the path to a very fine-grained, ultra-dense Logic-in-Memory implementation. Based on this densely integrated 2TNOR array we propose a very compact design of a 4-to-1 multiplexer with a build-in look-up table, thus directly merging logic and memory.

No description available.

Ferroelectric field effect transistor (FeFET) memories based on a new type of ferroelectric material (silicon doped hafnium oxide) were studied within the scope of the present work. Utilisation of silicon doped hafnium oxide (Si:HfO2) thin films instead of conventional perovskite ferroelectrics as a functional layer in FeFETs provides compatibility to the CMOS process as well as improved device scalability. The influence of different process parameters on the properties of Si:HfO2 thin films was analysed in order to gain better insight into the occurrence of ferroelectricity in this system. A subsequent examination of the potential of this material as well as its possible limitations with the respect to the application in non-volatile memories followed. The Si:HfO2-based ferroelectric transistors that were fully integrated into the state-of-the-art high-k metal gate CMOS technology were studied in this work for the first time. The memory performance of these devices scaled down to 28 nm gate length was investigated. Special attention was paid to the charge trapping phenomenon shown to significantly affect the device behaviour.:1 Introduction 2 Fundamentals 2.1 Non-volatile semiconductor memories 2.2 Emerging memory concepts 2.3 Ferroelectric memories 3 Characterisation methods 3.1 Memory characterisation tests 3.2 Ferroelectric memory specific characterisation tests 3.3 Trapping characterisation methods 3.4 Microstructural analyses 4 Sample description 4.1 Metal-insulator-metal capacitors 4.2 Ferroelectric field effect transistors 5 Stabilisation of the ferroelectric properties in Si:HfO2 thin films 5.1 Impact of the silicon doping 5.2 Impact of the post-metallisation anneal 5.3 Impact of the film thickness 5.4 Summary 6 Electrical properties of the ferroelectric Si:HfO2 thin films 6.1 Field cycling effect 6.2 Switching kinetics 6.3 Fatigue behaviour 6.4 Summary 7 Ferroelectric field effect transistors based on Si:HfO2 films 7.1 Effect of the silicon doping 7.2 Program and erase operation 7.3 Retention behaviour 7.4 Endurance properties 7.5 Impact of scaling on the device performance 7.6 Summary 8 Trapping effects in Si:HfO2-based FeFETs 8.1 Trapping kinetics of the bulk Si:HfO2 traps 8.2 Detrapping kinetics of the bulk Si:HfO2 traps 8.3 Impact of trapping on the FeFET performance 8.4 Modified approach for erase operation 8.5 Summary 9 Summary and Outlook