A series of complex digital blocks have been designed and fabricated using the newly developed current-mode differential CMOS logic family viz. the Folded Source-Coupled Logic ( FSCL ). The main feature of this logic family is the low current spikes generated during the switching transitions ( at least 2 orders of magnitude smaller than the conventional static CMOS gates ). The design of a decimation filter using novel Multi-Rate systolic architecture and it's implementation in Folded Source-Coupled Logic is also considered. The decimation filter thus designed can be used in mixed-mode applications like Sigma-Delta A/D converter to improve it's performance characteristics like dynamic range, resolution and phase linearity at higher sampling rates. / Graduation date: 1992

Analog circuit technology is of vital importance in today's world of electronic design. Increasing prevalence of mobile electronics necessitates the search for solutions which offer high performance given tight constraints on power and chip area. Field programmable arrays utilizing floating-gate technology are one possible solution to analog design. It offers the advantages of analog processing with the additional advantage of reconfigurability, giving the designer the ability to test new analog designs without costly and time-consuming fabrication and test cycles. In this work, a new interface for FPAA's is demonstrated called Sim2spice, with which users can design signal processing systems in Matlab Simulink and compile them to SPICE circuit netlists. These netlists can be further compiled with a tool called GRASPER to a switch list for programming on an FPAA chip. Example library elements are shown, along with some compiled systems such as filters and vector-matrix multipliers. One particularly compelling application of reconfigurable analog design is the field of neuromorphic circuits, which aims to reproduce the basic functional characteristics of biological neurons and synapses in analog integrated circuit technology. Simulink libraries have been built to allow designers to build neuromorphic systems on several FPAAs that have been developed expressly for the purpose of building neurons and connecting them in networks with synapses. Several possible dynamically learning synapses have also been explored.

Thesis (Ph.D.)--City University of Hong Kong, 2009. / "Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 129-134)

Thesis (M.App.Sc.) - Carleton University, 2006. / Includes bibliographical references (p. 192-196). Also available in electronic format on the Internet.

Thesis (M. Eng.)--Carleton University, 1993. / Also available in electronic format on the Internet.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010. / Committee Chair: David V Anderson; Committee Co-Chair: Sung Kyu Lim; Committee Member: Aaron Lanterman; Committee Member: Abhijit Chatterjee; Committee Member: Daniel Foty; Committee Member: Paul Hasler. Part of the SMARTech Electronic Thesis and Dissertation Collection.

Thesis (M.S.)--Rochester Institute of Technology, 2005. / Typescript. Includes bibliographical references (leaves 70-72).

Thesis (Ph. D.)--University of Washington, 2006. / Vita. Includes bibliographical references (leaves 97-102).

Thesis (Ph. D.)--University of Washington, 2006. / Vita. Includes bibliographical references (p. 75-86).

High-performance, high-frequency operational transconductance amplifiers (OTAs) are very important elements in the design of high-frequency continuous-time integrated analog signal processing circuits, because resistors, inductors, integrators, mutators, buffers, multipliers, and filters can be built by OTAs and capacitors. The critical considerations for OTA design are linearity, tuning, frequency response, output impedance, power supply rejection (PSR) and common-mode rejection (CMR). For linearity considerations, two different methods are proposed. One uses cross-coupled pairs (CMOS or NMOS), producing OTAs with very high linearity but either the input range is relatively small or the CMR to asymmetrical inputs is poor. Another employs multiple differential pairs (current addition or subtraction), producing OTAs with high linearity over a very large input range. So, there are tradeoffs among the critical considerations. For different applications, different OTAs should be selected. For consideration of frequency response, the first reported GaAs OTA was designed for achieving very-high-frequency performance, instead of using AC compensation techniques. GaAs is one of the fastest available technologies, but it was new and less mature than silicon when we started the design in 1989. So, there were several issues, such as low output impedance, no P-channel devices, and Schottky clamp. To overcome these problems, new techniques are proposed, and the designed OTA has comparable performance to a CMOS OTA. For PSR and CMR considerations, a fully balanced circuit structure is employed with a common-mode feedback (CMF) circuit used to stabilize the DC output voltages. To reduce the interaction of the operation of CMF and tuning of OTAs, three improved versions of the CMF circuits used in operational amplifiers are proposed. With the designed OTAs, a I GHz GaAs inductor with small parasitics is designed using the proposed procedure to reduce high-frequency effects. Two CMOS high-order, high-frequency filters are designed: one in cascade structure and one in LC ladder form. Also, a 200 MHz third-order elliptic GaAs filter is designed with special consideration of very-high-frequency parasitics. All circuits were fabricated and measured. The experimental results were used to verify the designs.