[pt] Este trabalho descreve o desenvolvimento completo de um Amplificador de Potência de RF para Transceptores Multibanda. Em sua etapa inicial mostra um apanhado geral da teoria de todos os parâmetros relevantes para a medida de desempenho desses dispositivos, como potência, ganho e parâmetros de não linearidades. Em seguida são expostas as teorias básicas para o entendimento dos mecanismos para extração da máxima potência de um transistor, focando nos transistores de efeito de campo FET, incluindo a caracterização para regimes de alta potência. São apresentados os modos de operação de um amplificador de potência, focando nos chamados modos clássicos, dado que esses modos são convenientes para operação em banda larga. Para a correta operação de qualquer dispositivo que apresente ganho, a análise de estabilidade é apresentada com o procedimento de estabilização de transistores. A partir de todo o apanhado teórico, é desenvolvida uma metodologia de projeto de amplificadores de potência utilizando a ferramenta de simulação computacional Advanced Design System. Então, após toda a modelagem do amplificador, a construção e medidas são realizadas e boa concordância com a simulação foi obtida. / [en] This work describes the full development of a RF Power Amplifier for Multiband Transceivers. In its initial stage shows an overview of the theory of all relevant parameters to measure the performance of these devices, like power, gain and nonlinearity parameters. Then it exposes the basic theories for the understanding of the mechanisms for extracting the maximum power of a transistor, focusing on field effect transistors FET, including characterization for regimes of high power. It presents the modes of operation of a power amplifier, focusing on so-called classical modes, since these modes are suitable for broadband operation. For proper operation of any device that presents gain, the stability analysis is presented with the stabilization procedure of transistors. From all theoretical basis, is developed a design methodology of power amplifiers using the computational simulation tool Advanced Design System. So after all the amp modeling, construction and measurements are performed and good agreement was obtained with the simulation.

Accurate transistor models are important in wireless and microwave circuit design. Large-signal field-effect transistor (FET) models are generally extracted from current-voltage (IV) characteristics, small-signal S-parameters, and large-signal measurements. This dissertation describes improved characterization and measurement validation techniques for FET models that correctly account for thermal and trapping effects. Demonstration of a customized pulsed-bias, pulsed-RF S-parameter system constructed by the author using a traditional vector network analyzer is presented, along with the design of special bias tees to allow pulsing of the bias voltages. Pulsed IV and pulsed-bias S-parameter measurements can provide results that are electrodynamically accurate; that is, thermal and trapping effects in the measurements are similar to those of radio-frequency or microwave operation at a desired quiescent bias point. The custom pulsed S-parameter system is benchmarked using passive devices and advantages and tradeoffs of pulsed S-parameter measurements are explored. Pulsed- and continuous-bias measurement results for a high-power transistor are used to validate thermal S-parameter correction procedures. A new implementation of the steepest-ascent search algorithm for load-pull is presented. This algorithm provides for high-resolution determination of the maximum power and associated load impedance using a small number of measured or simulated reflection-coefficient states. To perform a more thorough nonlinear model validation, it is often desired to find the impedance providing maximum output power or efficiency over variations of a parameter such as drain voltage, input power, or process variation. The new algorithm enables this type of validation that is otherwise extremely tedious or impractical with traditional load-pull. A modified nonlinear FET model is presented in this work that allows characterization of both thermal and trapping effects. New parameters and equation terms providing a trapping-related quiescent-bias dependence have been added to a popular nonlinear ("Angelov") model. A systematic method for fitting the quiescent-dependence parameters, temperature coefficients, and thermal resistance is presented, using a GaN high electron-mobility transistor as an example. The thermal resistance providing a good fit in the modeling procedure is shown to correspond well with infrared measurement results.

No description available.

Ce travail de thèse présente une étude concernant la caractérisation des effets électrothermiques dans les transistors bipolaires à hétérojonction (HBT) en SiGe. Lors de ces travaux, deux procédés technologiques BiCMOS à l’état de l’art ont été analysés: le B11HFC de Infineon Technologies (130nm) et le B55 de STMicroelectronics (55nm).Des structures de test dédiées ont étés conçues, pour évaluer l’impact électrothermique du back end of line (BEOL) de composants ayant une architecture à un ou plusieurs doigts d’émetteur. Une caractérisation complète a été effectuée en régime continu et en mode alternatif en petit et en grand signal. De plus, une extraction des paramètres thermiques statiques et dynamiques a été réalisée et présentée pour les structures de test proposées. Il est démontré que les figures de mérite DC et RF s’améliorent sensiblement en positionnant des couches de métal sur le transistor, dessinées de manière innovante et ayant pour fonction de guider le flux thermique vers l’extérieur. L’impact thermique du BEOL a été modélisé et vérifié expérimentalement dans le domaine temporel et fréquentiel et aussi grâce à des simulations 3D par éléments finis. Il est à noter que l’effet du profil de dopage sur la conductivité thermique est analysé et pris en compte.Des topologies de transistor innovantes ont étés conçues, permettant une amélioration des spécifications de l’aire de sécurité de fonctionnement, grâce à un dessin innovant de la surface d’émetteur et du deep trench (DTI).Un modèle compact est proposé pour simuler les effets de couplage thermique en dynamique entre les émetteurs des HBT multi-doigts; ensuite le modèle est validé avec de mesures dédiées et des simulations TCAD.Des circuits de test ont étés conçus et mesurés, pour vérifier la précision des modèles compacts utilisés dans les simulateurs de circuits; de plus, l’impact du couplage thermique entre les transistors sur les performances des circuits a été évalué et modélisé. Finalement, l’impact du dissipateur thermique positionné sur le transistor a été étudié au niveau circuit, montrant un réel intérêt de cette approche. / This work is focused on the characterization of electro-thermal effects in advanced SiGe hetero-junction bipolar transistors (HBTs); two state of the art BiCMOS processes have been analyzed: the B11HFC from Infineon Technologies (130nm) and the B55 from STMicroelectronics (55nm).Special test structures have been designed, in order to evaluate the overall electro-thermal impact of the back end of line (BEOL) in single finger and multi-finger components. A complete DC and RF electrical characterization at small and large signal, as well as the extraction of the device static and dynamic thermal parameters are performed on the proposed test structures, showing a sensible improvement of the DC and RF figures of merit when metal dummies are added upon the transistor. The thermal impact of the BEOL has been modeled and experimentally verified in the time and frequency domain and by means of 3D TCAD simulations, in which the effect of the doping profile on the thermal conductivity is analyzed and taken into account.Innovative multi-finger transistor topologies are designed, which allow an improvement of the SOA specifications, thanks to a careful design of the drawn emitter area and of the deep trench isolation (DTI) enclosed area.A compact thermal model is proposed for taking into account the mutual thermal coupling between the emitter stripes of multi-finger HBTs in dynamic operation and is validated upon dedicated pulsed measurements and TCAD simulations.Specially designed circuit blocks have been realized and measured, in order to verify the accuracy of device compact models in electrical circuit simulators; moreover the impact on the circuit performances of mutual thermal coupling among neighboring transistors and the presence of BEOL metal dummies is evaluated and modeled.