Network softwarization plays a significantly important role in the development and deployment of the latest communication system for 5G and beyond. A more flexible and intelligent network architecture can be enabled to provide support for agile network management, rapid launch of innovative network services with much reduction in Capital Expense (CAPEX) and Operating Expense (OPEX). Despite these benefits, 5G system also raises unprecedented challenges as emerging machine-to-machine and human-to-machine communication use cases require Ultra-Reliable Low Latency Communication (URLLC). According to empirical measurements performed by the author of this dissertation on a practical testbed, State of the Art (STOA) technologies and systems are not able to achieve the one millisecond end-to-end latency requirement of the 5G standard on Commercial Off-The-Shelf (COTS) servers. This dissertation performs a comprehensive introduction to three innovative approaches that can be used to improve different aspects of the current software-driven network data plane. All three approaches are carefully designed, professionally implemented and rigorously evaluated. According to the measurement results, these novel approaches put forward the research in the design and implementation of ultra-reliable low-latency, energy-efficient and computing-first software data plane for 5G communication system and beyond.

Submitted by PPG Ci?ncia da Computa??o (ppgcc@pucrs.br) on 2017-11-13T21:02:54Z No. of bitstreams: 1 Felipe_Gohring_de_Magalh?es_TES.pdf: 7728697 bytes, checksum: f2b34275e49f32253d8c38848a3d9258 (MD5) / Approved for entry into archive by Caroline Xavier (caroline.xavier@pucrs.br) on 2017-11-21T12:14:27Z (GMT) No. of bitstreams: 1 Felipe_Gohring_de_Magalh?es_TES.pdf: 7728697 bytes, checksum: f2b34275e49f32253d8c38848a3d9258 (MD5) / Made available in DSpace on 2017-11-21T12:26:58Z (GMT). No. of bitstreams: 1 Felipe_Gohring_de_Magalh?es_TES.pdf: 7728697 bytes, checksum: f2b34275e49f32253d8c38848a3d9258 (MD5) Previous issue date: 2017-05-25 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior - CAPES / As tend?ncias de design para os sistemas multiprocessadores da pr?xima gera??o apontam para a integra??o de um grande n?mero de n?cleos de processamento, exigindo interconex?es de alto desempenho. Uma solu??o a ser aplicada para melhorar a infraestrutura de comunica??o em tais sistemas ? o uso de redes on-chip, pois estas apresentam uma melhoria consider?vel na largura de banda e escalabilidade. Ainda assim, o n?mero de n?cleos integrados continua a aumentar ao mesmo tempo em que o sistema cresce, dessa maneira as interconex?es met?licas em redes on-chip podem tornar-se um gargalo no desempenho. Como resultado, uma nova estrat?gia deve ser adotada para que essas quest?es sejam solucionadas. As Redes ?pticas Integradas (do ingl?s Optical Integrated Networks - OINs) s?o atualmente consideradas como um dos paradigmas mais promissores neste contexto de design: elas apresentam maior largura de banda, menor consumo de energia e baixa lat?ncia para transmitir informa??es. Al?m disso, trabalho recentes demonstram a viabilidade de OINs com suas tecnologias de fabrica??o dispon?veis e compat?veis com CMOS. No entanto, os designers de OINs enfrentam v?rios desafios: ? Atualmente, os controladores representam o principal gargalo na comunica??o e s?o um dos fatores que limitam o uso de OINs. Portanto, novas solu??es de controle de baixa lat?ncia s?o necess?rias. ? Designers n?o possuem ferramentas para modelar e validar OINs. A maioria das pesquisas atualmente est? focada em projetar dispositivos e melhorar os componentes b?sicos, deixando o sistema sem melhorias. Neste contexto, para facilitar a implanta??o de sistemas baseados em OIN, este projeto de doutorado concentra-se em tr?s contribui??es principais: (1) o desenvolvimento da plataforma de simula??o a n?vel de sistema; (2) a defini??o e o desenvolvimento de uma abordagem de controle eficiente para sistemas baseados em OIN e; (3) a avalia??o, a n?vel do sistema, da abordagem de controle proposta usando a modelagem definida. / Design trends for next-generation Multi-Processor Systems point to the integration of a large number of processing cores, requiring high-performance interconnects. One solution being applied to improve the communication infrastructure in such systems is the usage of Networkson- Chip as they present considerable improvement in the bandwidth and scaleability. Still as the number of integrated cores continues to increase and the system scales, the metallic interconnects in Networks-on-Chip can become a performance bottleneck. As a result, a new strategy must be adopted in order for those issues to be remedied. Optical Integrated Networks (OINs) are currently considered to be one of the most promising paradigm in this design context: they present higher bandwidth, lower power consumption and lower latency to broadcast information. Also, the latest work demonstrates the feasibility of OINs with their fabrication technologies being available and CMOS compatible. However, OINs? designers face several challenges: ? Currently, controllers represent the main communication bottleneck and are one of the factors limiting the usage of OINs. Therefore, new controlling solutions with low latency are required. ? Designers lack tools to model and validate OINs. Most research nowadays is focused on designing devices and improving basic components performance, leaving system unattended. In this context, in order to ease the deployment of OIN-based systems, this PhD project focuses on three main contributions: (1) the development of accurate system-level modelling study to realize a system-level simulation platform; (2) the definition and development of an efficient control approach for OIN-based systems, and; (3) the system-level evaluation of the proposed control approach using the defined modelling.

Information technology forms an important part of the world and algorithmic trading has already become a common concept among traders. The High Frequency Trading (HFT) requires use of special hardware accelerators which are able to provide input response with sufficiently low latency. This master's thesis is focused on design and implementation of an architecture for order book building, which represents an essential part of HFT solutions targeted on financial exchanges. The goal is to use the FPGA technology to process information about an exchange's state with latency so low that the resulting solution is effectively usable in practice. The resulting architecture combines hardware and software in conjunction with fast lookup algorithms to achieve maximum performance without affecting the function or integrity of the order book.

<p dir="ltr"> The general design goal of low latency communication systems is to minimize the end-to-end delay while attaining the predefined reliability and throughput requirements. The burgeoning demand for low latency communications motivates a renewed research interest of the tradeoff between delay, throughput, and reliability. In this dissertation research, we consider slotted-based systems and explore the potential advantages of the so-called sequential codes in low latency network communications.</p><p dir="ltr"> The first part of this dissertation analyzes the exact error probability of random linear streaming codes (RLSCs) in the large field size regime over the stochastic independently and identically distributed (i.i.d.) symbol erasure channels (SECs). A closed-form expression of the error probability <i>p</i>_<em>e</em> of large-field-size RLSCs is derived under, simultaneously, the finite memory length α and decoding deadline Δ constraints. The result is then used to examine the intricate tradeoff between memory length (complexity), decoding deadline (delay), code rate (throughput), and error probability (reliability). Numerical evaluation shows that under the same code rate and error probability requirements, the end-to-end delay of RLSCs is 40-48% of that of the optimal block codes (i.e., MDS codes). This implies that switching from block codes to streaming codes not only eliminates the queueing delay completely (which accounts for the initial 50% of the delay reduction) but also improves the reliability (which accounts for the additional 2-10% delay reduction).</p><p dir="ltr"> The second part of this dissertation focuses on the asymptotics of the error probability of RLSCs in the same system model of the first part. Two important scenarios are analyzed: (i) tradeoff between Δ and <i>p</i>_<em>e</em> under infinite α; and (ii) tradeoff between α and <i>p</i>_<em>e</em> under infinite Δ. In the first scenario, the asymptote of <i>p</i>_<em>e</em>(Δ) is shown to be <i>ρ</i>Δ^-1.5<i>e</i>^-^<em>η</em>^Δ. The asymptotic power term Δ^-1.5 of RLSCs is a strict improvement over the Δ^-0.5 term of random linear block codes. A pair of upper and lower bound on the asymptotic constant <i>ρ</i> is also derived, which are tight (i.e., identical) for one specific class of SECs. In the second scenario, a refine approximation is proposed by computing the parameters in a multiterm asymptotic form, which closely matches the exact error probability even for small memory length (≈ 20). The results of the asymptotics can be further exploited to find the <i>c</i>-optimal memory length <i>α</i>_<em>c</em>^*(Δ), which is defined as the minimal memory length α needed for the resulting <i>p</i>_<em>e</em> to be within a factor of <i>c</i>>1 of the best possible <i>p</i>_<em>e</em>^<em>*</em>_{<em> </em>}for any Δ, an important piece of information for practical implementation.</p><p dir="ltr"> Finally, we characterize the channel dispersions of RLSCs and MDS block codes, respectively. New techniques are developed to quantify the channel dispersion of sequential (non-block-based) coding, the first in the literature. The channel dispersion expressions are then used to compare the levels of error protection between RLSCs and MDS block codes. The results show that if and only if the target error probability <i>p</i>_<em>e</em> is smaller than a threshold (≈ 0.1774), RLSCs offer strictly stronger error protection than MDS block codes, which is on top of the already significant 50% latency savings of RLSCs that eliminate the queueing delay completely.</p>

By virtue of the recent technological developments in cloud computing, more applications are deployed in a cloud. Among these modern cloud-based applications, some require bounded and predictable low-latency responses. However, the current cloud infrastructure is unsuitable as it cannot satisfy these requirements, due to many limitations in both hardware and software. This licentiate thesis describes attempts to reduce the latency of Internet services by carefully studying the currently available infrastructure, optimizing it, and improving its performance. The focus is to optimize the performance of network functions deployed on commodity hardware, known as network function virtualization (NFV). The performance of NFV is one of the major sources of latency for Internet services. The first contribution is related to optimizing the software. This project began by investigating the possibility of superoptimizing virtualized network functions(VNFs). This began with a literature review of available superoptimization techniques, then one of the state-of-the-art superoptimization tools was selected to analyze the crucial metrics affecting application performance. The result of our analysis demonstrated that having better cache metrics could potentially improve the performance of all applications. The second contribution of this thesis employs the results of the first part by taking a step toward optimizing cache performance of time-critical NFV service chains. By doing so, we reduced the tail latencies of such systems running at 100Gbps. This is an important achievement as it increases the probability of realizing bounded and predictable latency for Internet services. / Tack vare den senaste tekniska utvecklingen inom beräkningar i molnet(“cloud computing”) används allt fler tillämpningar i molnlösningar. Flera avdessa moderna molnbaserade tillämpningar kräver korta svarstider är låga ochatt dessa ska vara förutsägbara och ligga inom givna gränser. Den nuvarandemolninfrastrukturen är dock otillräcklig eftersom den inte kan uppfylla dessa krav,på grund av olika typer av begränsningar i både hårdvara och mjukvara. I denna licentiatavhandling beskrivs försök att minska fördröjningen iinternettjänster genom att noggrant studera den nuvarande tillgängligainfrastrukturen, optimera den och förbättra dess prestanda. Fokus ligger påatt optimera prestanda för nätverksfunktioner som realiseras med hjälp avstandardhårdvara, känt som nätverksfunktionsvirtualisering (NFV). Prestanda hosNFV är en av de viktigaste källorna till fördröjning i internettjänster. Det första bidraget är relaterat till att optimera mjukvaran. Detta projektbörjade med att undersöka möjligheten att “superoptimera” virtualiseradenätverksfunktioner (VNF). Detta inleddes med en litteraturöversikt av tillgängligasuperoptimeringstekniker, och sedan valdes ett av de toppmodernasuperoptimeringsverktygen för att analysera de viktiga mätvärden som påverkartillämpningssprestanda. Resultatet av vår analys visade att bättre cache-mätningar potentiellt skulle kunna förbättra prestanda för alla tillämpningar. Det andra bidraget i denna avhandling utnyttjar resultaten från den förstadelen genom att ta ett steg mot att optimera cache-prestanda för tidskritiskakedjor av NFV-tjänster. Genom att göra så reducerade vi de långa fördröjningarnahos sådana system som kördes vid 100 Gbps. Detta är en viktig bedrift eftersomdetta ökar sannolikheten för att uppnå en begränsad och förutsägbar fördrörninghos internettjänster. / <p>QC 20190415</p> / Time-Critical Clouds / ULTRA

Several available free software audio solutions were analyzed, and Jackdmp—a C++ reimplementation of the renowned JACK Audio Connection Kit—was selected as the most appropriate solution for a real-time audio architecture on DROPS. The JACK sound architecture provides the lowest processing latency possible on a desktop computer for a given set of sound card parameters. It reduces the latency jitter caused by software to zero and synchronizes streams at sample accuracy. A real-time admission scheme for JACK clients is proposed. The execution time of different typical JACK clients was analyzed with measurements to validate the assumptions the proposal is based on, but also to gain further knowledge about their timing behavior. The measurements showed that the condition set by Paul Davis—the time to process a client must be a linear function of the buffer size—holds for all tested clients. Jackdmp was ported to DROPS. The developed design of the port and its implementation is documented here. Measurements showed that—although the real-time performance of the Linux kernel is continuously being improved in the mainline and on special external branches—DROPS can provide a signaling latency that is two times lower on average than the values that can be achieved on the same machine running with a low latency patched Linux kernel. Thus, it can be stated that DROPS is well-suited for real-time audio processing and that the pursued path to use it as the foundation of a truly real-time capable audio workstation should be followed. / Wenn man heute digitale Audiotechnik zum Aufnehmen oder Abmischen von Musik oder anderen Audiodaten verwenden möchte, steht man vor der Wahl, entweder auf eine sehr spezialisierte Hardwarelösung zurückzugreifen oder aber sich eines gewöhnlichen Desktopsystems mit entsprechender Audiosoftware zu bedienen. Der Vorteil eines Desktopsystems ist neben seinem deutlich niedrigeren Preis vor allem die Flexibilität. Bezüglich seines Echtzeitverhaltens bietet ein Computer mit einem Standard-Desktop-Betriebssystem aber bei weitem nicht dieselbe Verlässlichkeit einer spezialisierten Hardwarelösung oder analoger Technik. Die Architektur von DROPS --- mit dem echtzeitfähigen Fiasco- Mikrokern auf der einen Seite sowie der Unterstützung von Legacy-Anwendungen durch L4Linux auf der anderen Seite --- birgt die Hoffnung, die Vorteile von den beiden eben beschriebenen Welten auf einem System mit DROPS kombinieren zu können. Die Motivation meiner Arbeit war es, für dieses langfristige Ziel einen ersten Grundstein zu legen. Dazu war es meine Aufgabe, verschiedene Open-Source- Lösungen hinsichtlich ihrer Eignung als Echtzeit-Audioarchitektur für DROPS zu analysieren und die am besten geeignete auf L4Env zu portieren. Meine Wahl fiel dabei auf das in der Linux-Audio-Szene wohlbekannte Jack Audio Connection Kit (JACK). Desweiteren konnte ich in der Arbeit untersuchen, wie sich die JACK Audioarchitektur in ein globales Echtzeit-Scheduling --- z.B. eines von DROPS --- einbetten ließe, und schlage eine generische Methode dafür vor.

Several available free software audio solutions were analyzed, and Jackdmp—a C++ reimplementation of the renowned JACK Audio Connection Kit—was selected as the most appropriate solution for a real-time audio architecture on DROPS. The JACK sound architecture provides the lowest processing latency possible on a desktop computer for a given set of sound card parameters. It reduces the latency jitter caused by software to zero and synchronizes streams at sample accuracy. A real-time admission scheme for JACK clients is proposed. The execution time of different typical JACK clients was analyzed with measurements to validate the assumptions the proposal is based on, but also to gain further knowledge about their timing behavior. The measurements showed that the condition set by Paul Davis—the time to process a client must be a linear function of the buffer size—holds for all tested clients. Jackdmp was ported to DROPS. The developed design of the port and its implementation is documented here. Measurements showed that—although the real-time performance of the Linux kernel is continuously being improved in the mainline and on special external branches—DROPS can provide a signaling latency that is two times lower on average than the values that can be achieved on the same machine running with a low latency patched Linux kernel. Thus, it can be stated that DROPS is well-suited for real-time audio processing and that the pursued path to use it as the foundation of a truly real-time capable audio workstation should be followed. / Wenn man heute digitale Audiotechnik zum Aufnehmen oder Abmischen von Musik oder anderen Audiodaten verwenden möchte, steht man vor der Wahl, entweder auf eine sehr spezialisierte Hardwarelösung zurückzugreifen oder aber sich eines gewöhnlichen Desktopsystems mit entsprechender Audiosoftware zu bedienen. Der Vorteil eines Desktopsystems ist neben seinem deutlich niedrigeren Preis vor allem die Flexibilität. Bezüglich seines Echtzeitverhaltens bietet ein Computer mit einem Standard-Desktop-Betriebssystem aber bei weitem nicht dieselbe Verlässlichkeit einer spezialisierten Hardwarelösung oder analoger Technik. Die Architektur von DROPS --- mit dem echtzeitfähigen Fiasco- Mikrokern auf der einen Seite sowie der Unterstützung von Legacy-Anwendungen durch L4Linux auf der anderen Seite --- birgt die Hoffnung, die Vorteile von den beiden eben beschriebenen Welten auf einem System mit DROPS kombinieren zu können. Die Motivation meiner Arbeit war es, für dieses langfristige Ziel einen ersten Grundstein zu legen. Dazu war es meine Aufgabe, verschiedene Open-Source- Lösungen hinsichtlich ihrer Eignung als Echtzeit-Audioarchitektur für DROPS zu analysieren und die am besten geeignete auf L4Env zu portieren. Meine Wahl fiel dabei auf das in der Linux-Audio-Szene wohlbekannte Jack Audio Connection Kit (JACK). Desweiteren konnte ich in der Arbeit untersuchen, wie sich die JACK Audioarchitektur in ein globales Echtzeit-Scheduling --- z.B. eines von DROPS --- einbetten ließe, und schlage eine generische Methode dafür vor.

With the upsurge in the demand for high-bandwidth networked real-time applications in cost-sensitive environments, a key issue is to take advantage of developments of commodity components that offer a multiple of the throughput of classical real-time solutions. It was the starting hypothesis of this dissertation that with fine grained traffic shaping as the only means of node cooperation, it should be possible to achieve lower guaranteed delays and higher bandwidth utilization than with traditional approaches, even though Switched Ethernet does not support policing in the switches as other network architectures do. This thesis presents the application of traffic shaping to Switched Ethernet and validates the hypothesis. It shows, both theoretically and practically, how commodity Switched Ethernet technology can be used for low-latency hard real-time communication, and what operating-system support is needed for an efficient implementation.

With the upsurge in the demand for high-bandwidth networked real-time applications in cost-sensitive environments, a key issue is to take advantage of developments of commodity components that offer a multiple of the throughput of classical real-time solutions. It was the starting hypothesis of this dissertation that with fine grained traffic shaping as the only means of node cooperation, it should be possible to achieve lower guaranteed delays and higher bandwidth utilization than with traditional approaches, even though Switched Ethernet does not support policing in the switches as other network architectures do. This thesis presents the application of traffic shaping to Switched Ethernet and validates the hypothesis. It shows, both theoretically and practically, how commodity Switched Ethernet technology can be used for low-latency hard real-time communication, and what operating-system support is needed for an efficient implementation.

Time Sensitive Networking (TSN) defined in the IEEE 802.1 working group, is an important enabler for industrial Internet of things, specifically industry 4.0. 3GPP release 16 specifications includes the 5G system as a logical TSN bridge, thus promoting the integration of 5G technology with TSN. This combination provides wireless deterministic communication thus ensuring low, bounded delay and near-zero packet loss. In this thesis, we implement a 5G system in- tegration with TSN using a discrete event network simulator (NS-3). Further, we propose a simplified per egress port scheduling algorithm based on IEEE 802.1Q (scheduled traffic standard) running in the Centralized Network Con- troller (CNC). Average packet delay, average jitter, average throughput and the packet loss is measured for comparing the performance difference when our TSN scheduler is used versus when it is not. The designed system is tested by measuring it’s network impact in terms of average delay and packet loss. The 5GS logical bridge behavior is simulated by varying the 5G bridge de- lay dynamically. For every frame transmission in the queue, the processing delay of a particular bridge is varied with pre-defined set of values. Two sets of 5GS bridge delay variations are considered, i.e. between 1-10ms and 5- 10ms respectively. On calculating the network impact, we conclude that the overall impact on the network decreases as the variation range for the delay gets smaller. This proves that higher delay variations have a significant impact whereas smaller delay variations have a negligible impact on the network. For the latter case, the system delay is considerably stable and thus can be used for industrial applications in real-life TSN scenarios. / Tidskritiska nätverk (TSN) definierat i IEEE 802.1-arbetsgruppen, är en vik- tig faktor för det industriella Sakernas Internet, särskilt när det gäller Industri4.0. Specifikationer enligt 3GPP release 16 inkluderar 5G-system som en lo- gisk TSN-brygga, som främjar integrationen av 5G-teknik med TSN. 5G med TSN ger trådlös deterministisk kommunikation som säkerställer låg, begrän- sad fördröjning och nästan noll paketförlust. I denna rapport implementerar vi en 5G-systemintegration med TSN med hjälp av en diskret händelse simu- lator (NS-3). Dessutom föreslår vi en förenklad algoritm för schemaläggning av portar per utgång baserat på IEEE 802.1Q (Scheduled Traffic Standard) som körs i en centraliserad nätverks-controller (CNC). Genomsnittlig paket- fördröjning, genomsnittlig fördröjningsvariation, genomsnittlig genomström- ning och paketförlust mäts för att jämföra prestandaskillnaden när vår TSN- schemaläggare används jämfört med när den inte används. Det utformade sy- stemet testas genom att mäta nätverkets påverkan i termer av genomsnittlig fördröjning och paketförlust. 5GS logiska bryggbeteende simuleras genom att dynamiskt variera 5G-bryggfördröjningen. För varje bildöverföring varieras bryggans bearbetningsfördröjning med en fördefinierad uppsättning värden. Två fördefinierade uppsättningar av 5GS-fördröjningsvariationer beaktas som ligger mellan 1-10ms respektive 5-10ms. När vi beräknar nätverkspåverkan drar vi slutsatsen att den totala effekten på nätverket minskar när variationen i fördröjningen blir mindre. Detta visar att högre fördröjningsvariationer har en signifikant effekt medan mindre fördröjningsvariationer har en försumbar effekt. I det senare fallet är systemfördröjningen betydligt stabilare och kan användas för tillämpningar i verkliga TSN-scenarier.