This thesis presents an overview of the simulation, design, and measurement of state-of-the-art Silicon-Germanium Hetro-Junction Bipolar Transistor (SiGe HBT) low-noise amplifiers (LNAs). The LNA design trade-off space is presented and methods for achieving an optimized design are discussed. In Chapter 1, we review the importance of LNAs and the benefits of SiGe HBT technology in high frequency amplifier design. Chapter 2 introduces LNA design and basic noise theory. A graphical LNA design approach is presented to aid in understanding of the high-frequency LNA design process. Chapter 3 presents an LNA design optimization method for power constrained applications. Measured results using this design technique are highlighted and shown to have record performance. Lastly, in Chapter 4, we highlight cryogenic noise performance and present measured results from cryogenic operation of SiGe HBT LNAs. We demonstrate in this thesis that SiGe HBT LNAs have the capability to meet the demanding needs for next generation wireless systems. The aim of the analysis presented herein is to provide designers with the fundamentals of designing SiGe HBT LNAs through relevant design examples and measured results.

For the new generation wireless communication systems, there is an increasing demand for devices that covers more than one frequency band. This results in a need for wide-band tunable front-ends. The main objective of this study is to use dual band filters in the design of a multi-band front-end. A wide-band low noise amplifier is also required. To accomplish this project, a fixed frequency bandstop filter, a tunable dual-band filter and a wide-band LNA are designed and implemented successfully. The predefined specifications of this front-end include gain, gain flatness, spurious signal rejection, frequency tuning range, noise figure and linearity. Total power dissipation and number of elements are also taken into consideration. Test results of the manufactured front-end are compared with the results of existing single band front-ends. In order to design a good tunable wide-band filter, just tuning its center frequency will not be enough. The noise figure of this dual-band filter will be proportional to its insertion loss if it will be used as a pre-selection filter in front of a LNA. Hence its insertion loss will affect the overall noise figure of the system. If it will be used after the LNA, its linearity will be more important. When a bandpass filter is tuned over wide range of frequencies, its bandwidth varies significantly which leads to a degradation in rejection of the spurious signals. Therefore, there must be a simultaneous control of center frequency, bandwidth and insertion loss while providing enough linearity. In order to accomplish this mission, a filter that has two passbands is designed and implemented. The first passband is tunable between 136MHz and 174MHz while the second one is tunable between 380MHz and 470MHz. Also, the low noise amplifier works properly between 136MHz and 470MHz. As a result, a front-end that covers two bands is obtained.

Recent research focuses on expanding the use of RF/Microwave circuits and systems to include multi-disciplinary applications. One example is the detection of the dielectric properties of chemicals and bio-chemicals at microwave frequencies, which is useful for pharmaceutical applications, food and drug safety, medical diagnosis and material characterization. Dielectric spectroscopy is also quite relevant to detect the frequency dispersive characteristics of materials over a wide frequency range for more accurate detection. In this dissertation, on-chip and on-board solutions for microwave chemical sensing are proposed. An example of an on-chip dielectric detection technique for chemical sensing is presented. An on-chip sensing capacitor, whose capacitance changes when exposed to material under test (MUT), is a part of an LC voltage-controlled oscillator (VCO). The VCO is embedded inside a frequency synthesizer to convert the change in the free runing frequency frequency of the VCO into a change of its input voltage. The system is implemented using 90 nm CMOS technology and the permittivities of MUTs are evaluated using a unique detection procedure in the 7-9 GHz frequency range with an accuracy of 3.7% in an area of 2.5 × 2.5 mm^2 with a power consumption of 16.5 mW. The system is also used for binary mixture detection with a fractional volume accuracy of 1-2%. An on-board miniaturized dielectric spectroscopy system for permittivity detec- tion is also presented. The sensor is based on the detection of the phase difference be- tween the input and output signals of cascaded broadband True-Time-Delay (TTD) cells. The sensing capacitor exposed to MUTs is a part of the TTD cell. The change of the permittivity results in a change of the phase of the microwave signal passing through the TTD cell. The system is fabricated on Rogers Duroid substrates with a total area of 8 × 7.2 cm2. The permittivities of MUTs are detected in the 1-8 GHz frequency range with a detection accuracy of 2%. Also, the sensor is used to extract the fractional volumes of mixtures with accuracy down to 1%. Additionally, multi-band and multi-standard communication systems motivate the trend to develop broadband front-ends covering all the standards for low cost and reduced chip area. Broadband amplifiers are key building blocks in wideband front-ends. A broadband resistive feedback low-noise amplifier (LNA) is presented using a composite cross-coupled CMOS pair for a higher gain and reduced noise figure. The LNA is implemented using 90 nm CMOS technology consuming 18 mW in an area of 0.06 mm2. The LNA shows a gain of 21 dB in the 2-2300 MHz frequency range, a minimum noise figure of 1.4 dB with an IIP3 of -1.5 dBm. Also, a four-stage distributed amplifier is presented providing bandwidth extension with 1-dB flat gain response up to 16 GHz. The flat extended bandwidth is provided using coupled inductors in the gate line with series peaking inductors in the cascode gain stages. The amplifier is fabricated using 180 nm CMOS technology in an area of 1.19 mm2 achieving a power gain of 10 dB, return losses better than 16 dB, noise figure of 3.6-4.9 dB and IIP3 of 0 dBm with 21 mW power consumption. All the implemented circuits and systems in this dissertation are validated, demonstrated and published in several IEEE Journals and Conferences.

Multipath amplifier theory: In this thesis it is proven that the theoretical minimum noise measure of a multipath amplifier (an amplifier which has multiple parallel amplifiers) is achieved by using the optimum source impedance for the amplifier and the optimum gain for each amplification path. This optimum source impedance and gain can be calculated by using the optimum–loaded input network, i.e. by replacing each amplifier with its optimum source impedance. The resulting noise measure is the same as the minimum noise measure of the amplifiers used in the amplification paths. Whereas single–path amplifiers can achieve this minimum noise measure over narrow bandwidths, multipath amplifiers are theoretically able to achieve the minimum noise measure over very broad bandwidths. The theory is demonstrated by applying it to distributed amplifiers. In an ideal distributed amplifier, the magnitude of the optimum gain of the amplification paths decreases and the phase delay increases the farther the stage is from the input, with the decrease in gain being faster for higher frequencies. The challenge in designing broadband, low–noise, distributed amplifiers is to achieve optimum gain matching over broad bandwidths. Multipath amplifier design procedure: Based on the theory, a three step design and optimisation procedure is introduced. Firstly, unconditionally stable amplification paths are designed to have small minimum noise measures, then an input network is designed for optimum source impedance matching and lastly an output network is designed for gain matching. Multipath amplifier prototype: The theory and design procedure is demonstrated by optimising a 0.5–2 GHz distributed amplifier. An average noise measure of 0.3 dB is achieved, which is only 0.1 dB higher than the minimum noise measure of the amplification stages used. This increase is mainly due to transmission line loss and gain mismatch. Radio telescope feasibility: Multipath amplifiers break the trade–off between noise temperature, bandwidth and source termination that a single–path amplifier has, because they have much more design freedom when designing the input network. In general, the more paths, the larger the low–noise bandwidth, but the larger and more complex the amplifier. Roughly two to three amplification paths are required per octave of bandwidth for LNAs around 1 GHz. When the bandwidth is very narrow, a single path is sufficient. Multipath amplifiers have similar trade–offs between linearity and power consumption, between noise temperature and noise resistance, and between noise temperature and size to a single–path amplifier. Multipath amplifiers are therefore a feasible alternative for use in radio telescopes. / Thesis (Ph.D. (Space Physics))--North-West University, Potchefstroom Campus, 2011.

Multipath amplifier theory: In this thesis it is proven that the theoretical minimum noise measure of a multipath amplifier (an amplifier which has multiple parallel amplifiers) is achieved by using the optimum source impedance for the amplifier and the optimum gain for each amplification path. This optimum source impedance and gain can be calculated by using the optimum–loaded input network, i.e. by replacing each amplifier with its optimum source impedance. The resulting noise measure is the same as the minimum noise measure of the amplifiers used in the amplification paths. Whereas single–path amplifiers can achieve this minimum noise measure over narrow bandwidths, multipath amplifiers are theoretically able to achieve the minimum noise measure over very broad bandwidths. The theory is demonstrated by applying it to distributed amplifiers. In an ideal distributed amplifier, the magnitude of the optimum gain of the amplification paths decreases and the phase delay increases the farther the stage is from the input, with the decrease in gain being faster for higher frequencies. The challenge in designing broadband, low–noise, distributed amplifiers is to achieve optimum gain matching over broad bandwidths. Multipath amplifier design procedure: Based on the theory, a three step design and optimisation procedure is introduced. Firstly, unconditionally stable amplification paths are designed to have small minimum noise measures, then an input network is designed for optimum source impedance matching and lastly an output network is designed for gain matching. Multipath amplifier prototype: The theory and design procedure is demonstrated by optimising a 0.5–2 GHz distributed amplifier. An average noise measure of 0.3 dB is achieved, which is only 0.1 dB higher than the minimum noise measure of the amplification stages used. This increase is mainly due to transmission line loss and gain mismatch. Radio telescope feasibility: Multipath amplifiers break the trade–off between noise temperature, bandwidth and source termination that a single–path amplifier has, because they have much more design freedom when designing the input network. In general, the more paths, the larger the low–noise bandwidth, but the larger and more complex the amplifier. Roughly two to three amplification paths are required per octave of bandwidth for LNAs around 1 GHz. When the bandwidth is very narrow, a single path is sufficient. Multipath amplifiers have similar trade–offs between linearity and power consumption, between noise temperature and noise resistance, and between noise temperature and size to a single–path amplifier. Multipath amplifiers are therefore a feasible alternative for use in radio telescopes. / Thesis (Ph.D. (Space Physics))--North-West University, Potchefstroom Campus, 2011.

Η περιοχή των ραδιοσυχνοτήτων (RF) για σχεδίαση ηλεκτρονικών κυκλωμάτων για τηλεπικοινωνιακά συστήματα αποτελεί ένα χώρο έντονης ερευνητικής δραστηριότητας. Το πρότυπο υπερευρείας ζώνης με την ονομασία Ultra Wideband (UWB), που καταλαμβάνει συχνότητες από 3.1-10.6 GHz, αποτέλεσε αντικείμενο της παρούσης έρευνας με σκοπό την σχεδίαση, κατασκευή και μέτρηση ολοκληρωμένων κυκλωμάτων με έμφαση στα κυκλώματα του μπροστινού τμήματος του UWB δέκτη. Η κατανόηση της λειτουργίας του πομποδέκτη και των παραμέτρων λειτουργίας σε επίπεδο συστήματος αποτέλεσε την αρχική προσέγγιση, με σκοπό τον καθορισμό των προδιαγραφών λειτουργίας των πιο κρίσιμων στοιχείων. Η ανάλυση έλαβε χώρα τόσο σε θεωρητικό επίπεδο όσο και σε επίπεδο εξομοίωσης και τα ηλεκτρονικά στοιχεία των υψηλών συχνοτήτων όπως είναι ο ενισχυτής χαμηλού θορύβου (Low Noise Amplifier - LNA) καθώς και ο μίκτης είναι τα πιο απαιτητικά στη σχεδίαση. Η έρευνα επικεντρώθηκε αρχικά στο κύκλωμα του ενισχυτή χαμηλού θορύβου , το οποίο ευρισκόμενο αμέσως μετά την κεραία λήψης, καλείται να ικανοποιήσει πολλές και αντικρουόμενες μεταξύ τους απαιτήσεις όσον αφορά το εύρος ζώνης, το κέρδος, την κατανάλωση ενέργειας και επιφανείας πυριτίου και το θόρυβο. Στα πλαίσια της μελέτης εξερευνήθηκαν και αξιολογήθηκαν οι υφιστάμενες τοπολογίες που έχουν εμφανιστεί στη βιβλιογραφία και επιλέχθηκαν δύο από αυτές για περεταίρω διερεύνηση. Το πρώτο ολοκληρωμένο που κατασκευάστηκε περιλαμβάνει τρεις ενισχυτές, οι δύο από αυτούς χρησιμοποιούν την τοπολογία κοινής πηγής με φίλτρο εισόδου και πηνίο στην πηγή (inductive source degeneration) και διαφέρουν στον τρόπο μέτρησης, όπου ο ένας ενισχυτής μετράται πάνω στο ολοκληρωμένο (on-wafer probing) και ο έτερος τοποθετείται σε πλακέτα (chip on board). Με τον τρόπο αυτό αποκτάται διαίσθηση όσον αφορά την επίδραση των παρασιτικών που υπεισέρχονται εξαιτίας των διασυνδέσεων των αγωγών (bondwires) μεταξύ ολοκληρωμένου και πλακέτας. Ταυτόχρονα για τον συγκεκριμένο ενισχυτή εφαρμόζεται και στρατηγική προστασίας από ηλεκτροστατικά φορτία (ESD). Ο τρίτος ενισχυτής βασίζεται στην τοπολογία ανάδρασης και αποτέλεσε προϊόν πρωτότυπης έρευνας και χρησιμοποιήθηκαν τεχνικές διεύρυνσης του εύρους ζώνης λειτουργίας με χρήση επαγωγικών στοιχείων. Οι μετρήσεις που επακολούθησαν την κατασκευή αποδείχθηκαν επιτυχείς και κατά κανόνα υπήρξε σύγκλιση με την εξομοίωση. Ο τρίτος ενισχυτής παρουσιάζει την πιο ανταγωνιστική απόδοση και είναι ικανός να λειτουργήσει μέχρι τα 7GHz. Επακόλουθο της κυκλωματικής μελέτης των ενισχυτών χαμηλού θορύβου υπήρξε η εστίαση σε επίπεδο συστήματος για την κατασκευή του συνολικού RF τμήματος του δέκτη σε ολοκληρωμένο και για λειτουργία μέχρι τα 10.6GHz. Το σύστημα περιλαμβάνει τον LNA της τοπολογίας με ανάδραση και στη συνέχεια δύο πανομοιότυπα μονοπάτια αποτελούμενα το καθένα από μίκτη, υψιπερατό φίλτρο και απομονωτή εξόδου στα 50 Ω για τις ανάγκες της μέτρησης. Ως κύριες προκλήσεις ανέκυψαν ο σχεδιασμός του μίκτη και κυρίως της διεπαφής με τον LNA, ο οποίος παρέχει σήμα μονής εξόδου ενώ ο μίκτης λειτουργεί διαφορικά. Στα πλαίσια της διατριβής προτάθηκε μια τεχνική για κύκλωμα μετατροπής μονού σε διαφορικό σήμα (balun), η οποία συνδυαζόμενη με την τοπολογία του μίκτη που επελέγη, ουσιαστικά ενσωματώνεται στο μίκτη και παρέχει διαφορικά σήματα με πολύ καλή ακρίβεια στο πλάτος και τη φάση. Το balun βασίζεται στην τοπολογία του διαφορικού ζεύγους και επεκτείνει πάνω σε αυτήν με χρήση πηνίου που στο κέντρο του παρέχει έναν τρίτο ακροδέκτη διασύνδεσης στην τροφοδοσία. Καταυτόν τον τρόπο λαμβάνει χώρα σύζευξη μεταξύ των φορτίων του balun που εγγυάται την ακρίβεια των μεγεθών που προαναφέρθηκαν. Η τεχνική υποστηρίζεται από ενδελεχή μαθηματική ανάλυση και παρουσιάζονται συγκρίσεις μεταξύ θεωρίας και εξομοίωσης με σύγκλιση μεταξύ των. Ο μίκτης που κατέληξε η έρευνα ανήκει στην κατηγορία της συνδεσμολογίας folded cascode. Δεδομένων επίσης των περιορισμών που υπήρχαν στον εξοπλισμό μέτρησης εφαρμόστηκαν τεχνικές με πιο σημαντική την τροφοδότηση των σημάτων ταλαντωτή τα οποία εσωτερικά του ολοκληρωμένου μετατρέπονται σε διαφορικά και καθοδηγούνται για αποφυγή ασυμμετριών σε ισομήκης μεταλλικές γραμμές μεταφοράς. Σε όλα τα κρίσιμα σημεία έχει προβλεφτεί στρατηγική θωράκισης των υψίσυχνων σημάτων ενώ η τοποθέτηση ενός πολύ μεγάλου αριθμού στοιχείων στο πυρίτιο υπήρξε προϊόν συγκερασμού διαφορετικών απαιτήσεων στη χωροταξία τους με πολυάριθμες τεχνικές και εμπειρικούς κανόνες να έχουν εφαρμοστεί. Η τελική προτεινόμενη αρχιτεκτονική τύπου άμεσης μετατροπής παρόλα τα σχεδιαστικά ρίσκα που είχαν ληφθεί, λειτούργησε επιτυχώς μέχρι και τα 8.5GHz επισφραγίζοντας την συνολική προσπάθεια. / The domain of RF engineering for electronic circuits, targeting the application of telecommunication systems, constitutes a field of intense research activities. The UWB protocol that occupies a frequency spectrum between 3.1 and 10.6 GHz is the subject of the current work which aims to the design, fabrication and measurement of electronic circuits with emphasis put on the receiver’s RF front end. The initial focus of the research work targets the Low Noise Amplifier (LNA) circuit, a demanding and challenging circuit that being at the very front of the receiver’s chain, has to compromise among different and contradictory requirements, namely the extended bandwidth, the gain, the power and chip area consumption and the noise performance. Existing topologies in the literature were explored and classified and two among them were selected for further research. The first fabricated chip includes three LNAs, two of which apply the common source topology with input bandpass filter and inductive source degeneration and their difference lies in the measurement method. One amplifier is measured on wafer while the other is mounted on board. That way, intuition is acquired regarding the effect of the bondwires that act as the interface between the chip and the board. At the same time, ESD protection strategy is applied as the chip is more vulnerable to static currents. The third LNA is based on the feedback topology and constitutes a work of novelty, where bandwidth extension techniques were applied, comprising of inductive elements. The following measurement procedure was successful indicating an upper frequency of operation for the feedback LNA up to 7GHz. The focus of the work after the LNAs was shifted to system level for the implementation of the total RF front end of the receiver up to 10.6GHz. The system comprises an improved version of the feedback LNA followed by two identical paths, each one consisting of a mixer, a high pass filter and an output buffer at 50 Ohm for measurement purpose. The challenges that are mostly highlighted are the mixer design in conjunction with the necessary balun interface from the single ended output of the LNA to the differential mixer. A novel technique is proposed for the balun that builds on the differential pair topology and provides coupling between the load elements that both are implemented with a center tapped inductor. That way the designed balun achieves balanced outputs in terms of amplitude and phase. The technique is supported by mathematical analysis and the comparison between computed and simulated results show convergence. The resulting mixer that includes the balun belongs to the folded cascode differential connection. Moreover, given the limitations of the available measurement equipment, several layout techniques were applied; particularly in the issue of the external LO signal feeding. The two quadrature LO signals are provided in single ended form and traverse the chip by two equal length transmission lines that are separated at the center of the chip and reach the on chip single to differential converters that are placed close to the mixers. In every critical point, care is taken to shield the high frequency signals from interferences. In any case, the placing of a high number of individual elements that have different requirements on the same chip requires for compromises, while layout techniques and rules of thumb have been applied to the maximum extend. The final proposed architecture belongs to the direct conversion category and worked successfully up to the frequency of 8.5GHz. It achieves gain of 25dB, double sideband noise figure of 7dB and power consumption of 62.7 mW.

Um novo circuito amplificador de 50 MHz - 1 GHz com alta linearidade para o padrão IEEE 802.22 “wireless regional area” (WRAN) é apresentado. Ele foi implementado sem nenhum indutor e oferece uma saída diferencial para ser utilizada como balun. Técnicas de cancelamento de ruído e aumento de linearidade foram usadas para melhorar a performace do amplificador de modo que eles pudessem ser otimizados separadamente. A linearidade foi melhorada utilizando transistores conectados como diodo. O amplificador foi implementado em um processo CMOS 130 nm, em uma área compacta de 136 m x 71 m. As simulações são apresentadas para esquemáticos pós-leiaute para duas classes diferentes de projeto: um visando a melhor linearidade e o outro a melhor Figura de Ruído (FR). Quando otimizado para melhor linearidade, os resultados de simulação atingem um ganho de tensão > 23.7 dB (ganho de potência > 19.1 dB), uma figura de ruído < 3.6 dB na banda inteira (com 2.4 dB min), um ponto de intersecção de terceira ordem (IIP3) > 3.3 dBm (7.6 dBm max) e um coeficiente de reflexão de entrada S11 < -16 dB. Quando otimizado para melhor figura de ruído, ele atinge um ganho de tensão > 24.7 dB (ganho de potência > 19.8 dB), uma FR < 2 dB na banda inteira, um IIP3 > -0.3 dBm e um S11 < -11 dB. Resultados de simulação Monte Carlo confirmam baixa sensibilidade à variabilidade de processo. Além disso, uma baixa sensibilidade com a temperatura na faixa de -55 até 125 C foi observada para Ganho, FR e S11. Consumo de potência é 17.6 mA sob fonte de alimentação de 1.2 V. / A new 50 MHz - 1 GHz low-noise amplifier circuit with high linearity for IEEE 802.22 wireless regional area network (WRAN) is presented. It was implemented without any inductor and offers a differential output for balun use. Noise cancelling and linearity boosting techniques were used to improve the amplifier performance in a way they can be separately optimized. Linearity was improved using diode-connected transistors. The amplifier was implemented in a 130 nm CMOS process in a compact 136 m x 71 m area. Simulations are presented for post-layout schematics for two classes of design: one for best linearity, another for best noise figure (NF). When optimized for best linearity, simulation results achieve a voltage gain > 23.7 dB (power gain > 19.1 dB), a NF < 3.6 dB over the entire band (with 2.4 dB min figure), an input third-order intercept point (IIP3) > 3.3 dBm (7.6 dBm max.) and an input power reflection coefficient S11 < -16 dB. When optimized for best NF, it achieves a voltage gain > 24.7 dB (power gain > 19.8 dB), a NF < 2 dB over the entire band, an IIP3 > -0.3 dBm and an S11 < -11 dB. Monte Carlo simulation results confirm low sensitivity to process variations. Also a low sensitivity to temperature within the range -55 to 125 C was observed for Gain, NF and S11. Power consumption is 17.6 mA under a 1.2 V supply.

Um novo circuito amplificador de 50 MHz - 1 GHz com alta linearidade para o padrão IEEE 802.22 “wireless regional area” (WRAN) é apresentado. Ele foi implementado sem nenhum indutor e oferece uma saída diferencial para ser utilizada como balun. Técnicas de cancelamento de ruído e aumento de linearidade foram usadas para melhorar a performace do amplificador de modo que eles pudessem ser otimizados separadamente. A linearidade foi melhorada utilizando transistores conectados como diodo. O amplificador foi implementado em um processo CMOS 130 nm, em uma área compacta de 136 m x 71 m. As simulações são apresentadas para esquemáticos pós-leiaute para duas classes diferentes de projeto: um visando a melhor linearidade e o outro a melhor Figura de Ruído (FR). Quando otimizado para melhor linearidade, os resultados de simulação atingem um ganho de tensão > 23.7 dB (ganho de potência > 19.1 dB), uma figura de ruído < 3.6 dB na banda inteira (com 2.4 dB min), um ponto de intersecção de terceira ordem (IIP3) > 3.3 dBm (7.6 dBm max) e um coeficiente de reflexão de entrada S11 < -16 dB. Quando otimizado para melhor figura de ruído, ele atinge um ganho de tensão > 24.7 dB (ganho de potência > 19.8 dB), uma FR < 2 dB na banda inteira, um IIP3 > -0.3 dBm e um S11 < -11 dB. Resultados de simulação Monte Carlo confirmam baixa sensibilidade à variabilidade de processo. Além disso, uma baixa sensibilidade com a temperatura na faixa de -55 até 125 C foi observada para Ganho, FR e S11. Consumo de potência é 17.6 mA sob fonte de alimentação de 1.2 V. / A new 50 MHz - 1 GHz low-noise amplifier circuit with high linearity for IEEE 802.22 wireless regional area network (WRAN) is presented. It was implemented without any inductor and offers a differential output for balun use. Noise cancelling and linearity boosting techniques were used to improve the amplifier performance in a way they can be separately optimized. Linearity was improved using diode-connected transistors. The amplifier was implemented in a 130 nm CMOS process in a compact 136 m x 71 m area. Simulations are presented for post-layout schematics for two classes of design: one for best linearity, another for best noise figure (NF). When optimized for best linearity, simulation results achieve a voltage gain > 23.7 dB (power gain > 19.1 dB), a NF < 3.6 dB over the entire band (with 2.4 dB min figure), an input third-order intercept point (IIP3) > 3.3 dBm (7.6 dBm max.) and an input power reflection coefficient S11 < -16 dB. When optimized for best NF, it achieves a voltage gain > 24.7 dB (power gain > 19.8 dB), a NF < 2 dB over the entire band, an IIP3 > -0.3 dBm and an S11 < -11 dB. Monte Carlo simulation results confirm low sensitivity to process variations. Also a low sensitivity to temperature within the range -55 to 125 C was observed for Gain, NF and S11. Power consumption is 17.6 mA under a 1.2 V supply.

Um novo circuito amplificador de 50 MHz - 1 GHz com alta linearidade para o padrão IEEE 802.22 “wireless regional area” (WRAN) é apresentado. Ele foi implementado sem nenhum indutor e oferece uma saída diferencial para ser utilizada como balun. Técnicas de cancelamento de ruído e aumento de linearidade foram usadas para melhorar a performace do amplificador de modo que eles pudessem ser otimizados separadamente. A linearidade foi melhorada utilizando transistores conectados como diodo. O amplificador foi implementado em um processo CMOS 130 nm, em uma área compacta de 136 m x 71 m. As simulações são apresentadas para esquemáticos pós-leiaute para duas classes diferentes de projeto: um visando a melhor linearidade e o outro a melhor Figura de Ruído (FR). Quando otimizado para melhor linearidade, os resultados de simulação atingem um ganho de tensão > 23.7 dB (ganho de potência > 19.1 dB), uma figura de ruído < 3.6 dB na banda inteira (com 2.4 dB min), um ponto de intersecção de terceira ordem (IIP3) > 3.3 dBm (7.6 dBm max) e um coeficiente de reflexão de entrada S11 < -16 dB. Quando otimizado para melhor figura de ruído, ele atinge um ganho de tensão > 24.7 dB (ganho de potência > 19.8 dB), uma FR < 2 dB na banda inteira, um IIP3 > -0.3 dBm e um S11 < -11 dB. Resultados de simulação Monte Carlo confirmam baixa sensibilidade à variabilidade de processo. Além disso, uma baixa sensibilidade com a temperatura na faixa de -55 até 125 C foi observada para Ganho, FR e S11. Consumo de potência é 17.6 mA sob fonte de alimentação de 1.2 V. / A new 50 MHz - 1 GHz low-noise amplifier circuit with high linearity for IEEE 802.22 wireless regional area network (WRAN) is presented. It was implemented without any inductor and offers a differential output for balun use. Noise cancelling and linearity boosting techniques were used to improve the amplifier performance in a way they can be separately optimized. Linearity was improved using diode-connected transistors. The amplifier was implemented in a 130 nm CMOS process in a compact 136 m x 71 m area. Simulations are presented for post-layout schematics for two classes of design: one for best linearity, another for best noise figure (NF). When optimized for best linearity, simulation results achieve a voltage gain > 23.7 dB (power gain > 19.1 dB), a NF < 3.6 dB over the entire band (with 2.4 dB min figure), an input third-order intercept point (IIP3) > 3.3 dBm (7.6 dBm max.) and an input power reflection coefficient S11 < -16 dB. When optimized for best NF, it achieves a voltage gain > 24.7 dB (power gain > 19.8 dB), a NF < 2 dB over the entire band, an IIP3 > -0.3 dBm and an S11 < -11 dB. Monte Carlo simulation results confirm low sensitivity to process variations. Also a low sensitivity to temperature within the range -55 to 125 C was observed for Gain, NF and S11. Power consumption is 17.6 mA under a 1.2 V supply.

Orientador: Luiz Carlos Kretly / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-11T03:07:44Z (GMT). No. of bitstreams: 1 Capovilla_CarlosEduardo_D.pdf: 7813094 bytes, checksum: 52ab9727d246649f4c3628a9a462e9c2 (MD5) Previous issue date: 2008 / Resumo: Esta pesquisa tem por objetivo a concepção de novas topologias de circuitos integrados e suas caracterizações para operação em sistemas de rádio-recepção. O projeto e a fabricação de chaves de RF, LNAs, mixer e VCOs são apresentados. A técnica SMILE (Spatial MultIplexing ofLocal Elements) foi adotada devido às suas vantagens e funcionalidade para a otimização física de antenas inteligentes. Essa técnica requer um chaveamento sequencial das antenas do arranjo e para tal foi desenvolvido um controle de chaveamento acionado por um VCO digital. A demultiplexação analógica do sinal é implementada através de um OTA e chaves analógicas diferenciais. Assim, além da introdução de novas topologias de circuitos integrados, este trabalho estabelece procedimentos de projeto e simulação associados à validação dos dispositivos fabricados. Palavras-chave: circuitos integrados, rádio-recepção, antenas inteligentes, SMILE / Abstract: This research aims the conception of new topologies of integrated circuits and its characterizations for operation in radio-receiver systems. The design and fabrication of RF switches, LNAs, mixer, and VCOs are presented. The SMILE - Spatial MultIplexing of Local Elements - technique was adopted due to its advantages and functionality for the intelligent antennas physical optimization. This technique requires a sequential switching of the antennas and for this purpose a switch driver with a digital VCO was developed. The analog demultiplexation of the signal is implemented with OTA and differential analog switches. Thus, besides the introduction of new integrated circuit topologies, this work establishes procedures of design and simulation together with the manufactured devices validation. Keywords: integrated circuits, radio-reception, smart antennas, SMILE / Doutorado / Eletrônica, Microeletrônica e Optoeletrônica / Doutor em Engenharia Elétrica