The Square Kilometre Array (SKA) is a multibillion and a multinational science project to build the world’s largest and most sensitive radio telescope. For a very large field of view, the combined collecting area would be one square kilometre (or 1, 000, 000 square metre) and spread over more than 3,000 km wide which will require a massive count of antennas (thousands). Each of the antennas contains hundreds of low noise amplifier (LNA) circuits. The antenna arrays are divided into low, medium and high operational frequencies and located at different positions to boost up the telescope’s scanning sensitivity.The objective of this work was to develop and fabricate fully on-chip LNA circuits to meet the stringent requirements for the mid-frequency array from 0.4 GHz to 1.4 GHz of the SKA radio astronomy telescope using Monolithic Microwave Integrated Circuit technology (MMIC). Due to the number of LNA reaching figures of millions, the fabricated circuits were designed with the consideration for low cost fabrication and high reliability in the receiver chain. Therefore, a relaxed optical lithography with Lg = 1 µm was adopted for a high yield fabrication process.Towards the fulfilment of the device’s low noise characteristics, a large number of device designs, fabrication and characterisation of InGaAs/InAlAs/InP pHEMTs were undertaken. These include optimisations at each critical fabrication steps. The device’s high breakdown and very low gate leakage characteristics were further improved by a combination of judicious epitaxial growth and manipulation of materials’ energy gaps. An attempt to increase the device breakdown voltage was also employed by incorporating Field Plate structure at the gate terminal. This yielded the devices with improvements in the breakdown voltage up to 15 V and very low gate leakage of 1 µA/mm, in addition to high transconductance (gm) characteristic. Fully integrated double stage LNA had measured NF varying from 1.2 dB to 1.6 dB from 0.4 GHz to 1.4 GHz, compared with a slightly lower NF obtained from simulation (0.8 dB to 1.1 dB) across the same frequency band.These are amongst the attractive device properties for the implementation of a fully on-chip MMIC LNA circuits demonstrated in this work. The lower circuit’s low noise characteristic has been demonstrated using large gate width geometry pHEMTs, where the system’s noise resistance (Rn) has successfully reduced to a few ohms. The work reported here should facilitate the successful implementation of rugged low noise amplifiers as required by SKA receivers.

La thèse présente le développement de capteurs CMOS pour un futur dosimètre électronique neutrons. A côté des systèmes passifs largement répandus, les dosimètres actifs existants ne donnent pas satisfaction, alors qu’ils sont fermement recommandés par une directive européenne (IEC 1323). Le groupe RaMsEs de l’IPHC développe un nouveau concept de dosimètre électronique personnel neutrons à base de capteurs CMOS. Au cours de cette thèse, le circuit intégré AlphaRad2, à très bas bruit et très faible consommation électrique, a été implémenté dans une technologie commerciale. Il intègre un réseau de micro-diodes sur une surface sensible de 6.55 cm2 avec sa chaîne de traitement sur le même substrat de silicium. Des simulations physiques ont permis d’étudier le processus de collection de charge et d’optimiser l'efficacité de collection. La géométrie du capteur est un compromis entre la collection des électrons secondaires et de la capacité totale du détecteur. Le circuit de lecture comprend un amplificateur de charge (CSA), un circuit de mise en forme (shaper) et un discriminateur pour une réponse digitale. Nous présentons une analyse théorique complète du circuit, les paramètres de dessin, ainsi que des tests électriques et des tests en sources de rayonnement. La sensibilité effective du système est au niveau de la particule unique (proton ou alpha), grâce à un très bon rapport signal à bruit. Une série complète de mesures en sources de photons, de neutrons et de particules chargées a permis de démontrer une bonne efficacité aux neutrons rapides et surtout une excellente réjection gamma grâce à l’application d’un seuil électronique approprié. / This thesis presents the development of CMOS sensors for a future neutron sensitive electronic individual dosemeter. Active dosemeters, exist but do not yet give results as satisfactory as passive devices, being however, mandatory for workers in addition to the passive dosimetry since 1995 (IEC 1323). The RaMsEs group in the laboratory IPHC is exploring a new compact device based on CMOS sensors for operational neutron dosimetry. In this thesis, a dedicated sensor, AlphaRad-2, with low noise and very low power consumption (314 μW), has been implemented in a commercial CMOS technology. The AlphaRad-2 integrates the sensing part made of a micro-diode array of 32×32 n-well/p-epi diodes on a sensitive area of 6.55 mm2 and the signal processing electronics on the same silicon substrate. Device physics simulations have been performed to study the charge collection mechanism in diode matrices, and to optimize the collection efficiency and its time properties. The sensor geometry is a compromise between the collection performance and the total capacitance of the detector. A charge sensitive amplifier (CSA), a shaper, and a discriminator are employed in the readout circuit. We present its theoretical analysis, circuit design, and electrical tests. Our device has a sensitivity at the level of one single secondary charge particle (proton or α) thanks to its excellent noise performance. Extensive measurements to radioactive sources of α-particles, photons, and fast neutrons, have demonstrated good detection efficiency to fast neutrons and excellent γ-rejection through applying an appropriate electronic threshold.

Målet med detta arbete var att konstruera en mycket känslig laddningsförstärkare som kan detektera och förstärka laddningar i storleksordningen femtocoulomb. Laddningsförstärkaren är tänkt att användas vid Habia Cables kabeltillverkning för att karaktärisera lågbruskabel med avseende på störning genererad av triboelektrisk uppladdning. Den bästa lågbruskabel Habia Cable tillverkar, så kallad super-lågbruskabel, uppvisar så låg triboelektrisk störning att vanliga laddningsförstärkare inte kan detektera den, därav behovet av en känsligare laddningsförstärkare. I en inledande litteraturstudie söktes information om triboelektrisk uppladdning och hur triboelektrisk uppladdning orsakar störning i kablar. Genom litteraturstudien inhämtades också teori kring hur laddningsförstärkare är uppbyggda och vilka speciella krav som ställs på dessa för att kunna detektera mycket små laddningar. Sedan vidtog arbete med att konstruera en laddningsförstärkare med kretsdesign, kretskortsdesign, lödning, inbyggnad och testning. Resultatet blev en laddningsförstärkaren som kan mäta laddningar från uppskattningsvis 0,1 femtocoulomb till 100 picocoulomb. Vid kvantifiering av triboelektrisk störning i super-lågbruskabel uppmättes så låga laddningar som 1,3 femtocoulomb. / The goal of this project was to construct a sensitive charge amplifier that could detect and amplify femtocoulomb charges. The charge amplifier is to be used at Habia Cable manufacturing sites to quantify the triboelectric noise performance of lownoise cables. Super-low-noise cables manufactured by Habia Cable perform so well regarding triboelectric noise that common charge amplifiers cannot detect the noise, thus the need for a more sensitive charge amplifier. Initially a literature study was performed in order to better understand triboelectric charging and triboelectric noise in cables. Thru the literature study knowledge of charge amplifiers and low charge measurements was also gained. After the literature study a charge amplifier was constructed. Work included circuit design, PCB design, soldering, construction of enclosure and testing. Tests shows that the constructed charge amplifier can detect charges as low as 1.3 femtocoulomb when quantifying triboelectric noise in super-low-noise cables. The charge amplifier can measure charges from approximately 0.1 femtocoulomb to 100 picocoulomb.

This master's thesis presents the design and the realization of a low noise amplifier (LNA) for the S band of radio frequency spectrum from 2.3 GHz to 2.4 GHz. This thesis is mainly focused on stability and impedance matching networks study. Ansoft Designer and ANSYS HFSS programs are used for this design to simulate the LNA. Different low noise devices are simulated in order to find the best results for the final design. Moreover, a coaxial cavity resonator is designed in the input of the LNA and works as a band pass filter. Finally, the LNA is fabricated and its properties compared with the simulation results.

This work deals with design, simulation and realisation of a receiving systém of an S-band front end for satellite communication. The first part of the project is designed the low noise amplifier (LNA) with high associated gain. The basic point of the design is choice of the active device. In the present time are available the ultra low noise transistors based on the GaAs with high mobility electron. The two-stage LNA has been designed with Agilent ATF-55143. It is pseudomorphic HEMTs ,which work in an enhancement mode.These transistor do not require a negative bias voltage and have extremely good typical noise figure. The design includes an interdigital tuned band pass filter between stages. The second part of the project is search another way design circuit. There are designed two LNA with paralel coupled line filter. The first has been applied on a PTFE substrate Duroid 5880 with relative permitivity 2,2 and tg d = 0,009. The substrate FR-4 (r = 4.34) with the thickness 0.06” was used for the realization.

Master´s thesis describestheproblemsoflow-noiseroadsurfaces. Thetheoretical part describestrafficnoise, sourcesofnoise, thelow-noiseroadsurfaces and thepractical part - describestwoproposalsoflow-noise stone masticasphalt SMA 8 LA and Düsseldorflow-noise stone asphalt LOA 5.

Dans un monde où l’information va de plus en plus vite, il est important de pouvoir rester connecté en permanence. De nouvelles solutions émergent pour connecter les passagers à bord d’un avion grâce aux communications par satellite. Parmi elles, on retrouve les antennes à pointage électronique dans lesquelles cette thèse de doctorat s’intègre. Une étude sur les différentes antennes existantes ou en projet est présentée. Les puces électroniques MMIC AsGa permettent d’appliquer des lois d’amplitude et de phase pour chaque élément rayonnant d’une antenne réseau. Cette thèse de doctorat porte sur la conception d’un déphaseur, après avoir étudié les technologies et les topologies de celui-ci. Ensuite, la conception d’un amplificateur faible bruit à gain variable est proposée à partir d’un état de l’art. Les résultats de simulation et de mesures de ces deux fonctions sont exposés. / In a world where the information is moving faster and faster, it is important to be able to stay connected continuously. Some new solutions for air transport connectivity are in development thanks to the rise of satellite communications. This thesis work is part of an electronically steerable antenna array project, developed as a solution to achieve In-Flight Connectivity in Ka-band. A state- of-the art review on electronically steerable antenna arrays is also presented. In these arrays, each radiating element needs a specific amplitude and phase to obtain a scanning beam by adding their contribution. This thesis focus on the design of a GaAs MMIC chip inclusion two functions: a phase shifter and a variable-gain low-noise amplifier. The simulation and measurement results are presented for these two functions.

Avec le contexte actuel des défis sécuritaires, la détection de petits objets devient un enjeu majeur pour lutter contre les actes malveillants. Mais les évolutions des technologies en bandes millimétriques et le potentiel de ces bandes, notamment autour de 60 GHz peuvent faciliter la conception de systèmes de plus en plus performants, permettant de répondre à ces enjeux. Cette thèse s’inscrit dans ce contexte pour proposer un système de détection ultra-large bande (ULB) millimétrique pour des applications de courte portée. Après un état de l'art détaillé des fondamentaux de la détection, nous présentons une validation de l'estimation de la surface équivalente radar (SER) par simulation avec le logiciel HFSS et par mesures en chambre anéchoïque. Ces deux études nous ont permis d'identifier les éléments essentiels à l'analyse système et les paramètres critiques de la détection d'objets canoniques cylindres et plaques. Une fois l'analyse système cernée, nous avons proposé une approche de détection multi-bande basée sur le radar monostatique pour améliorer la couverture de détection des systèmes, mais aussi et surtout pour pallier la limitation de la détection des objets en fonction de leur orientation par rapport à l'axe de viser de l'antenne. Nous avons également proposé une architecture (émetteur-récepteur) simple pouvant être associée au principe de détection. Le dimensionnement du système nous a permis d'identifier les amplificateurs faible bruit (LNAs) comme éléments critiques du récepteur et ainsi d'établir leurs spécifications pour atteindre les performances visées. Une comparaison des technologies SG13S de IHP et D007IH de OMMIC est menée dans la dernière partie de ce travail. Le choix de la technologie est justifié et la conception des LNAs sous ADS Keysight est détaillée. Une simulation de l'ensemble du système basée sur les performances des LNAs conçus et sur les simulations de SER est présentée pour illustrer la mise en œuvre de la détection. Enfin, les performances de la détection sont évaluées pour des cibles cylindriques et les apports du système proposé sont illustrés en comparaison avec une détection classique mono-bande / With the current context of security challenges, small objects detection is becoming a major issue in the fight against malicious acts. However, developments in millimeter-band technologies and the potential of these bands, particularly around 60 GHz, can facilitate the design of increasingly efficient systems to meet these challenges. This thesis is part of this context to propose an ultra-wideband (UWB) millimeter-wave detection system for short-range applications.After a detailed state-of-the-art of the fundamentals of detection, we present a validation of the radar cross-section (RCS) estimation by simulations with HFSS software and by measurements in anechoic chamber. These two studies allowed us to identify the essential elements for system analysis and the critical parameters for the detection of canonical objects such as cylinders and plates.Once the system analysis was identified, we proposed a multi-band detection approach based on monostatic radar to improve the detection coverage of the systems, but also and especially to overcome the limitation of objects detection according to their orientation in relation to the antenna boresight. We also proposed a simple architecture (transceiver) that could be associated with the detection principle. The system design allowed us to identify low noise amplifiers (LNAs) as critical elements of the receiver and thus establish their specifications to achieve the targeted performances.A comparison of IHP's SG13S and OMMIC's D007IH technologies is conducted in the last part of this work. The choice of technology is justified and the design of LNAs under ADS Keysight is detailed. A simulation of the entire system based on the performance of the designed LNAs and RCS simulations is presented to illustrate the implementation of detection. Finally, detection performances are evaluated for cylindrical targets and the contributions of the proposed system are illustrated in comparison with conventional single-band detection

No description available.

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with the transitions. Creating a noiseless standard cell library with MCML allows use of circuitry that uses low voltage switching with 1.5V between logic levels in a quiet or mixed-signal environment as opposed to the full rail to rail swinging of CMOS logic. This allows cohesive implementation with analog circuitry on the same chip due to constant current and lower switching ranges not creating rail noise during digital switching. Standard cells allow for the Cadence tools to automatically generate circuits and Cadence serves as the development platform for the MCML standard cells. The theory surrounding MCML is examined along with current and future applications well-suited for MCML are researched and explored with the goal of highlighting valid candidate circuits for MCML. Inverters and NAND gates with varying current drives are developed to meet these specialized goals and are simulated to prove viability for quiet, mixed-signal applications. Analysis and results show that MCML is a superior implementation choice compared toCMOSfor high speed and mixed signal applications due to frequency independent power dissipation and lack of generated noise during operation. Noise results show rail current deviations of 50nA to 300nA during switching over an average operating current of 20µA to 80µA respectively. The multiple order of magnitude difference between noise and signal allow the MCML cells to dissipate constant power and thus perform with no noise added to a system. Additional simulated results of a 31-stage ring oscillator result in a frequency for MCML of 1.57GHz simulated versus the 150.35MHz that MOSIS tested on a fabricated 31-stage CMOS oscillator. The layouts designed for the standard cell library conform to existing On Semiconductor ami06 technology dimensions and allow for design of any logical function to be fabricated. The I/O signals of each cell operate at the same input and output voltage swings which allow seamless integration with each other for implementation in any logical configuration.