The work consists of two parts. The first part is focused on the determination of an anti-skid properties of the test section on Vídenská street. The anti-skid properties will be measured using a pendulum tester and macrotexture will be set at the same time. Microtexture will be measured using a volumetric patch technique. In the second part we will try to gain an initial experience with design and testing of a low noise stone mastic asphalt. We will set basic characteristics and at the same time compare with a standard stone mastic asphalt. For the comparison two various bituminous binders are used. The water sensitivity, resistance against rutting and stiffness moduli are compared.

The task of the master's thesis is introduction with the problems of traffic noise, focusing on noise from road traffic. There is a description what is the noise, how it is formed, its resources and what are the methods of measuring. The following are the various noise reduction measures such as noise barriers and low noise pavements. The main attention is devoted to the noise generated at the tire / road that is reduced by these pavements. The practical part describes the implemented measurements on individual sections at various locations in our country. The measurement was carried by slightly modified method CPX with reference tire directly at the vehicle. The main aim was to evaluate the measurement data, make comparison of different low-noise surfaces with each other and with the commonly used surfaces. Then quantification of the rate reduction of the noise emission for a given section and verification of input data for noise modeling. In conclusion, the obtained results are summarized and based on them were confirmed very good acoustic properties with the recommendation to continue with measurements in the future.

A 5 GHz continuous unlicensed bandwidth is available at millimeter-wave (mm-wave) frequencies around 60 GHz and offers the prospect for multi gigabit wireless applications. The inherent atmospheric attenuation at 60 GHz due to oxygen absorption makes the frequency range ideal for short distance communication networks. For these mm-wave wireless networks, the low noise amplifier (LNA) is a critical subsystem determining the receiver performance i.e., the noise figure (NF) and receiver sensitivity. It however proves challenging to realise high performance mm-wave LNAs in a silicon (Si) complementary metal-oxide semiconductor (CMOS) technology. The mm-wave passive devices, specifically on-chip inductors, experience high propagation loss due to the conductivity of the Si substrate at mm-wave frequencies, degrading the performance of the LNA and subsequently the performance of the receiver architecture. The research is aimed at realising a high performance mm-wave LNA in a Si BiCMOS technology. The focal points are firstly, the fundamental understanding of the various forms of losses passive inductors experience and the techniques to address these issues, and secondly, whether the performance of mm-wave passive inductors can be improved by means of geometry optimising. An associated hypothesis is formulated, where the research outcome results in a preferred passive inductor and formulates an optimised passive inductor for mm-wave applications. The performance of the mm-wave inductor is evaluated using the quality factor (Q-factor) as a figure of merit. An increased inductor Q-factor translates to improved LNA input and output matching performance and contributes to the lowering of the LNA NF. The passive inductors are designed and simulated in a 2.5D electromagnetic (EM) simulator. The electrical characteristics of the passive structures are exported to a SPICE netlist which is included in a circuit simulator to evaluate and investigate the LNA performance. Two LNAs are designed and prototyped using the 13μ-m SiGe BiCMOS process from IBM as part of the experimental process to validate the hypothesis. One LNA implements the preferred inductor structures as a benchmark, while the second LNA, identical to the first, replaces one inductor with the optimised inductor. Experimental verification allows complete characterization of the passive inductors and the performance of the LNAs to prove the hypothesis. According to the author's knowledge, the slow-wave coplanar waveguide (S-CPW) achieves a higher Q-factor than microstrip and coplanar waveguide (CPW) transmission lines at mm-wave frequencies implemented for the 130 nm SiGe BiCMOS technology node. In literature, specific S-CPW transmission line geometry parameters have previously been investigated, but this work optimises the signal-to-ground spacing of the S-CPW transmission lines without changing the characteristic impedance of the lines. Optimising the S-CPW transmission line for 60 GHz increases the Q-factor from 38 to 50 in simulation, a 32 % improvement, and from 8 to 10 in measurements. Furthermore, replacing only one inductor in the output matching network of the LNA with the higher Q-factor inductor, improves the input and output matching performance of the LNA, resulting in a 5 dB input and output reflection coefficient improvement. Although a 5 dB improvement in matching performance is obtained, the resultant noise and gain performance show no significant improvement. The single stage LNAs achieve a simulated gain and NF of 13 dB and 5.3 dB respectively, and dissipate 6 mW from the 1.5 V supply. The LNA focused to attain high gain and a low NF, trading off linearity and as a result obtained poor 1 dB compression of -21.7 dBm. The LNA results are not state of the art but are comparable to SiGe BiCMOS LNAs presented in literature, achieving similar gain, NF and power dissipation figures. / Dissertation (MEng)--University of Pretoria, 2012. / Electrical, Electronic and Computer Engineering / unrestricted

<p>Пасивна индуктивна компонента и нискошумни појачавач у технологији<br />монолитних интегрисаних кола за широкопојасне примјене пројектовани<br />су, фабриковани и карактерисани. Приликом пројектовања индуктора<br />изабрана је топологија меандар, а осим софтверских алата за<br />пројектовање интегрисаних кола, кориштен је и симулатор<br />електромагнетског поља. Осим карактеризације основних параметара,<br />пажња је посвећена и анализи процесних и температурских варијација.<br />Спроведена је механичка карактеризација материјала од којег се састоји<br />заштитни слој фабрикованог интегрисаног кола. Нискошумни појачавач<br />пројектован је као први степен пријемника широкопојасне технологије, а<br />карактеризацијом је потврђена успјешност поступка.</p> / <p>Pasivna induktivna komponenta i niskošumni pojačavač u tehnologiji<br />monolitnih integrisanih kola za širokopojasne primjene projektovani<br />su, fabrikovani i karakterisani. Prilikom projektovanja induktora<br />izabrana je topologija meandar, a osim softverskih alata za<br />projektovanje integrisanih kola, korišten je i simulator<br />elektromagnetskog polja. Osim karakterizacije osnovnih parametara,<br />pažnja je posvećena i analizi procesnih i temperaturskih varijacija.<br />Sprovedena je mehanička karakterizacija materijala od kojeg se sastoji<br />zaštitni sloj fabrikovanog integrisanog kola. Niskošumni pojačavač<br />projektovan je kao prvi stepen prijemnika širokopojasne tehnologije, a<br />karakterizacijom je potvrđena uspješnost postupka.</p> / <p>A passive inductive component and a low-noise amplifier are designed,<br />fabricated in standard monolithic CMOS technology and characterized, both<br />intended for wideband operation. For the design of the inductor, meander<br />topology is chosen. Along with the integrated circuit design tools,<br />electromagnetic field simulator is used. Besides the standard parameter<br />characterization, special attention is dedicated to the analysis of process and<br />temperature variations. Furthermore, mechanical characterization of the<br />material that comprises the protection layer has been undertaken. Low-noise<br />amplifier is designed as the first stage of an ultra wideband receiver and the<br />results show that the circuit is successfully designed.</p>

Ohmic contacts are crucial components in semiconductor devices such as transistors and diodes, and lowering their contact resistance is an important factor in device performance enhancement. This is especially important for low-noise amplifiers (LNAs) where device noise temperature decreases both directly and indirectly with decreasing contact resistance. This becomes relevant in quantum computers operated at cryogenic temperatures as LNAs constitutes the 4 K quantum bit (qubit) readout signal amplification chain. The goal of this project is to investigated the superconducting element niobium (Nb) as contact material for indium phosphide (InP) high-electron-mobility transistors (HEMTs), being the active component in cryogenic high-frequency LNAs. For contact and barrier resistance determination, test structures were fabricated and utilized according to the transfer length method(TLM) and the recess TLM respectively. Measurements were performed in room temperature as well as in cryogenic temperatures below and above Nb’s bulk transition temperature of 9.25 K. The results show low-resistance Nb-based ohmic contacts for n-In0.65Ga0.35As, with the non-alloyed Nb(50 nm)/Au(100 nm) stack yielding a room temperature contact resistivity of (9.4 ± 0.5) × 10−8 Ωcm2. For all contacts the contact resistivity increased moving to cryogenic temperatures, as expected when electron occupation of high-energy states decreases. At cryogenic temperatures nosuperconducting transition was observed, attributed to the Nb layer thickness being roughly equal to its coherence length. Considering the effective barrier resistance, the Ni/Ge/Au/Nb/Au alloyed contact had the lowest room temperature resistance, reporting 143 Ω µm. In cryogenic temperatures the effective barrier resistance unexpectedly decreased in all contacts. The Nb/Au contact showed the best cryogenic performance, with a barrier resistance of 28 − 37 Ω µm. This indicates great potential for non-alloyed Nb/Au contacts in cryogenic InP HEMTs. / Alla halvledarkomponenter, som dioder och transistorer, har ohmska kontakter. Att sänka kontaktresistansen hos de ohmska kontakterna är ett sätt att höja prestandan hos en komponent. Särskilt gäller detta för lågbrusförstärkare, som har en brustemperatur som minskar både direkt och indirekt med avtagande kontaktresistans. För kvantdatorer som måste kylas till kryogena temperaturer för att fungera är detta relevant eftersom förstärkningen av utläsningssignalen från kvantbitar sker via lågbrusförstärkare vid 4 K. Målet för detta examensprojekt är att undersöka ohmska kontakter baserade på det supraledande materialet niobium (Nb) i indiumfosfidbaserade högelektronmobilitetstransistorer, som är den aktivakomponenten i kryogena högfrekvens-lågbrusförstärkare. För bestämning av kontaktoch barriärresistans producerades teststrukturer enligt Transfer Length-metoden (TLM) respektive etsad TLM. Mätningar genomfördes i rumstemperatur samt vid kryogena temperaturer både över och under niobiumets kritiska temperatur på 9.25 K. Resultatet visar låg kontaktresistans för Nb-baserade ohmska kontakter på n-In0.65Ga0.35As. Den icke-legerade Nb(50 nm)/Au(100 nm)-kontakten hade en kontaktresistivitet på (9.4 ± 0.5) × 10−8 Ωcm2 . Vid kryogena temperaturer ökade kontaktresistansen för samtliga Nb-baserade kontakter, vilket är förväntat då färre elektroner fyller högenergitillstånd. Inget supraledande tillstånd observerades vid kryogena temperaturer, vilket kan förklaras av att tjockleken på niobiumlagret var ungefär lika med dess koherenslängd. Lägst barriärresistans vid rumstemperatur hade den legerade Ni/Ge/Au/Nb/Au-kontakten, med ett värde på 143 Ω µm. Vid kryogena temperaturer skedde en oväntad minskning hos barriärsresistansen hos samtliga kontakter, där den lägst barriärsresistans uppmättes på den icke-legerade Nb/Au-kontakten, 28 − 37 Ω µm. Slutsatsen som dras är att det finns stor potential för användning av icke-legerade Nb/Au-kontakter för kryogena lågbrusförstärkare baserade på indiumfosfid.

Les systèmes de communication mobiles permettent l’utilisation de l’information en environnements complexes grâce à des dispositifs portables qui ont comme principale restriction la durée de leurs batteries. Des nombreux efforts se sont focalisés sur la réduction de la consommation d’énergie des circuits électroniques de ces systèmes, une fois que le développent des technologies des batteries ne avance pas au rythme nécessaire. En outre, les systèmes RF sont généralement conçus pour fonctionner de manière fixe, spécifiés pour le pire cas du lien de communication. Toutefois, ce scénario peut se produire dans une petite partie du temps, entraînant ainsi en perte d’énergie dans le reste du temps. La recherche des circuits RF adaptatifs, pour adapter le niveau du signal d'entrée pour réduire la consommation d'énergie est donc d'un grand intérêt et de l'importance. Dans la chaîne de réception radiofréquence, l'amplificateur à faible bruit (LNA) se montre un composant essentiel, autant pour les performances de la chaîne que pour la consommation d'énergie. Au cours des dernières décennies, des techniques pour la conception de LNAs reconfigurables ont été proposées et mises en oeuvre. Cependant, la plupart d'entre elles s’applique seulement au contrôle du gain, sans exploiter Le réglage de la linéarité et du bruit envisageant l'économie d'énergie. De plus,ces circuits occupent une grande surface de silicium, ce qui entraîne un coût élevé, ou NE correspondent pas aux nouvelles technologies CMOS à faible coût. L'objectif de cette étude est de démontrer la faisabilité et les avantages de l'utilisation d'un LNA reconfigurable numériquement dans une chaîne de réception radiofréquence, du point de vue de la consommation d'énergie et de coût de fabrication. / Mobile communication systems allow exploring information in complex environments by means of portable devices, whose main restriction is battery life. Once battery development does not follow market expectations, several efforts have been made in order to reduce energy consumption of those systems. Furthermore, radio-frequency systems are generally designed to operate as fixed circuits, specified for RF link worst-case scenario. However, this scenario may occur in a small amount of time, leading to energy waste in the remaining periods. The research of adaptive radio-frequency circuits and systems, which can configure themselves in response to input signal level in order to reduce power consumption, is of interest and importance. In a RF receiver chain, Low Noise Amplifier (LNA) stand as critical elements, both on the chain performance or power consumption. In the past some techniques for reconfigurable LNA design were proposed and applied. Nevertheless, the majority of them are applied to gain control, ignoring the possibility of linearity and noise figure adjustment, in order to save power. In addition, those circuits consume great area, resulting in high production costs, or they do not scale well with CMOS. The goal of this work is demonstrate the feasibility and advantages in using a digitally controlled LNA in a receiver chain in order to save area and power. / Os sistemas de comunicação móveis permitem a exploração da informação em ambientes complexos através dos dispositivos portáteis que possuem como principal restrição a duração de suas baterias. Como o desenvolvimento da tecnologia de baterias não ocorre na velocidade esperada pelo mercado, muitos esforços se voltam à redução do consumo de energia dos circuitos eletrônicos destes sistemas. Além disso, os sistemas de radiofrequência são em geral projetados para funcionarem de forma fixa, especificados para o cenário de pior caso do link de comunicação. No entanto, este cenário pode ocorrer em uma pequena porção de tempo, resultando assim no restante do tempo em desperdício de energia. A investigação de sistemas e circuitos de radiofrequência adaptativos, que se ajustem ao nível de sinal de entrada a fim de reduzir o consumo de energia é assim de grande interesse e importância. Dentro de cadeia de recepção de radiofrequência, os Amplificadores de Baixo Ruído (LNA) se destacam como elementos críticos, tanto para o desempenho da cadeia como para o consumo de potência. No passado algumas técnicas para o projeto de LNA reconfiguráveis foram propostas e aplicadas. Contudo, a maioria delas só se aplica ao controle do ganho, deixando de explorar o ajuste da linearidade e da figura de ruído com fins de economia de energia. Além disso, estes circuitos ocupam grande área de silício, resultando em alto custo, ou então não se adaptam as novas tecnologias CMOS de baixo custo. O objetivo deste trabalho é demonstrar a viabilidade e as vantagens do uso de um LNA digitalmente configurável em uma cadeia de recepção de radiofrequência do ponto de vista de custo e consumo de potência.

The prevalence of wireless standards and the introduction of dynamic standards/applications, such as software-defined radio, necessitate the next generation wireless devices that integrate multiple standards in a single chip-set to support a variety of services. To reduce the cost and area of such multi-standard handheld devices, reconfigurability is desirable, and the hardware should be shared/reused as much as possible. This research proposes several novel circuit topologies that can meet various specifications with minimum cost, which are suited for multi-standard applications. This doctoral study has two separate contributions: 1. The low noise amplifier (LNA) for the RF front-end; and 2. The analog-to-digital converter (ADC). The first part of this dissertation focuses on LNA noise reduction and linearization techniques where two novel LNAs are designed, taped out, and measured. The first LNA, implemented in TSMC (Taiwan Semiconductor Manufacturing Company) 0.35Cm CMOS (Complementary metal-oxide-semiconductor) process, strategically combined an inductor connected at the gate of the cascode transistor and the capacitive cross-coupling to reduce the noise and nonlinearity contributions of the cascode transistors. The proposed technique reduces LNA NF by 0.35 dB at 2.2 GHz and increases its IIP3 and voltage gain by 2.35 dBm and 2dB respectively, without a compromise on power consumption. The second LNA, implemented in UMC (United Microelectronics Corporation) 0.13Cm CMOS process, features a practical linearization technique for high-frequency wideband applications using an active nonlinear resistor, which obtains a robust linearity improvement over process and temperature variations. The proposed linearization method is experimentally demonstrated to improve the IIP3 by 3.5 to 9 dB over a 2.5–10 GHz frequency range. A comparison of measurement results with the prior published state-of-art Ultra-Wideband (UWB) LNAs shows that the proposed linearized UWB LNA achieves excellent linearity with much less power than previously published works. The second part of this dissertation developed a reconfigurable ADC for multistandard receiver and video processors. Typical ADCs are power optimized for only one operating speed, while a reconfigurable ADC can scale its power at different speeds, enabling minimal power consumption over a broad range of sampling rates. A novel ADC architecture is proposed for programming the sampling rate with constant biasing current and single clock. The ADC was designed and fabricated using UMC 90nm CMOS process and featured good power scalability and simplified system design. The programmable speed range covers all the video formats and most of the wireless communication standards, while achieving comparable Figure-of-Merit with customized ADCs at each performance node. Since bias current is kept constant, the reconfigurable ADC is more robust and reliable than the previous published works.