The electrical efficiency of telecommunication power supplies is increasing to meet customer demands for lower total cost of ownership. Increased capital cost can now be justified if it enables sufficiently large energy savings, allowing the use of topologies and devices previously considered unnecessarily complex or expensive. Silicon carbide Schottky diodes have already been incorporated into commercial power supplies as expensive, but energy saving components. This thesis pursues the next step of considering silicon carbide transistors for use in telecommunications power converters. A range of silicon carbide transistors was considered with a primary focus on recently developed, normally-off, junction field effect transistors. Tests were devised and performed to uncover a number of previously unpublished characteristics of normally-off silicon carbide JFETs. Specifically, unique reverse conduction and associated gate current draw relationships were measured as well as the ability to block small reverse voltages when a negative gate-source voltage is applied. Reverse recovery-like characteristics were also measured and found to be superior to those of silicon MOSFETs. These characteristics significantly impact the steps that are required to maximize efficiency with normally-off SiC JFETs in circuits where synchronous rectification or bidirectional blocking is performed. A gate drive circuit was proposed that combines a number of recommendations to achieve rapid and efficient switching of normally-off SiC JFETs. Specifically, a low transient output impedance was provided to achieve rapid turn-on and turn-off transitions as well as a high dc output impedance to limit the steady state drive current while sustaining the turned-on state. A prototype circuit was constructed using building blocks that are typically found in single chip MOSFET drivers. The circuit was shown to operate well from a single supply, alleviating the need for a split supply such as that required by many published JFET drive circuits. This demonstrated a proof of concept for a single chip JFET driver solution. An active power factor correction circuit topology was extensively modelled and a prototype designed and tested to verify the model. The circuit was able to operate at switching frequencies in excess of 100kHz when using SiC JFETs, whereas silicon MOSFETs could only achieve switching frequencies of several kHz before switching losses became excessive. The circuit was designed as the dc equivalent for a 2kW, 230V AC input power converter with a split +/-400V dc output. A commercial single phase telecommunications power converter was modified to utilise normally-off SiC JFETs in its power factor correction circuit. The converter was tested and found to achieve similar electrical efficiency with 1200V SiC JFETs to that achieved with 600V silicon MOSFETs. The performance of the 1200V SiC JFETs in this application was also compared to that of 900V silicon MOSFETs and found to be superior. Finally, a prototype three-phase cyclo-converter was modified to use 1200V normallyoff SiC JFETs in place of 600V silicon MOSFETs and found to achieve similar electrical efficiency to the silicon MOSFETs in a 208V three phase system. These results strongly indicate that the 1200V SiC JFETs would provide better performance than 900V silicon MOSFETs in a 400V three phase system (that had been considered for commercial development).

Ce document présente les travaux de thèse ayant pour objet la recherche et développement d’une technologie co-intégrée HEMT GaN normale-on/normally-off compatible avec les matériaux et procédés technologiques de la technologie normally-on hyperfréquence. Un exposé théorique et une revue de l’état de l’art permettent d’abord d’entrevoir les différentes solutions technologiques qui s’offrent à nous, tout en affirmant et en précisant les applications visées. Différentes briques technologiques sont ensuite développées pour la fabrication de MOS-HEMTs GaN à recess de grille sur des épi-structures à barrière AlGaN ou (Ga)InAlN dédiées aux applications hyperfréquences. Nous insistons sur la possibilité d’intégrer les 2 fonctionnalités normally-off et normally-on de manière monolithique. Les échantillons ainsi réalisés sont ensuite caractérisés électriquement de manière conventionnelle, mais aussi en utilisant des techniques avancées de spectroscopie de pièges comme les paramètres S à basse fréquence et la mesure du transitoire de RON. Bien que certains phénomènes de piègeage dans l’oxyde de grille soient mis en évidence, les résultats sont très satisfaisants : des composants normally-off sont obtenus pour les 2 structures, et les performances sont au niveau de l’état de l’art mondial, avec plusieurs pistes d’amélioration en perspective. / This document reports on research and development efforts towards a normally-on/normally-off integrated GaN HEMT technology that remains compatible with the material and processing dedicated to normally-on microwave devices. Following several theoretical considerations, the state-of-the-art is presented, which gives a perspective on the available technological solutions and helps define the specifications and the targeted applications. The development and optimization of new process steps enables the fabrication of gate-recessed MOS-HEMTs on epi-structures with AlGaN or (Ga)InAlN barrier, monolithically integrable with normally-on transistors. The samples are electrically characterized by means of standard measurements and more advanced trap spectroscopy techniques such as low-frequency S-parameters or RON transient monitoring. In spite of oxide-related trapping phenomena, the results are very promising: normally-off devices are obtained for both structures, and the performances are in line with literature accounts while identified possible improvements can be explored.

No description available.

Yes / We describe a method for deriving the linear cortical magnification factor from positional error across the visual field. We compared magnification obtained from this method between normally sighted individuals and amblyopic individuals, who receive atypical visual input during development. The cortical magnification factor was derived for each subject from positional error at 32 locations in the visual field, using an established model of conformal mapping between retinal and cortical coordinates. Magnification of the normally sighted group matched estimates from previous physiological and neuroimaging studies in humans, confirming the validity of the approach. The estimate of magnification for the amblyopic group was significantly lower than the normal group: by 4.4 mm deg 1 at 18 eccentricity, assuming a constant scaling factor for both groups. These estimates, if correct, suggest a role for early visual experience in establishing retinotopic mapping in cortex. We discuss the implications of altered cortical magnification for cortical size, and consider other neural changes that may account for the amblyopic results.

In this thesis, various issues regarding normally-ON silicon carbide (SiC)Junction Field-Effect Transistors (JFETs) are treated. Silicon carbide powersemiconductor devices are able to operate at higher switching frequencies,higher efficiencies, and higher temperatures compared to silicon counterparts.From a system perspective, these three advantages of silicon carbide can determinethe three possible design directions: high efficiency, high switchingfrequency, and high temperature.The structure designs of the commercially-available SiC power transistorsalong with a variety of macroscopic characteristics are presented. Apart fromthe common design and performance problems, each of these devices suffersfrom different issues and challenges which must be dealt with in order to pavethe way for mass production. Moreover, the expected characteristics of thefuture silicon carbide devices are briefly discussed. The presented investigationreveals that, from the system point-of-view, the normally-ON JFET isone of the most challenging silicon carbide devices. There are basically twoJFET designs which were proposed during the last years and they are bothconsidered.The state-of-the-art gate driver for normally-ON SiC JFETs, which wasproposed a few years ago is briefly described. Using this gate driver, theswitching performance of both Junction Field-Effect Transistor designs wasexperimentally investigated.Considering the current development state of the available normally-ONSiC JFETs, the only way to reach higher current rating is to parallel-connecteither single-chip discrete devices or to build multichip modules. Four deviceparameters as well as the stray inductances of the circuit layout might affectthe feasibility of parallel connection. The static and dynamic performance ofvarious combinations of parallel-connected normally-ON JFETs were experimentallyinvestigated using two different gate-driver configurations.A self-powered gate driver for normally-ON SiC JFETs, which is basicallya circuit solution to the “normally-ON problem” is also shown. This gatedriver is both able to turn OFF the shoot-through current during the startupprocess, while it also supplies the steady-state power to the gate-drivecircuit. From experiments, it has been shown that in a half-bridge converterconsisting of normally-ON SiC JFETs, the shoot-through current is turnedOFF within approximately 20 μs.Last but not least, the potential benefits of employing normally-ON SiCJFETs in future power electronics applications is also presented. In particular,it has been shown that using normally-ON JFETs efficiencies equal 99.8% and99.6% might be achieved for a 350 MW modular multilevel converter and a40 kVA three-phase two-level voltage source converter, respectively.Conclusions and suggestions for future work are given in the last chapterof this thesis. / I denna avhandling behandlas olika aspekter av normally–ON junction–field–effect–transistorer (JFETar) baserade på kiselkarbid (SiC). Effekthalvledarkomponenteri SiC kan arbeta vid högre switchfrekvens, högre verkningsgradoch högre temperatur än motsvarigheterna i kisel. Ur ett systemperspektivkan de tre nämnda fördelarna användas i omvandlarkonstruktionen för attuppnå antingen hög verkningsgrad, hög switchfrekvens eller hög temperaturtålighet.Såväl halvledarstrukturen som de makroskopiska egenskaperna för kommersiellttillgängliga SiC–transistorer presenteras. Bortsett från de vanligakonstruktions–och prestandaproblemen lider de olika komponenterna av ettantal tillkortakommanden som måste övervinnas för att bana väg för massproduktion.Även framtida SiC–komponenter diskuteras.Ur ett systemperspektiv är normally-ON JFETen en av de mest utmanandeSiC-komponenterna. De två varianter av denna komponent som varittillgängliga de senaste åren har båda avhandlats.State–of–the–art–drivdonet för normally-ON JFETar som presenteradesför några år sedan beskrivs i korthet. Med detta drivdon undersöks switchegenskapernaför båda JFET-typerna experimentellt.Vid beaktande av det aktuella utvecklingsstadiet av de tillgängliga normally–ON JFETarna i SiC, är det möjligt att uppnå höga märkströmmar endastom ett antal single–chip–komponenter parallellkopplas eller om multichipmodulerbyggs. Fyra komponentparametrar samt strö-induktanser för kretsenkan förutses påverka parallellkopplingen. De statiska och dynamiska egenskapernaför olika kombinationer av parallellkopplade normally-ON JFETarundersöks experimentellt med två olika gate–drivdonskonfigurationer.Ett självdrivande gate-drivdon för normally-ON JFETar presenteras också.Drivdonet är en kretslösning till “normally–ON–problemet”. Detta gatedrivdonkan både stänga av kortslutningsströmmen vid uppstart och tillhandahållaströmförsörjning vid normal drift. Med hjälp av en halvbrygga medkiselkarbidbaserade normally–ON JFETar har det visats att kortslutningsströmmenkan stängas av inom cirka 20 μs.Sist, men inte minst, presenteras de potentiella fördelarna med användningenav SiC-baserade normally-ON JFETar i framtida effektelektroniskatillämpningar. Speciellt visas att verkningsgrader av 99.8% respektive 99.5%kan uppnås i fallet av en 350 MW modular multilevel converter och i en40 kVA tvånivåväxelriktare. Sista kaplitet beskriver slutsatser och föreslagetframtida arbete. / <p>QC 20130527</p>

Power consumption is one of the most important design factors in modern electronic design. With a large market increase in portable battery-operated devices and push for environmental focus, it is of interest for the industry to decrease the power consumption of modern chips as much as possible. However, as circuits scale down in size the leakage current increases. This increases the static power consumption, and in future technologies the static power is expected to make up most of the overall power consumption. Power gating can decrease static power by isolating a circuit block from the power supply. In large chips, this requires state-retention flip flops and non-volatile memories in order to keep the circuit functioning continuously between power gating sequences. A design concept utilizing this is a Normally Off computer, which is in an off-state with no static power for the majority of the time. This is achieved by using non-volatile logic and memories. This concept has been realized by using a new semiconductor technology developed at Semiconductor Energy Laboratories Corporation Ltd., which is known as crystalline In-Ga-Zn oxide semiconductor material. This technology realizes transistors with an ultra-low off-state current, and enables several novel designs of state-retention circuits suitable for Normally-Off computers. This thesis presents two different architectures of state retention flip flops utilizing In-Ga-Zn oxide semiconductor transistors, which are produced and compared to determine their tradeoffs and effectiveness. These flip flops are then implemented in a 32-bit Normally-Off microprocessor to determine the performance of each implementation. This is evaluated by calculating the energy break-even time, which is the power gating time required to overcome the power overhead introduced by the state-retention flip flops. The resulting circuits and the work in this thesis has been presented at two conferences and submitted for publication in one scientific journal.

The effects of repeated loading on a normally consolidated,saturated silty clay, are compared to the effects of sustained loading and standard strength tests on the same material. Attention is given to axial strains and pore water pressures generated under the different loading conditions. / Thesis / Master of Engineering (ME)

Actuellement, il y a une baisse du prix des ressources énergétiques distribuées, en particulier l'énergie solaire photovoltaïque, conduisant à la croissance significative de leur capacité d'installation dans de nombreux pays. D'autre part, les politiques encourageant l'efficacité énergétique ont favorisé le développement de charges DC dans les zones domestiques, telles que l'éclairage LED, les ordinateurs,, les téléphones, les téléviseurs, les moteurs DC efficaces et les véhicules électriques. Grace à ce changement, le système de distribution de microgrid DC devient plus attractive que le système de distribution à courant alternatif traditionnel. Les avantages principaux du microgrid DC sont l'efficacité énergétique plus élevée, plus facile à intégrer avec les sources d'énergie distribuées et le système de stockage. Alors que de nombreuses recherches se concentrent sur les stratégies de contrôle et la gestion de l'énergie dans le microgrid DC, sa protection reçoit une attention insuffisante et un manque de réglementation et d'expériences. La protection dans les réseaux DC est plus difficile que dans le réseau AC en raison de l'arc continu, de la valeur plus élevée du courant de courtcircuit et du taux de défaut de montée. En outre, dans les réseaux distribués à courant continu sont composés de nombreux dispositifs de commutation électroniques et semi-conducteurs, qui ne supportent le courant de défaut que quelques dizaines de microsecondes. Les disjoncteurs mécaniques, qui ont un temps de réponse de quelques dizaines de millisecondes, ne semblent pas satisfaire aux exigences de sécurité du microréseau à courant continu. L'absence d'un dispositif de protection efficace constitue un obstacle au développement du microgrid DC dans le système distribué. Cette thèse propose un disjoncteur DC auto-alimenté à courant continu utilisant normalement JFET SiC, qui offre un excellent dispositif de protection pour les microgrids DC grâce à son temps de réponse rapide et ses faibles pertes à l'état passant. La conception du disjoncteur DC à semi-conducteurs vise à répondre à deux objectifs: temps de réponse rapide et fiabilité. Les spécifications conçues et les énergies critiques qui entraînent la destruction du disjoncteur sont identifiées sur la base des résultats mesurés d'un JFET populaire dans le commerce. Un pilote de protection très rapide et fiable basé sur une topologie à convertisseur flyback avant est utilisé pour générer une tension négative suffisante pour tourner et maintenir le JFET SiC. Le convertisseur sera activé chaque fois que le disjoncteur détecte des défauts de court-circuit en détectant la tension de drain-source de JFET et crée une tension négative s'applique à la porte de JFET. Pour éviter une défaillance de la porte par surtension au niveau de la grille du JFET, la tension de sortie du convertisseur de retour vers l'avant est régulée à l'aide de la mesure coté primaire. Les résultats expérimentaux sur le prototype du disjoncteur DC ont validé les principes de fonctionnement proposés et ont confirmé que le disjoncteur DC à semi-conducteurs proposé peut interrompre le défaut en 3 μs. D'un autre côté, un modèle du JFET normalement activé dans l'environnement Matlab/Simulink est construit pour étudier les comportements du SSCB pendant une durée de court-circuit. L'accord entre la simulation et les résultats expérimentaux confirment que ce modèle JFET peut être utilisé pour simuler le fonctionnement d'un disjoncteur DC et dans l'étude du fonctionnement du microgrid DC pendant le processus de défaut et de compensation / Currently, there is a drop in the price of distributed energy resources, especially solar PVs, which leads to a significant growth of the installed capacities in many countries. On the other hand, policies encouraging energy efficiency have promoted the development of DC loads in domestic areas, such as LEDs lighting, computers, telephones, televisions, efficient DC motors and electric vehicles. Corresponding to these changes in sources and loads, DC microgrid distribution system becomes more attractive than the traditional AC distribution system. The main advantages of the DC microgrid are higher energy efficiency, easier in integrating with distributed energy sources and storage systems. While many studies concentrate on the control strategies and energy management in the DC microgrid, the protection still receives inadequate attention and lack of regulations and experiences. Protection in DC grids is more complex than AC grids due to the continuous arc, higher short circuit current value and fault rate of rising. Furthermore, the DC distributed grids are composed of many electronic and semiconductor switching devices, which only sustain the fault currents of some tens of microseconds. Mechanical circuit breakers, which have a response time in tens of milliseconds, seem not to meet the safety requirement of DC microgrids. The lack of effective protection devices is a barrier to the development of DC microgrids in the distributed systems. This thesis proposes a self-power solid state DC circuit breaker using normally-on SiC JFET, which offers a great protection device for DC microgrids due to its fast response time and low on-state losses. The design of the solid state DC circuit breaker aims to meet two objectives: fast response time and high reliability. The designed specifications and critical energies that result in the destruction of the circuit breaker are identified on the basis of the experiments of a commercial normally-on JFET. In addition, a very fast and reliable protection driver based on a forward-flyback converter topology is employed to generate a sufficient negative voltage to turn and hold off the SiC JFET. The converter will be activated whenever short-circuit faults are detected by sensing the drain-source voltage, then creating a negative voltage applied to the gate of JFET. To avoid gate failure by overvoltage at the gate of JFET, the output voltage of the forward-flyback converter is regulated using Primary Side Sensing technique. Experimental results validated the working principle of the proposed solid state DC circuit breaker with fault clearing time less than 3 μs. Additionally, a model of the normally-on JFET in Matlab/Simulink environment is built for exploring the behaviors of the solid-state DC circuit breaker during short-circuit faults. The agreement between the simulation and experimental results confirms that this JFET model can be appropriately used for the investigation of solid state DC circuit breaker operations and DC microgrids in general during fault evens and clearing fault processes

Depuis le début des années 2000, les composants en carbure de silicium (SiC) sont présents sur le marché principalement sous la forme de diodes Schottky et de transistors FET. Ces nouveaux semi-conducteurs offrent des performances en commutation bien supérieures à celles des composants en silicium (Si) ce qui se traduit par une diminution des pertes et une réduction de la température de fonctionnement à système de refroidissement identique. L’utilisation de composants SiC ouvre donc la possibilité de concevoir des convertisseurs plus compacts ou à une fréquence de commutation élevée pour une même compacité. C’est avec cet objectif d’augmentation de la fréquence de commutation qu’a été menée cette étude axée sur l’utilisation de composants SiC au sein d’un onduleur triphasé. Le convertisseur sur lequel se base l’étude accepte une tension d’entrée de 450V et fournit en régime nominal un courant de sortie efficace par phase de 40 A. Le choix des composants SiC s’est porté sur des transistors JFET Normally-Off et des diodes Schottky SiC car ces composants étaient disponibles à la vente au début de ces travaux et offrent des pertes en commutation et en conduction inférieures aux autres structures en SiC. Les transistors FET possèdent une structure et des propriétés bien différentes des IGBT habituellement utilisés pour des convertisseurs de la gamme considérée notamment par leur capacité à conduire un courant inverse avec ou sans diode externe. De ce fait, il est nécessaire de développer de nouveaux outils d’aide au dimensionnement dédiés à ces composants SiC. Ces outils de calculs sont basés principalement sur les paramètres électriques et thermiques du système et sur les caractéristiques des composants SiC. Les premiers résultats montrent qu’en autorisant la conduction d’un courant inverse au sein des transistors, il est possible de diminuer le nombre de composants. Basées sur ces estimations, une maquette de bras d’onduleur a été développée et testée. Les premiers thermiques montrent que pour une puissance de 12kW, il est possible d’augmenter la fréquence de commutation de 12 kHz à 100 kHz. / Since 2000, Silicon Carbide (SiC) components are available on the market mainly as Schottky diodes and FET transistor. These new devices provide better switching performance than Silicon (Si) components that leads to a reduction of losses and operating temperatures at equivalent cooling system. Using SiC components allows to a better converter integration. It is in this context that ECA-EN has started this thesis dedicated to using SiC devices in a three-phase inverter at high switching frequency. The converter object of this study is supply by a input voltage of 450V and provides a current of 40A per phase. The components used for these study are SiC Normally-Off JFET and Schottky Diodes because these devices were commercialized at the begining of this thesis and offer better switching performance than others SiC components. FET transistors have a different structure compared to traditionnal IGBT especially their capability to conduct a reverse current with or without body diode. So it is necessary to develop new tools dedicated to the design of converters built with SiC components. These tools are based on the electrical properties of the converters and the statics and dynamics characteristics of the transistor and the diode. The results show that when the transistors conduct a reverse current, the number of components/dies can be reduced. According to data, a PCB board of an inverter leg has been built and tested at ECA-EN. The thermal measurement based on the heatsink shows that the switching frequency of an inverter leg can be increased from 12 to 100 kHz for an ouput power of 12kW.

La thèse porte sur le développement de composants à base d’hétérojonction AlGaN/GaN. Cette hétérojonction permet de bénéficier d’une excellente mobilité (2000 cm²/V.s) grâce à l’apparition d’un gaz d’électron dans le GaN. Cependant, les composants fabriqués sur cette hétérojonction sont normally-on. Pour des raisons de sécurité et d’habitude de conception des composants normally-off sont nécessaires. Il existe de nombreuses façons de fabriquer des transistors normally-off à base d’hétérojonction AlGaN/GaN, dans cette thèse nous avons choisi d’étudier un MOSCHEMT, cette structure est caractérisée par une grille de type MOS et des accès de type HEMT possédant les excellentes propriétés de l’hétérojonction, en fonction des paramètres technologiques : épitaxie, process et structure des composants. L’une des variations technologiques étudiées est une structure cascodée permettant d’améliorer les performances à l’état passant sans détériorer la caractéristique en blocage des composants. L’objectif est de concevoir un composant normally-off sur substrat silicium 200 mm avec une tension de seuil supérieure à 1V, pouvant tenir 600 V en blocage, avec un calibre en courant entre 10 A et 30 A et compatible en salle blanche CMOS. Le manuscrit comporte quatre chapitres. Grâce à une étude bibliographique, le premier chapitre présente les différentes méthodes permettant d’obtenir un transistor normally-off à base de nitrure de gallium. Ce chapitre présente et justifie le choix technologique du CEA-LETI. Le deuxième chapitre présente les modèles ainsi que les méthodes de caractérisations utilisés au cours de la thèse. Le troisième chapitre traite des résultats obtenus en faisant varier les paramètres de fabrication sur les MOSC-HEMT. Enfin, le quatrième chapitre montre une étude sur une technologie innovante de type cascode. Cette structure doit permettre d’augmenter la tension de claquage des transistors sans détériorer l’état passant. / This thesis focuses on the development of AlGaN/GaN heterojunction components or HEMT. This heterojunction has an excellent mobility (2000 cm² / V.s) thanks to the appearance of an electron gas in the GaN. However, the components made with this heterojunction are normally-on. For safety reasons particularly, normally-off components are required. There are many ways to make normally-off transistors based on AlGaN/GaN heterojunction. In this thesis we chose to study a MOSCHEMT strucutre. This structure is characterized by a MOS type gate and HEMT type accesses. The study shows the effects of technological parameters (epitaxy, process and component structure) on the electrical behaviour of the components. Another structure studied is the monolithic cascode, which can improve on-state performance of the MOSC-HEMT without damaging the characteristic in reverse of the components. The objective of this thesis is to design a normally-off component on silicon substrate 200 mm with a threshold voltage higher than 1V, able to hold 600 V in reverse, with a current rating between 10 A and 30 A and compatible in CMOS clean room. The manuscript has four chapters. Through a bibliographic review, the first chapter presents the different methods to obtain a normally-off transistor based on gallium nitride. This chapter presents and justifies the technological choice of CEA-LETI. The second chapter presents the models as well as the methods of characterizations used during the thesis. The third chapter deals with the results obtained by varying the manufacturing parameters on the MOSC-HEMTs. Finally, the fourth chapter shows a study on innovative cascode technology. This structure must make it possible to increase the breakdown voltage of the transistors without damaging the on state.