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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
391

Design and analysis of key components for manufacturable and low-power CMOS millimeter-wave receiver front end

Hsin, Shih-Chieh 02 November 2012 (has links)
The objective of this dissertation is to develop key components of a CMOS heterodyne millimeter-wave receiver front end. Robust designs are necessary to overcome PVT variations as well as modeling inaccuracies, while with minimum power consumption overhead to facilitate low-power radio for portable applications. Heterodyne receiver topology is adopted because of its robust performances at millimeter-wave frequencies. Device models for both passive and active devices are developed and used in the circuit designs in this dissertation. Two low-noise amplifiers (LNAs) are developed in this dissertation. The first LNA features a proposed temperature-compensation biasing technique, which confines the gain variation within 5 dB for temperature variation from -5 to 85 Celsius degree. The measured gain and NF are 21 and 6.5 dB, respectively, for 49-mW power dissipation. The second LNA reveals a design technique to tolerate a low-accuracy model at millimeter-wave frequencies. Both LNAs provide full coverage of the FCC 60-GHz band (57-64 GHz). For the frequency generation circuits, both the IF QVCO and mm-wave VCO are investigated. The inherent bimodal oscillation of QVCOs is analyzed and, for the first time, a systematic measurement technique is proposed to intentionally control the oscillation mode. This technique is further utilized to extend the tuning range of the QVCO, which possesses dual tuning curves without penalty on phase noise. The measurement results of a 13-GHz QVCO in 90-nm CMOS reveals a 21.4% tuning range for continuously tuning from 11.7 to 14.5 GHz. The measured phase noise is -108 dBc/Hz at 1 MHz offset with a core power consumption of 10.8 mW. A millimeter-wave VCO is designed and fabricated in 65-nm CMOS. The VCO is fully characterized under voltage stress to examine the hot-carrier injection effects affecting the performance of a millimeter-wave VCO. The 41.6-47.4 GHz VCO is further integrated into a millimeter-wave down converter. The power-hungry buffer amplifiers are neglected by proper floor planning. Conversion loss of 1.4 dB is obtained with total power consumption of 72.5 mW. Lastly, a power management system consisting of low-dropout (LDO) regulators is designed and integrated in a 90-nm CMOS millimeter-wave transceiver to provide stable and low-noise supply voltages. Voltage variation issues are alleviated by the LDOs.
392

Design of a Direct-conversion Radio Receiver Front-end in CMOS Technology

Erixon, Mats January 2002 (has links)
In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology. Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end. The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated. The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.
393

Design of Comprehensible Learning Machine Systems for Protein Structure Prediction

Hu, Hae-Jin 06 August 2007 (has links)
With the efforts to understand the protein structure, many computational approaches have been made recently. Among them, the Support Vector Machine (SVM) methods have been recently applied and showed successful performance compared with other machine learning schemes. However, despite the high performance, the SVM approaches suffer from the problem of understandability since it is a black-box model; the predictions made by SVM cannot be interpreted as biologically meaningful way. To overcome this limitation, a new association rule based classifier PCPAR was devised based on the existing classifier, CPAR to handle the sequential data. The performance of the PCPAR was improved more by designing the following two hybrid schemes. The PCPAR/SVM method is a parallel combination of the PCPAR and the SVM and the PCPAR_SVM method is a sequential combination of the PCPAR and the SVM. To understand the SVM prediction, the SVM_PCPAR scheme was developed. The experimental result presents that the PCPAR scheme shows better performance with respect to the accuracy and the number of generated patterns than CPAR method. The PCPAR/SVM scheme presents better performance than the PCPAR, PCPAR_SVM or the SVM_PCPAR and almost equal performance to the SVM. The generated patterns are easily understandable and biologically meaningful. The system sturdiness evaluation and the ROC curve analysis proved that this new scheme is robust and competent.
394

Integrated Antennas and Active Beamformers Technology for mm-Wave Phased-Array Systems

Biglarbegian, Behzad 26 March 2012 (has links)
In this thesis, based on the indoor channel measurements and ray-tracing modeling for the indoor mm-wave wireless communications, the challenges of the design of the radio in this band is studied. Considering the recently developed standards such as IEEE 802.15.3c, ECMA and WiGig at 60 GHz, the link budget of the system design for different classes of operation is done and the requirement for the antenna and other RF sections are extracted. Based on radiation characteristics of mm-wave and the fundamental limits of low-cost Silicon technology, it is shown that phased-array is the ultimate solution for the radio and physical layer of the mobile millimeter wave multi-Gb/s wireless networks. Different phased-array configurations are studied and a low-cost single-receiver array architecture with RF phase-shifting is proposed. A systematic approach to the analysis of the overall noise-figure of the proposed architecture is presented and the component technical requirements are derived for the system level specifications. The proposed on-chip antennas and antenna-in-packages for various applications are designed and verified by the measurement results. The design of patch antennas on the low-cost RT/Duroid substrate and the slot antennas on the IPD technologies as well as the compact on-chip slot DRA antenna are explained in the antenna design section. The design of reflective-type phase shifters in CMOS and MEMS technologies is explained. Finally, the design details of two developed 60 GHz integrated phased-arrays in CMOS technology are discussed. Front-end circuit blocks such as LNA, continuous passive reflective-type phase shifters, power combiner and variable gain amplifiers are investigated, designed and developed for a 60 GHz phased-array radio in CMOS technology. In the first design, the two-element CMOS phased-array front-ends based on passive phase shifting architecture is proposed and developed. In the second phased-array, the recently developed on-chip dielectric resonator antenna in our group in lower frequency is scaled and integrated with the front-end.
395

Síntesis de frecuencias en microondas mediante sistemas PLL: aplicación a la recepción de señales emitidas por satélite hasta 30 GHz

Berenguer Sau, Jordi 23 September 1988 (has links)
La tesi estudia el problema de la síntesi de freqüències en les bandes de freqüències de microones i ones mil·limètriques, i la seva aplicació al disseny dels oscil·ladors locals d'un receptor coherent per a la recepció de les *radiobalises que a 12, 20 i 30 GHz emetia el satèl·lit Olympus de l'Agència Espacial Europea (ESA), amb la finalitat de caracteritzar el comportament radioelèctric de l'atmosfera a aquestes freqüències, a partir de mesures d'atenuació i transpolarització sobre aquests senyals de test, tot això dintre del marc d'un experiment de propagació (OPEX) propiciat per l'agència.La tesi s'ha centrat en l'estudi dels sistemes de síntesis de freqüències utilitzats habitualment, i especialment en els de síntesi indirecta de freqüència basats en sistemes Phase Locked Loop (PLL) a freqüències de microones ja que són la base sobre la qual s'han dissenyat i construït els prototips de multiplicadors de freqüència que s'han desenvolupat, capaços de sintetitzar senyals en bandes de mil·limètriques, que en el nostre cas s'han restringit al marge de 1 a 29 GHz.Alguns dels multiplicadors fan ús de la detecció de fase harmònica, sistema que permet realitzar multiplicacions de freqüència d'índex imparell, evitant la utilització de divisors de freqüència en el llaç de realimentació del PLL.La tesi s'estructura en quatre parts diferenciades. La primera, amb un caire eminentment teòric, s'ofereix a manera de revisió dels aspectes del soroll de fase i dels sistemes de síntesis de freqüències existents. La segona part aborda les qüestions derivades de la síntesi de freqüències en microones mitjançant PLL's, amb descripció dels components utilitzats, per a passar a tractar dels aspectes de disseny d'un receptor coherent, els seus requisits i aplicacions. En la tercera part es presenten els multiplicadors de freqüència realitzats, la seva descripció, esquema de blocs i resultats experimentals obtinguts. I finalment, en la quarta part s'inclouen una sèrie de realitzacions derivades de la utilització de sistemes PLL a freqüències de microones, amb sincronització per injecció del VCO al senyal de referència, en aplicacions de combinació de potència i de control electrònic de fase en sistemes phased-arrays amb elements actius. / La tesis estudia el problema de la síntesis de frecuencias en las bandas de frecuencias de microondas y ondas milimétricas, y su aplicación al diseño de los osciladores locales de un receptor coherente para la recepción de las radiobalizas que a 12, 20 y 30 GHz emitía el satélite Olympus de la Agencia Espacial Europea (ESA), con la finalidad de caracterizar el comportamiento radioeléctrico de la atmósfera a estas frecuencias, a partir de medidas de atenuación y transpolarización sobre esas señales de test, todo ello dentro del marco de un experimento de propagación (OPEX) propiciado por la agencia.La tesis se ha centrado en el estudio de los sistemas de síntesis de frecuencias utilizados habitualmente, y en especial en los de síntesis indirecta de frecuencia basados en sistemas Phase Locked Loop (PLL) a frecuencias de microondas puesto que son la base sobre la que se sustentan los prototipos de multiplicadores de frecuencia que se han desarrollado, capaces de sintetizar señales en bandas milimétricas, que en nuestro caso se han restringido al margen de 1 a 29 GHz.Algunos de los multiplicadores hacen uso de la detección de fase armónica, sistema que permite realizar multiplicaciones de frecuencia de índice impar, evitando el empleo de divisores de frecuencia en el lazo de realimentación del PLL.La tesis se estructura en cuatro partes diferenciadas. La primera, con un cariz eminentemente teórico, se ofrece a modo de revisión del tema del ruido de fase y de los sistemas de síntesis de frecuencias existentes. La segunda parte aborda las cuestiones derivadas de la síntesis de frecuencias en microondas mediante PLL's, con descripción de los componentes utilizados, para pasar a tratar de los aspectos de diseño de un receptor coherente, sus requisitos y aplicaciones. En la tercera parte se presentan los multiplicadores de frecuencia realizados, su descripción, esquema de bloques y resultados experimentales obtenidos. Y por último, en la cuarta parte se incluyen una serie de realizaciones derivadas de la utilización de sistemas PLL a frecuencias de microondas, con sincronización por inyección del VCO a la señal de referencia, en aplicaciones de combinación de potencia y de control electrónico de fase en sistemas phased-arrays con elementos activos. / The thesis studies the problem of the synthesis of frequencies in the microwave and millimeter waves frequency bands, and its application to the design of the local oscillators of a coherent receiver for the reception of the radio beacons that to 12, 20 and 30 GHz emitted the satellite Olympus from the European Space Agency (ESA), with the aim of characterizing the radio behavior of the atmosphere at these frequencies, from measurements of attenuation and transpolarisation on those signals of test, all that in the framework of a propagation experiment (OPEX) favored by the agency.The thesis has been focused on the study of the frequency synthesis systems, and especially on the indirect frequency synthesis systems based on Phase Locked Loops (PLL) at microwave frequencies, since they are the base on which the prototypes of frequency multipliers that they have been developed, capable of synthesizing signals in millimeter bands, are held that in our case they have restricted regardless of 1 to 29 GHz.Some of the multipliers make use of the harmonic phase detection system that allows carrying out frequency multiplications of odd index, preventing the use of frequency dividers in the feedback loop of the PLL.The thesis is structured in four differentiated parts. The first, with an eminently theoretical look, offers like revision of the subject of the phase noise and the methods of frequency synthesis. The second part tackles the questions derived from the synthesis of frequencies in microwaves through PLL's, with description of the used components, to pass to deal of the aspects of design of a coherent receiver, its requirements and applications. In the third part the frequency multipliers carried out, its description, schema of blocks and obtained experimental results are presented. And finally, in the fourth part a series of accomplishments are included phased-arrays derived of the use of systems PLL at frequencies of microwaves, with synchronization by injection of the VCO to the reference signal, in applications of power combination and of electronic phase control in systems with active elements.
396

Entwurf eines Empfängers für die drahtlose Datenübertragung bei 60 GHz

Schumann, Stefan 09 July 2013 (has links) (PDF)
Die vorliegende Arbeit befasst sich mit dem Entwurf eines monolithisch integrierten 60-GHz-Empfängerschaltkreises in einer modernen Silizium-Germanium-Halbleitertechnologie mit 190 GHz maximaler Transitfrequenz. Drei für die Entwicklung von MMIC-Empfängerschaltkreisen äußerst wichtige Prinzipien liegen dem Entwurf zugrunde: die Optimierung von Rauschverhalten und Bandbreite sowie die Betrachtung der maximal erreichbaren Ausgangsleistung. Diese Prinzipien werden detailliert untersucht und typische Schaltungen dahingehend analysiert. Insbesondere wird eine Methode vorgestellt, die es erlaubt, die maximale Ausgangsleistung für die häufig verwendete Kaskodestufe vorherzusagen. Dabei handelt es sich um eine Erweiterung der Methode der Lastkurve nach Cripps. Weiterhin werden Ansätze zur Modellierung von Leitungen vorgestellt und ihre Verwendbarkeit für die unterschiedlichen Simulationsarten diskutiert. Der Hauptteil der Arbeit behandelt den Entwurf des Empfängerschaltkreises, welcher aus einem breitbandigen Eingangsverstärker mit niedrigem Rauschen und einstellbarer Verstärkung, einem Leistungsteiler, einem direkten Quadratur-Abwärtsmischer, einem Basisbandverstärker, einem Treiberverstärker für das Lokaloszillatorsignal sowie einem 90°-Phasenschieber besteht. Zusätzlich sind verschiedene Referenzstrom- und -spannungsquellen im Schaltkreis integriert. Die gefertigte Schaltung wurde messtechnisch vollständig charakterisiert, und alle Ergebnisse sind wiedergegeben. Der gemessene Mischgewinn beträgt bis zu 40 dB bei einer Bandbreite von mehr als 15 GHz. Die Zweiseitenbandrauschzahl liegt bei moderaten 7,5 dB. Die gemessene Phasen- und Amplitudenabweichung sind geringer als 5° und geringer als 0,15 dB. Die Gesamtschaltung nimmt 360 mW Leistung aus einer 2,2-V-Spannungsquelle auf. Insbesondere die Bandbreite des Empfängerschaltkreises stellt eine Verbesserung des aktuellen Standes der Technik dar. / The present work studies the development of a monolithic 60 GHz receiver IC in a modern 190 GHz-fT silicon-germanium semiconductor technology. The design is based on three fundamental principles, which are of great importance for MMIC receiver design: noise optimisation, bandwidth enhancement and output power considerations. Those principles are discussed in detail, and typical circuit examples are comprehensively analysed. Specifically, a method is presented that allows the prediction of output power for the frequently-used cascode stage. This method is an extension of Cripps’ load line theory. Furthermore, modelling approaches for transmission lines and their suitability for various types of simulations are discussed. The main part focuses on the design process of the receiver IC, which consists of a broadband low noise amplifier with variable gain, a power divider, a zero-IF quadrature mixer, a baseband amplifier, an LO driver amplifier and a 90°-phase shifter. Additionally, several reference current and voltage sources are implemented in the IC. The manufactured circuit is characterised in detail, and all measurement results are presented. Over a bandwidth of more than 15 GHz, the measured conversion gain is up to 40 dB with a moderate double sideband noise figure of 7.5 dB. An I/Q imbalance measurement reveals a phase accuracy of better than 5° and an amplitude error of less than 0.15 dB. The total power consumption is 360 mW from a 2.2 V-source. Particularly in terms of bandwidth, the circuit performance exceeds the current state of the art.
397

Blind Adaptive DS-CDMA Receivers with Sliding Window Constant Modulus GSC-RLS Algorithm Based on Min/Max Criterion for Time-Variant Channels

Chang, Shih-chi 26 July 2006 (has links)
The code division multiple access (CDMA) system implemented by the direct-sequence (DS) spread spectrum (SS) technique is one of the most promising multiplexing technologies for wireless communications services. The SS communication adopts a technique of using much wider bandwidth necessary to transmit the information over the channel. In the DS-CDMA system, due to the inherent structure interference, referred to as the multiple access interference (MAI), the system performance might degrade. Next, for DS-CDMA systems over frequency-selective fading channels, the effect of inter symbol interference (ISI) will exist, such that a multiuser RAKE receiver has to be employed to combat the ISI as well as MAI. Since, in practical wireless communication environment, there may have several communication systems operated in the same area at the same time. In this thesis, we consider the environment of DS-CDMA systems, where the asynchronous narrow band interference (NBI) due to other systems is joined suddenly to the CDMA system. In general, when a system works in a stable state with adaptive detectors, a suddenly joined NBI signal will cause the system performance to be crash down. Under such circumstance, the existing conventional adaptive RAKE detectors may not be able to track well for the rapidly sudden changing NBI associated with the problems of ISI and MAI. It is known that the adaptive filtering algorithms, based on the sliding window linear constrained recursive least squares (SW LC-RLS), is very attractive to a violent changing environment. The main concern of this thesis is to propose a novel sliding window constant modulus RLS (SW CM-RLS) algorithm, based on the Min/max criterion, to deal with the NBI for DS-CDMA system over multipath channels. For simplicity and having less system complexity the generalized side-lobe canceller (GSC) structure is employed, and is referred to as the SW CM-GSC-RLS algorithm. The aim of the SW CM-GSC-RLS algorithm is used to alleviate the effect of NBI. It has the advantages of having faster convergence property and tracking ability, and can be applied to the environment in which the NBI is suddenly joined to the system under the effect of channel mismatch to achieve desired performance. At the end of this thesis, we extend the idea of the proposed algorithm to the space-time DS-CDMA RAKE receiver, in which the adaptive beamformer with temporal domain DS-CDMA receiver is employed. Via computer simulation results, we show that our new proposed schemes outperform the conventional CM GSC-RLS algorithm as well as the GSC-RLS algorithm (the so-called LCMV approach), in terms of mean square error of estimating channel impulse response, output signal to interference plus noise ratio and bit-error-rate.
398

An Investigation Of Jamming Techniques Through A Radar Receiver Simulation

Kirkpantur-cadallli, Atiye Asli 01 December 2007 (has links) (PDF)
In this study, various jamming techniques and their effects on detection and tracking performance have been investigated through a radar receiver simulation that models a search radar for target acquisition and single-target tracking radar during track operation. The radar is modeled as looking at airborne targets, and hence clutter is not considered. Customized algorithms have been developed for the detection of target azimuth angle, range and Doppler velocity within the modeled geometry and chosen radar parameters. The effects of varying parameters like jamming-to-signal ratio (JSR) and jamming signal`s Doppler shift have been examined in the analysis of jamming effectiveness.
399

Bivariate Random Effects And Hierarchical Meta-analysis Of Summary Receiver Operating Characteristic Curve On Fine Needle Aspiration Cytology

Erte, Idil 01 September 2011 (has links) (PDF)
In this study, meta-analysis of diagnostic tests, Summary Receiver Operating Characteristic (SROC) curve, bivariate random effects and Hierarchical Summary Receiver Operating Characteristic (HSROC) curve theories have been discussed and accuracy in literature of Fine Needle Aspiration (FNA) biopsy that is used in the diagnosis of masses in breast cancer (malignant or benign) has been analyzed. FNA Cytological (FNAC) examination in breast tumor is, easy, effective, effortless, and does not require special training for clinicians. Because of the uncertainty related to FNAC&lsquo / s accurate usage in publications, 25 FNAC studies have been gathered in the meta-analysis. In the plotting of the summary ROC curve, the logit difference and sums of the true positive rates and the false positive rates included in the meta-analysis&lsquo / s codes have been generated by SAS. The formula of the bivariate random effects model and hierarchical summary ROC curve is presented in context with the literature. Then bivariate random effects implementation with the new SAS PROC GLIMMIX is generated. Moreover, HSROC implementation is generated by SAS PROC HSROC NLMIXED. Curves are plotted with RevMan Version 5 (2008). It has been stated that the meta-analytic results of bivariate random effects are nearly identical to the results from the HSROC approach. The results achieved through both random effects meta-analytic methods prove that FNA Cytology is a diagnostic test with a high level of distinguish over breast tumor.
400

Performance Evaluation of DS/CDMA Communications Systems Modulated with π/2-shift BPSK over Multipath Rayleigh Fading Channels

Galib, M.M.Asadullah, Yamazato, Takaya, Katayama, Masaaki, Ogawa, Akira 11 1900 (has links)
No description available.

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