Esta pesquisa engloba o estudo e desenvolvimento de novas heteroestruturas semicondutoras, tomando como base as estruturas SOI (Silicon-On-Insulator - silício sobre isolante) obtidas pela técnica Smart Cut, estudadas nestes últimos anos no Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). Esta técnica combina a solda direta para a união de lâminas e a implantação iônica (I/I) de íons leves para a separação de camadas especificadas. São essenciais na preparação destas estruturas SOI, processos de I/I, limpeza e ativação das superfícies das lâminas e recozimentos em fornos a temperaturas moderadas. Estudamos também, diferentes métodos para a obtenção de novas heteroestruturas, basicamente combinando as técnicas de fabricação da estrutura SOI e os métodos de formação do carbeto de silício (SiC), que chamaremos de heteroestruturas SiCOI (Silicon Carbide-On-Insulator). O método usado para a formação do SiC depende, em cada caso, das características desejadas para o filme que, ao mesmo tempo, estão relacionadas com a aplicação à qual estará destinado. Analisamos três métodos de obtenção do material SiC com características específicas diferentes. A metodologia proposta aborda as seguintes tarefas: Tarefa 1: Obtenção de estruturas SOI pelo método convencional utilizado em trabalhos anteriores e melhoramento das características superficiais da estrutura resultante. Tarefa 2: partindo de uma lâmina de Si previamente coberta por uma camada isolante, fabricar a heteroestrutura SiC/isolante/Si, onde a camada de SiC é crescida pelo método de deposição química de vapor assistida por plasma (PECVD). O filme obtido por deposição PECVD é amorfo e portanto são necessárias etapas de cristalização posteriores ao crescimento. Tarefa 3: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por implantação de íons de carbono (C+) na camada ativa de Si da estrutura SOI para sua transformação em SiC. Tarefa 4: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por conversão direta da camada ativa de Si da estrutura SOI em SiC como resultado da carbonização do Si usando exposição a ambiente de hidrocarbonetos. Como resultado deste trabalho foram obtidas estruturas SOI Smart Cut com valor médio de rugosidade superficial dentro dos valores esperados segundo a bibliografia consultada. Durante o desenvolvimento de heteroestruturas SiC/isolante/Si obtidas utilizando a técnica de PECVD obtivemos filmes com boas características estruturais. Os recozimentos feitos em ambiente de N2 aparentemente trazem resultados satisfatórios, conduzindo à completa cristalização dos filmes. Nas análises feitas para a fabricação de heteroestruturas SiC/isolante/Si utilizando I/I de carbono confirma-se a formação de c-SiC depois de realizado o recozimento térmico. / In this work we study new semiconductors heterostructures, based on SOI (Silicon-On- Insulator) structures obtained by \"Smart-Cut\" process, that were studied in the last years at Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). This technique combines high-dose hydrogen ion implantation (I/I) and direct wafer bonding. To produce SOI structures some processes are essential: I/I process, cleaning and activation of the surfaces, and conventional thermal treatments at moderated temperatures. We also investigate different methods to obtain new heterostructures, basically combining SOI technologies and silicon carbide (SiC) growth processes, which will be called as SiCOI (Silicon Carbide-On-Insulator) heterostructures. The utilized methods to obtain the SiC are related, in each case, with the desired film\'s characteristics, which at the same time are associated with the final application. We analyze three methods to obtain SiC material with specific different characteristics. The proposed methodology approaches the following tasks: Task 1: Fabrication of SOI structures by the conventional technology previously used by us, and the improvement of superficial characteristic of the final structure. Task 2: Fabrication of SiC/insulator/Si heterostructures from Si substrate previously covered with an insulator capping layer, where the SiC layer is deposited by plasma enhanced chemical vapor deposition (PECVD). The PECVD film is amorphous and therefore, a thermal annealing step is necessary for crystallization. Task 3: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is synthesized through a high dose carbon implantation into the thin silicon overlayer of a SOI wafer. Task 4: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is achieved by direct carbonization conversion of the silicon overlayer of a SOI wafer In this work we have obtained Smart Cut SOI structures with surface roughness similar to the previous reported. We also obtained SiC/insulator/Si heterostructures with good structural characteristics using PECVD technique. The investigated N2 thermal annealing appears to be suitable for the crystallization of all the amorphous films deposited by PECVD. We have shown the possibility of using carbon ion implantation and subsequent thermal annealing to form c-SiC for SiC/insulator/Si heterostructures.

Esta pesquisa engloba o estudo e desenvolvimento de novas heteroestruturas semicondutoras, tomando como base as estruturas SOI (Silicon-On-Insulator - silício sobre isolante) obtidas pela técnica Smart Cut, estudadas nestes últimos anos no Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). Esta técnica combina a solda direta para a união de lâminas e a implantação iônica (I/I) de íons leves para a separação de camadas especificadas. São essenciais na preparação destas estruturas SOI, processos de I/I, limpeza e ativação das superfícies das lâminas e recozimentos em fornos a temperaturas moderadas. Estudamos também, diferentes métodos para a obtenção de novas heteroestruturas, basicamente combinando as técnicas de fabricação da estrutura SOI e os métodos de formação do carbeto de silício (SiC), que chamaremos de heteroestruturas SiCOI (Silicon Carbide-On-Insulator). O método usado para a formação do SiC depende, em cada caso, das características desejadas para o filme que, ao mesmo tempo, estão relacionadas com a aplicação à qual estará destinado. Analisamos três métodos de obtenção do material SiC com características específicas diferentes. A metodologia proposta aborda as seguintes tarefas: Tarefa 1: Obtenção de estruturas SOI pelo método convencional utilizado em trabalhos anteriores e melhoramento das características superficiais da estrutura resultante. Tarefa 2: partindo de uma lâmina de Si previamente coberta por uma camada isolante, fabricar a heteroestrutura SiC/isolante/Si, onde a camada de SiC é crescida pelo método de deposição química de vapor assistida por plasma (PECVD). O filme obtido por deposição PECVD é amorfo e portanto são necessárias etapas de cristalização posteriores ao crescimento. Tarefa 3: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por implantação de íons de carbono (C+) na camada ativa de Si da estrutura SOI para sua transformação em SiC. Tarefa 4: partindo de uma estrutura SOI, fabricar a heteroestrutura SiC/SiO2/Si, onde a camada de SiC é obtida por conversão direta da camada ativa de Si da estrutura SOI em SiC como resultado da carbonização do Si usando exposição a ambiente de hidrocarbonetos. Como resultado deste trabalho foram obtidas estruturas SOI Smart Cut com valor médio de rugosidade superficial dentro dos valores esperados segundo a bibliografia consultada. Durante o desenvolvimento de heteroestruturas SiC/isolante/Si obtidas utilizando a técnica de PECVD obtivemos filmes com boas características estruturais. Os recozimentos feitos em ambiente de N2 aparentemente trazem resultados satisfatórios, conduzindo à completa cristalização dos filmes. Nas análises feitas para a fabricação de heteroestruturas SiC/isolante/Si utilizando I/I de carbono confirma-se a formação de c-SiC depois de realizado o recozimento térmico. / In this work we study new semiconductors heterostructures, based on SOI (Silicon-On- Insulator) structures obtained by \"Smart-Cut\" process, that were studied in the last years at Departamento de Engenharia de Sistemas Eletrônicos da Escola Politécnica da Universidade de São Paulo (EPUSP). This technique combines high-dose hydrogen ion implantation (I/I) and direct wafer bonding. To produce SOI structures some processes are essential: I/I process, cleaning and activation of the surfaces, and conventional thermal treatments at moderated temperatures. We also investigate different methods to obtain new heterostructures, basically combining SOI technologies and silicon carbide (SiC) growth processes, which will be called as SiCOI (Silicon Carbide-On-Insulator) heterostructures. The utilized methods to obtain the SiC are related, in each case, with the desired film\'s characteristics, which at the same time are associated with the final application. We analyze three methods to obtain SiC material with specific different characteristics. The proposed methodology approaches the following tasks: Task 1: Fabrication of SOI structures by the conventional technology previously used by us, and the improvement of superficial characteristic of the final structure. Task 2: Fabrication of SiC/insulator/Si heterostructures from Si substrate previously covered with an insulator capping layer, where the SiC layer is deposited by plasma enhanced chemical vapor deposition (PECVD). The PECVD film is amorphous and therefore, a thermal annealing step is necessary for crystallization. Task 3: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is synthesized through a high dose carbon implantation into the thin silicon overlayer of a SOI wafer. Task 4: Fabrication of SiC/SiO2/Si heterostructures from SOI structure, where the SiC layer is achieved by direct carbonization conversion of the silicon overlayer of a SOI wafer In this work we have obtained Smart Cut SOI structures with surface roughness similar to the previous reported. We also obtained SiC/insulator/Si heterostructures with good structural characteristics using PECVD technique. The investigated N2 thermal annealing appears to be suitable for the crystallization of all the amorphous films deposited by PECVD. We have shown the possibility of using carbon ion implantation and subsequent thermal annealing to form c-SiC for SiC/insulator/Si heterostructures.

This report collects selected outstanding scientific and technological results obtained within the frame of the European project "FLASiC" (Flash LAmp Supported Deposition of 3C-SiC) but also other work performed in adjacent fields. Goal of the project was the production of large-area epitaxial 3C-SiC layers grown on Si, where in an early stage of SiC deposition the SiC/Si interface is rigorously improved by energetic electromagnetic radiation from purpose-built flash lamp equipment developed at Forschungszentrum Rossendorf. Background of this work is the challenging task for areas like microelectronics, biotechnology, or biomedicine to meet the growing demands for high-quality electronic sensors to work at high temperatures and under extreme environmental conditions. First results in continuation of the project work – for example, the deposition of the topical semiconductor material zinc oxide (ZnO) on epitaxial 3C-SiC/Si layers – are reported too.

This report collects selected outstanding scientific and technological results obtained within the frame of the European project "FLASiC" (Flash LAmp Supported Deposition of 3C-SiC) but also other work performed in adjacent fields. Goal of the project was the production of large-area epitaxial 3C-SiC layers grown on Si, where in an early stage of SiC deposition the SiC/Si interface is rigorously improved by energetic electromagnetic radiation from purpose-built flash lamp equipment developed at Forschungszentrum Rossendorf. Background of this work is the challenging task for areas like microelectronics, biotechnology, or biomedicine to meet the growing demands for high-quality electronic sensors to work at high temperatures and under extreme environmental conditions. First results in continuation of the project work – for example, the deposition of the topical semiconductor material zinc oxide (ZnO) on epitaxial 3C-SiC/Si layers – are reported too.

Elektronik för extrema miljöer, som kan användas vid hög temperatur, hög strålning och omgivning med frätande gaser, har varit starkt önskvärd vid utforskning av rymden och övervakning av kärnreaktorer. Kiselkarbid (SiC) är en av kandidaterna inom material för extrema miljöer på grund av sin höga temperatur- och höga strålnings-tolerans. Syftet med denna avhandling är att karakterisera 4H-SiC MOSFETar vid hög temperatur och att konstruera SPICE modeller för 4H-SiC MOSFETar. MOSFET-transistorer karakteriserades till 500°C. Med användande av karaktäristik för en 4H-SiC NMOSFET med L/W = 10 µm / 50 µm, anpassades en SPICE LEVEL 2 kretsmodell. Modellen beskriver DC karakteristiska av 4H- SiC MOSFETar mellan 25ºC och 450ºC. Baserat på SPICE-kretsmodellen simulerades egenskaper för operationsförstärkare och digitala inverterar. Därutöver analyserades driften av pseudo-CMOS vid hög temperatur och principen för konstruktion av pseudo-CMOS föreslogs. Arean och utbytet (s.k. yield) av pseudo-CMOS integrerade kretsar uppskattades och det visar sig att SiC pseudo-CMOS integrerade kretsar kan använda mindre area än SiC CMOS integrerade kretsar. / Harsh environment electronics, which can be operated at high-temperature, high-radiation, and corrosive gas environment, has been strongly desired in space exploration and monitoring of nuclear reactors. Silicon Carbide (SiC) is one of the candidates of materials for harsh environment electronics because of its high-temperature and high-radiation tolerance.‌ The objective of this thesis is to characterize 4H-SiC MOSFETs at high- temperature and to construct SPICE models of the 4H-SiC MOSFETs. The MOSFET devices were characterized up to 500ºC. Using the characteristic of a 4H-SiC NMOSFET with L/W = 10 µm/50 µm, a SPICE LEVEL 2 circuit model was constructed. This model describes the DC characteristic of the 4H-SiC MOSFETs in the range of 25 – 450ºC. Based on the SPICE circuit model, the characteristics of operational amplifiers and digital inverters were simulated. Furthermore, the operation of pseudo-CMOS at high-temperature was analyzed and the operation principle of pseudo-CMOS was suggested. The device area and yield of pseudo-CMOS integrated circuits were estimated and it is shown that SiC pseudo-CMOS integrated circuits can use less area than SiC CMOS integrated circuits.

Wear resistant surfaces with high toughness and impact resistant properties are to be created to improve the life cycle cost of brake discs for trains. A potential solution to this industrial problem is to use an arc cladding process. This work describes the application of gas tungsten arc welding (GTAW) for a structural ceramic Metal Matrix Composite (MMC) on steel. The structure of the two ceramics examined indicates the possibility of development of a wear resistant surface, which would extend the life of the brake disc. Silicon Carbide (SiC) and Tungsten Carbide (WC) ceramics were studied to embed them in a steel matrix by an advanced GTAW method. WC particles penetrated the liquid weld pool and also partially dissolved in the steel matrix, whereas, SiC because of the physical properties never penetrated deeper into the weld pool but segregated on the surface. Successful embedding and bonding of WC led to the decision to exercise an in-depth analysis of the bonding between the WC particles and the matrix. Chemical analysis of the matrix revealed more WC dissolution as compared to particle form within the clad. It was observed that WC reinforcement particles built a strong chemical bond with the steel matrix. This was shown by electron backscatter diffraction (EBSD) analysis. The hard clad layer composed of WC reinforced steel matrix gave an matching friction coefficient to high-strength steel in cold wear conditions through Pin-on-Disc wear and friction testing. A prototype railway brake disc was created with the established GTAW parameters to find out the difficulties of producing industrial scale components.

The global energy market is continuously changing due to changes in demand and fuel availability. Amongst the technologies considered as capable of fulfilling these future energy requirements, Photovoltaics (PV) are one of the most promising. Currently the majority of the PV market is fulfilled by crystalline Silicon (c-Si) solar cell technology, the so called 1st generation PV. Although c-Si technology is well established there is still a lot to be done to fully exploit its potential. The cost of the devices, and their efficiencies, must be improved to allow PV to become the energy source of the future. The surface of the c-Si device is one of the most important parts of the solar cell as the surface defines the electrical and the optical properties of the device. The surface is responsible for light reflection and charge carrier recombination. The standard surface finish is a thin film layer of silicon nitride deposited by Plasma Enhanced Chemical Vapour Deposition (PECVD). In this thesis an alternative technique of coating preparation is presented. The HiTUS sputtering tool, utilising a remote plasma source, was used to deposit the surface coating. The remote plasma source is unique for solar cells application. Sputtering is a versatile process allowing growth of different films by simply changing the target and/or the deposition atmosphere. Apart from silicon nitride, alternative materials to it were also investigated including: aluminium nitride (this was the first use of the material in solar cells) silicon carbide, and silicon carbonitride. All the materials were successfully used to prepare solar cells apart from the silicon carbide, which was not used due to too high a refractive index. Screen printed solar cells with a silicon nitride coating deposited in HiTUS were prepared with an efficiency of 15.14%. The coating was deposited without the use of silane, a hazardous precursor used in the PECVD process, and without substrate heating. The elimination of both offers potential processing advantages. By applying substrate heating it was found possible to improve the surface passivation and thus improve the spectral response of the solar cell for short wavelengths. These results show that HiTUS can deposit good quality ARC for silicon solar cells. It offers optical improvement of the ARC s properties, compared to an industrial standard, by using the DL-ARC high/low refractive index coating. This coating, unlike the silicon nitride silica stack, is applicable to encapsulated cells. The surface passivation levels obtained allowed a good blue current response.

Silicon Carbide (SiC) has the potential to significantly improve electronics. As a material, it can conduct heat better, carry larger currents and can give faster responses compared to today’s technologies. One way to produce SiC for use in electronics is by growing a thin layer in a CVD-reactor (chemical vapour deposition). A CVD-reactor leads a carrier gas with small parts of active gas into a heated chamber (susceptor). The gas is then rapidly heated to high temperatures and chemical reactions occur. These new chemical substances can then deposit on the substrate surface and grow a SiC layer. This thesis investigates the effect of different opening angles on a susceptor inlet in a SiC horizontal hot-walled CVD-reactor at Linköping University. The susceptor inlet affects both the flow and heat transfer and therefore has an impact on the conditions over the substrate. A fast temperature rise in the gas as close to the substrate as possible is desired. Even temperaturegradients vertically over the substrate and laminar flow is desired. The CVD-reactor is modeled with conjugate heat transfer using CFD simulations for three different angles of the inlet. The results show that the opening angle mainly affects the temperature gradient over the substrate and that a wider opening angle will cause a greater gradient. The opening angle will have little effect on the temperature of the satellite and substrate.

Tandem solar cells are potentially much more efficient than the silicon solar cells that currently dominate the market but require materials with different bandgaps. This thesis presents work on silicon nanocrystals (Si-NC) embedded in silicon carbide (SiC), which are expected to have a higher bandgap than bulk Si due to quantum confinement, with a view to using them in the top cell of a tandem cell. The strong photoluminescence (PL) of precursor films used to prepare Si-NC in SiC (Si-NC/SiC) was markedly reduced upon Si-NC formation due to simultaneous out-diffusion of hydrogen that passivated dangling bonds. This cannot be reversed by hydrogenation and leads to weak PL that is due to, and limited by, non-paramagnetic defects, with an estimated quantum yield of ≤5×10^-7. Optical interference was identified as a substantial artefact and a method proposed to account for this. Majority carrier transport was found to be Ohmic at all temperatures for a wide range of samples. Hydrogenation decreases dangling bond density and increases conductivity up to 1000 times. The temperature-dependence of conductivity is best described by a combination of extended-state and variable-range hopping transport where the former takes place in the Si nanoclusters. Furthermore, n-type background doping by nitrogen and/or oxygen was identified. In the course of developing processing steps for Si-NC-based tandem cells, a capping layer was developed to prevent oxidation of Si-NC/SiC, and diffusion of boron and phosphorus in nanocrystalline SiC was found to occur via grain boundaries with an activation energy of 5.3±0.4 eV and 4.4±0.7 eV, respectively. Tandem cells with a Si-NC/SiC top cell and bulk Si bottom cell were prepared that exhibited open-circuit voltages V_oc of 900 mV and short-circuit current densities of 0.85 mAcm^-2. Performance was limited by photocurrent collection in the top cell; however, the V_oc obtained demonstrates tandem cell functionality.

Le diamant est un semi-conducteur à grande bande interdite extrêmement prometteur, notamment en électronique et en radiodétection. Notre étude s’intéresse à la production de films diamant en hétéroépitaxie sur du silicium. Cette association constitue en effet un enjeu majeur compte tenu de l’importance du silicium en microélectronique. Les films sont obtenus par dépôt chimique en phase vapeur assisté par plasma microonde (MPCVD), tandis qu’une procédure de polarisation (BEN) sert à initier la germination. L’objectif est d’améliorer le taux d’épitaxie des cristaux diamant et leur densité, deux critères décisifs pour la qualité d’un film diamant hautement orienté. Des analyses MEB, AFM, XPS et RHEED ont ainsi montré que la formation d’une couche de carbure de silicium intermédiaire par carbonisation in situ est très avantageuse, mais qu’elle impose l’utilisation d’une courte durée de polarisation afin de préserver l’intégrité de la couche. Une faible concentration en méthane permet par ailleurs d’éviter une croissance dégradée du diamant. Ces ajustements ont permis de passer d’un taux d’épitaxie de 10 à 45 %, au détriment cependant de la densité. Ceci a pu être compensé par l’amélioration de l’état de surface du substrat via un prétraitement plasma modifiant sa structure (densité multipliée par 20) ou en déposant du carbure de silicium monocristallin. Cette dernière méthode a engendré une germination du diamant « par domaine », très prometteuse et inédite sur ce matériau. Ces travaux montrent donc comment améliorer la qualité de la germination du diamant et permettent d’envisager la production sur silicium de films diamant plus minces et de meilleure qualité cristalline. / Diamond is a wide band gap semiconductor which is very promising, especially in electronics or in radiodetection.Our study is focused in particular on the production of heteroepitaxial diamond films on silicon substrates. In fact, this association is a major issue because of the wide use of silicon in microelectronics. Films are produced by microwave plasma assisted chemical vapour deposition (MPCVD), with a bias procedure (BEN) which enable us to initiate nucleation. Our aim is to achieve a better epitaxial rate of the diamond crystals and also a better density, which are two decisive criteria for the quality of highly oriented diamond films. SEM, AFM, XPS and RHEED analyses have shown that the formation of an intermediary silicon carbide layer by in situ carbonization provides important advantages but that the bias procedure should be short in order to avoid a deterioration of this layer. Moreover, we noticed that the use of a low methane concentration prevents a defective growth of the diamond crystal. These adjustments allowed us to raise the epitaxial rate from 10 to 45 % but, on the other hand, the density decreased. To compenate for this density drop, the state of the substrate surface can be improved, by optimizing its structure through a plasma pretreatment (density mutiplied bu 20) or by preparing a layer of monocrystalline silicon carbide. In this last case, we obtained a diamond nucleation forming domains, which is unusual on silicon carbide but very promising. Consequently, our work shows how to directly improve the quality of the diamond nucleation. This paves the way to the production on silicon of thinner diamond films with better crystal quality.