Avec la percée des téléphones portables et des tablettes numériques intégrant des fonctions avancées de traitement de l'information, une croissance exponentielle du marché des systèmes sur puce (SoC pour System On Chip en anglais) est attendue jusqu'en 2016. Ces systèmes, conçus dans les dernières technologies nanométriques, nécessitent des vitesses de fonctionnement très élevées pour offrir des performances incroyables, tout en consommant remarquablement peu. Cependant, concevoir de tels systèmes à l'échelle nanométrique présente de nombreux enjeux en raison de l'accentuation d'effets parasites avec la miniaturisation des transistors MOS sur silicium massif, rendant les circuits plus sensibles aux phénomènes de fluctuations des procédés de fabrication et moins efficaces énergétiquement. La technologie planaire complètement désertée (FD pour Fully depleted en anglais) SOI, offrant un meilleur contrôle du canal du transistor et une faible variabilité de sa tension de seuil grâce à un film de silicium mince et non dopé, apparaît comme une solution technologique très bien adaptée pour répondre aux besoins de ces dispositifs nomades alliant hautes performances et basse consommation. Cependant pour que cette technologie soit viable, il est impératif qu'elle réponde aux besoins des plateformes de conception basse consommation. Un des défis majeurs de l'état de l'art de la technologie planaire FDSOI est de fournir les différentes tensions de seuils (VT) requises pour la gestion de la consommation et de la vitesse. Le travail de recherche de thèse présenté dans ce mémoire a contribué à la mise en place d'une plateforme de conception multi-VT en technologie planaire FDSOI sur oxyde enterré mince (UTB pour Ultra Thin Buried oxide en anglais) pour les nœuds technologiques sub-32 nm. Pour cela, les éléments clefs des plateformes de conception basse consommation en technologie planaire sur silicium massif ont été identifiés. A la suite de cette analyse, différentes architectures de transistors MOS multi-VT FDSOI ont été développées. L'analyse au niveau des circuits numériques et mémoires élémentaires a permis de mettre en avant deux solutions fiables, efficaces et de faible complexité technologique. Les performances des solutions apportées ont été évaluées sur un chemin critique extrait du cœur de processeur ARM Cortex A9 et sur une cellule SRAM 6T haute densité (0,120 µm²). Egalement, une cellule SRAM à quatre transistors est proposée, démontrant la flexibilité au niveau conception des solutions proposées. Ce travail de recherche a donné lieu à de nombreuses publications, communications et brevets. Aujourd'hui, la majorité des résultats obtenus ont été transférés chez STMicroelectronics, où l'étude de leur industrialisation est en cours.

Interactive handheld electronic displays use hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) as a backplane and a Touch Screen Panel (TSP) on top as an input device. The low mobility and instability of a-Si:H TFT threshold voltage are major two issues for driving constant current as required for Active Matrix Organic Light Emitting Ddiode (AMOLED) displays. Low mobility is compensated by increasing transistor width or resorting to more expensive material TFTs. On the other hand, the ever increasing threshold voltage shift degrades the drain current under electrical operation causing OLED display to dim. Mutual capacitive TSP, the current cell phone standard, requires two layers of metals and a dielectric to be put in front of the display, further dimming the device and adding to visual noise due to sun reflection, not to mention increased integration cost and decreased yield. This thesis focuses on the aforementioned technological hurdles of a handheld electronic display by proposing a dual-gate TFT used as an OLED current driving TFT and a novel phase response readout scheme that can be applied to a one metal track TSP. Our dual-gate TFT has shown on average 20% increase in drive current over a single gate TFT fabricated in the same batch, attributed to the aid of a top channel to the convention bottom channel TFT. Furthermore the dual gate TFT shows three times the Poole-Frenkel current than the single gate TFT attributed to the increase in gate to drain overlap. The dual-gate TFT shows a 50% improvement in threshold voltage shift over a single gate TFT at room temperature, but only ~8% improvement under 75ºC. This is an important observation as it shows an accelerated threshold voltage shift in the dual-gate. This difference in the rate of threshold voltage change under varying temperature is attributed to the difference in interface states, supporting Libsch and Kanicki’s multi-level temperature dependant dielectric trapping model. The phase response TSP readout scheme requires IC only on one side of the display. Cadence Spectre simulation results showed that both touch occurrence and touch position can be obtained using only one metal layer.

Este trabalho propõe uma estratégia para projeto de circuitos VLSI operando em amplo ajuste de tensão e frequência (VFS), desde o regime em Near-threshold, onde uma tensão de VDD caracteriza-se por permitir o funcionamento do circuito com o mínimo dispêndio de energia por operação (MEP), até tensões nominais, dependendo da carga de trabalho exigida pela aplicação. Nesta dissertação é proposto o dimensionamento de transistores para três bibliotecas de células utilizando MOSFETs com tensões de limiar distintas: Regular-VT (RVT), High-VT (HVT) e Low-VT (LVT). Tais bibliotecas possuem cinco células combinacionais: INV, NAND, NOR, OAI21 e AOI22 em múltiplos strengths. A regra para dimensionamento dos transistores das células lógicas foi adaptada de trabalhos relacionados, e fundamenta-se na equalização dos tempos de subida e descida na saída de cada célula, objetivando à redução dos efeitos de variabilidade em baixas tensões de operação. Dois registradores também foram incluídos na biblioteca RVT e sua caracterização foi realizada considerando os parâmetros de processo CMOS 65 nm typical, fast e slow; nas temperaturas de operação de -40°C, 25°C e 125°C, e para tensões variando de 200 mV até 1,2V, para incluir a região de interesse, próxima ao MEP. Os experimentos foram realizados utilizando dez circuitos VLSI de teste: filtro digital notch, um núcleo compatível com o micro-controlador 8051, quatro circuitos combinacionais e quatro sequenciais do benchmark ISCAS. Em termos de economia de energia, operar no MEP resulta em uma redução média de 54,46% em relação ao regime de sub-limiar e até 99,01% quando comparado com a tensão nominal, para a temperatura de 25°C e processo típico. Em relação ao desempenho, operar em regime de VFS muito amplo propicia frequências máximas que variam de centenas de kHz até a faixa de centenas de MHz a GHz, para as temperaturas de -40°C e 25°C, e de MHz até GHz em 125°C. Os resultados desta dissertação, quando comparados a trabalhos relacionados, demonstraram, em média, redução de energia e ganho de desempenho de 24,1% e 152,68%, respectivamente, considerando os mesmos circuitos de teste, operando no ponto de mínima energia (MEP). / This work proposes a strategy for designing VLSI circuits to operate in a very-wide Voltage-Frequency Scaling (VFS) range , from the supply voltage at which the minimum energy per operation (MEP) is achieved, at the Near-Threshold regime, up to the nominal supply voltage for the processes, if so demanded by applications workload. This master thesis proposes the sizing of transistors for three library cells using MOSFETs with different threshold voltages: Regular-VT (RVT), High-VT (HVT), and Low-VT (LVT). These libraries have five combinational cells: INV, NAND, NOR, OAI21, and AOI22 with multiple strengths. The sizing rule for the transistors of the digital cells was an adapted version from related works and it is directly driven by requiring equal rise and fall times at the output for each cell in order to attenuate variability effects in the low supply voltage regime. Two registers were also included in the RVT library cell. This library cell was characterized for typical, fast, and slow processes conditions of a CMOS 65nm technology; for operation at -40ºC, 25ºC, and 125ºC temperatures, and for supply voltages varying from 200 mV up to 1.2V, to include the region of interest, for VDD near the MEP. Experiments were performed with ten VLSI circuit benchmarks: notch filter, 8051 compatible core, four combinational and four sequential ISCAS benchmark circuits. From the energy savings point of view, to operate in MEP results on average reduction of 54.46% and 99.01% when compared with the sub-threshold and nominal supply voltages, respectively. This analysis was performed for 25⁰C and typical process. When considered the performance, the very-wide VFS regime enables maximum operating frequencies varying from hundreds of kHz up to MHz/GHz at -40ºC and 25ºC, and from MHz up to GHz at 125ºC. This master thesis results, when compared with related works, showed on average an energy reduction and performance gain of 24.1% and 152.68%, respectively, for the same circuit benchmarks operating with VDD at the minimum energy point (MEP).

Este trabalho propõe uma estratégia para projeto de circuitos VLSI operando em amplo ajuste de tensão e frequência (VFS), desde o regime em Near-threshold, onde uma tensão de VDD caracteriza-se por permitir o funcionamento do circuito com o mínimo dispêndio de energia por operação (MEP), até tensões nominais, dependendo da carga de trabalho exigida pela aplicação. Nesta dissertação é proposto o dimensionamento de transistores para três bibliotecas de células utilizando MOSFETs com tensões de limiar distintas: Regular-VT (RVT), High-VT (HVT) e Low-VT (LVT). Tais bibliotecas possuem cinco células combinacionais: INV, NAND, NOR, OAI21 e AOI22 em múltiplos strengths. A regra para dimensionamento dos transistores das células lógicas foi adaptada de trabalhos relacionados, e fundamenta-se na equalização dos tempos de subida e descida na saída de cada célula, objetivando à redução dos efeitos de variabilidade em baixas tensões de operação. Dois registradores também foram incluídos na biblioteca RVT e sua caracterização foi realizada considerando os parâmetros de processo CMOS 65 nm typical, fast e slow; nas temperaturas de operação de -40°C, 25°C e 125°C, e para tensões variando de 200 mV até 1,2V, para incluir a região de interesse, próxima ao MEP. Os experimentos foram realizados utilizando dez circuitos VLSI de teste: filtro digital notch, um núcleo compatível com o micro-controlador 8051, quatro circuitos combinacionais e quatro sequenciais do benchmark ISCAS. Em termos de economia de energia, operar no MEP resulta em uma redução média de 54,46% em relação ao regime de sub-limiar e até 99,01% quando comparado com a tensão nominal, para a temperatura de 25°C e processo típico. Em relação ao desempenho, operar em regime de VFS muito amplo propicia frequências máximas que variam de centenas de kHz até a faixa de centenas de MHz a GHz, para as temperaturas de -40°C e 25°C, e de MHz até GHz em 125°C. Os resultados desta dissertação, quando comparados a trabalhos relacionados, demonstraram, em média, redução de energia e ganho de desempenho de 24,1% e 152,68%, respectivamente, considerando os mesmos circuitos de teste, operando no ponto de mínima energia (MEP). / This work proposes a strategy for designing VLSI circuits to operate in a very-wide Voltage-Frequency Scaling (VFS) range , from the supply voltage at which the minimum energy per operation (MEP) is achieved, at the Near-Threshold regime, up to the nominal supply voltage for the processes, if so demanded by applications workload. This master thesis proposes the sizing of transistors for three library cells using MOSFETs with different threshold voltages: Regular-VT (RVT), High-VT (HVT), and Low-VT (LVT). These libraries have five combinational cells: INV, NAND, NOR, OAI21, and AOI22 with multiple strengths. The sizing rule for the transistors of the digital cells was an adapted version from related works and it is directly driven by requiring equal rise and fall times at the output for each cell in order to attenuate variability effects in the low supply voltage regime. Two registers were also included in the RVT library cell. This library cell was characterized for typical, fast, and slow processes conditions of a CMOS 65nm technology; for operation at -40ºC, 25ºC, and 125ºC temperatures, and for supply voltages varying from 200 mV up to 1.2V, to include the region of interest, for VDD near the MEP. Experiments were performed with ten VLSI circuit benchmarks: notch filter, 8051 compatible core, four combinational and four sequential ISCAS benchmark circuits. From the energy savings point of view, to operate in MEP results on average reduction of 54.46% and 99.01% when compared with the sub-threshold and nominal supply voltages, respectively. This analysis was performed for 25⁰C and typical process. When considered the performance, the very-wide VFS regime enables maximum operating frequencies varying from hundreds of kHz up to MHz/GHz at -40ºC and 25ºC, and from MHz up to GHz at 125ºC. This master thesis results, when compared with related works, showed on average an energy reduction and performance gain of 24.1% and 152.68%, respectively, for the same circuit benchmarks operating with VDD at the minimum energy point (MEP).

Este trabalho propõe uma estratégia para projeto de circuitos VLSI operando em amplo ajuste de tensão e frequência (VFS), desde o regime em Near-threshold, onde uma tensão de VDD caracteriza-se por permitir o funcionamento do circuito com o mínimo dispêndio de energia por operação (MEP), até tensões nominais, dependendo da carga de trabalho exigida pela aplicação. Nesta dissertação é proposto o dimensionamento de transistores para três bibliotecas de células utilizando MOSFETs com tensões de limiar distintas: Regular-VT (RVT), High-VT (HVT) e Low-VT (LVT). Tais bibliotecas possuem cinco células combinacionais: INV, NAND, NOR, OAI21 e AOI22 em múltiplos strengths. A regra para dimensionamento dos transistores das células lógicas foi adaptada de trabalhos relacionados, e fundamenta-se na equalização dos tempos de subida e descida na saída de cada célula, objetivando à redução dos efeitos de variabilidade em baixas tensões de operação. Dois registradores também foram incluídos na biblioteca RVT e sua caracterização foi realizada considerando os parâmetros de processo CMOS 65 nm typical, fast e slow; nas temperaturas de operação de -40°C, 25°C e 125°C, e para tensões variando de 200 mV até 1,2V, para incluir a região de interesse, próxima ao MEP. Os experimentos foram realizados utilizando dez circuitos VLSI de teste: filtro digital notch, um núcleo compatível com o micro-controlador 8051, quatro circuitos combinacionais e quatro sequenciais do benchmark ISCAS. Em termos de economia de energia, operar no MEP resulta em uma redução média de 54,46% em relação ao regime de sub-limiar e até 99,01% quando comparado com a tensão nominal, para a temperatura de 25°C e processo típico. Em relação ao desempenho, operar em regime de VFS muito amplo propicia frequências máximas que variam de centenas de kHz até a faixa de centenas de MHz a GHz, para as temperaturas de -40°C e 25°C, e de MHz até GHz em 125°C. Os resultados desta dissertação, quando comparados a trabalhos relacionados, demonstraram, em média, redução de energia e ganho de desempenho de 24,1% e 152,68%, respectivamente, considerando os mesmos circuitos de teste, operando no ponto de mínima energia (MEP). / This work proposes a strategy for designing VLSI circuits to operate in a very-wide Voltage-Frequency Scaling (VFS) range , from the supply voltage at which the minimum energy per operation (MEP) is achieved, at the Near-Threshold regime, up to the nominal supply voltage for the processes, if so demanded by applications workload. This master thesis proposes the sizing of transistors for three library cells using MOSFETs with different threshold voltages: Regular-VT (RVT), High-VT (HVT), and Low-VT (LVT). These libraries have five combinational cells: INV, NAND, NOR, OAI21, and AOI22 with multiple strengths. The sizing rule for the transistors of the digital cells was an adapted version from related works and it is directly driven by requiring equal rise and fall times at the output for each cell in order to attenuate variability effects in the low supply voltage regime. Two registers were also included in the RVT library cell. This library cell was characterized for typical, fast, and slow processes conditions of a CMOS 65nm technology; for operation at -40ºC, 25ºC, and 125ºC temperatures, and for supply voltages varying from 200 mV up to 1.2V, to include the region of interest, for VDD near the MEP. Experiments were performed with ten VLSI circuit benchmarks: notch filter, 8051 compatible core, four combinational and four sequential ISCAS benchmark circuits. From the energy savings point of view, to operate in MEP results on average reduction of 54.46% and 99.01% when compared with the sub-threshold and nominal supply voltages, respectively. This analysis was performed for 25⁰C and typical process. When considered the performance, the very-wide VFS regime enables maximum operating frequencies varying from hundreds of kHz up to MHz/GHz at -40ºC and 25ºC, and from MHz up to GHz at 125ºC. This master thesis results, when compared with related works, showed on average an energy reduction and performance gain of 24.1% and 152.68%, respectively, for the same circuit benchmarks operating with VDD at the minimum energy point (MEP).

The short-term jitter and longer-term wander of the frequency sweep profile of a Vernier-Tuned Distributed Bragg Reflector (VT-DBR) laser at 1550 nm used in optical coherence tomography (OCT) and other sensing applications is characterized in this work. The VT-DBR has demonstrated success in source-swept OCT (SSOCT), performing both intensity and phase-sensitive OCT. The purpose of this paper is to investigate one of the unique aspects of the VT-DBR laser that makes it successful in OCT: the stability of the linear optical frequency sweep. A highly stable linear optical frequency sweep implies benefits for further fiber sensing applications including fiber Bragg grating and spectroscopy sensors. Short-term jitter measurements of the optical frequency sweep are taken using a 3-cavity 100 GHz free spectral range solid etalon, an athermal fiber Bragg grating, a molecular-based gas absorption reference cell, and a Mach-Zehnder interferometer. These four optical filters are used to convert time fluctuations into intensity fluctuations that can be measured by high speed optical receivers. Short term jitter values on the order of 0.5 – 0.6 pm RMS (63 – 82 MHz RMS) are typical values in the VT-DBR lasers systems characterized in this work. This level of jitter is compelling for OCT and fiber-sensing applications. Longer-term wander is characterized using a multiple-gas absorption reference cell. The long term stability and temperature insensitivity of the absorption cell is ideal for long-term wander characterization of the laser frequency sweeps. Wander values on the order of 2.6 pm of wavelength shift over an 8 hour time frame are reported in this work. The slope of the frequency versus time function of the laser sweep, on the order of 100 MHz/sample, is found to deviate by no more than 0.03% over the same 8 hour time frame. Both the long term wavelength shift and consistency of the slope indicate that these sources will perform well in OCT and fiber sensing applications. Mechanisms responsible for short-term jitter and longer- term wavelength wander likely include contributions from the laser source itself and from the high speed electronic drive circuitry that creates the wavelength ramp. Investigation of ambient temperature’s influence on the wavelength wander is also highlighted in the work.

Pour garantir la pérennité de l'entreprise, celle-ci doit souvent chercher des contrats à l'export. Dans le domaine de la Défense, ces contrats s'accompagnent souvent de transferts de technologie (ToT) vers le pays acquéreur. Ceux-ci sont partiels et un compromis est nécessaire entre la protection de la propriété industrielle, celle du secret national et les demandes du client. C'est dans ce contexte, et notamment au sein de DCNS que nous cherchons de nouvelles techniques de protection logicielles. Face aux échecs des différentes techniques de protections actuelles (obfuscations et packer) qui ne proposent que de ralentir la compréhension des données, une nouvelle approche de protection est envisagée. L'idée principale est de filtrer les accès mémoires des données identifiées comme sensibles. Cette solution, qui s'inscrit dans un environnement industriel défini (architecture Intel et système d'exploitation Linux), doit impacter au minimum le système et les applications fournis par DCNS. Nous proposons une architecture qui s'appuie sur les dernières technologies Intel et particulièrement sur la virtualisation matérielle. Celle-ci nous permet d'obtenir un haut niveau de privilège et de contrôler finement les applications. Notre solution permet de protéger les données exécutables des binaires de type ELF, dans les architectures 32 et 64 bits, sans modification du système cible. Nous détaillons les différentes étapes pour protéger l'exécution d'un processus (du chargement à son arrêt) ainsi que les problèmes rencontrés et les choix pour y remédier. Nous montrons également, à travers différentes mesures, l'efficacité d'une telle architecture et son faible impact sur les performances globales. Dans notre implémentation, seules les données exécutables sont protégées, nous proposons donc des pistes d'améliorations pour couvrir la totalité du binaire en mémoire. Et nous étudions les évolutions possibles pour intégrer notre protection dans une architecture de confiance et ainsi, renforcer sa persistance face aux attaques. Notre solution permet donc par construction d'interdire toutes les lectures et écritures des données exécutables sensibles et s'adapte à tous les systèmes d'exploitation Linux sans aucune modification du système.

Vortex tube (VT) is a mechanical device with no moving parts. The fundamental principle of Vortex Tube is that it can split an incoming fluid flow of a constant pressure and constant temperature gas stream into two separate low pressure streams, one having higher enthalpy and the other having lower enthalpy than the inlet flow. So this device essentially works as a temperature separator. On separation from the device, a warmer flow exits through a terminal which is called the “hot end” and a low temperature stream comes out from another terminal known as the “cold end”. Just with a few bar pressure of compressed air at room temperature can produce a hot stream temperature of about 150°C and a cold stream temperature of about - 40°C. This temperature separation scheme allows us to get cooling and heating effect simultaneously using the same device which makes the Vortex tube one of the popular mechanical equipment and is used in many fields of engineering. The cooling or heating effect produced by this device is largely dependent on geometric parameters of the device itself. Since no exact theoretical correlation is there between the geometric parameters and the cooling (or heating) effect produced, VT design is solely based on empirical relations. There are quite a few geometric parameters which affect the cooling effect of this device and all the empirical correlation are needed to design the optimum VT for maximum cooling/heating effect. These relations can be derived in two ways, either by numerical methods or by experimental investigations. The first part of the thesis important geometric parameter of the VT namely the ratio of the “cold end” diameter (to the “tube diameter” , which has been numerically optimized in this work to achieve maximum temperature separation. In our efforts to design a VT based refrigeration system, optimization of the VT itself is not enough. A suitable heat exchanger (HX) which can extract the cold enthalpy from the VT also needs to be designed and cascaded with the VT to get the complete refrigeration system. The second part of the thesis is solely dedicated to the design of a suitable HX that can be used alongside a VT to produce refrigeration. The HXs design can be approached from two directions, dimensional aspect and material aspect. Rather than focusing on the dimensional aspect in this work we have concentrated of the material aspect of HX design. It is fairly obvious that the thermal conductivity (TC) of the HX material will play a crucial role on the cooling effect of the refrigeration system. Conventional metals with high TC can be used to design HXs but the downsides of using pure metals such as Copper, Iron are that they are heavy, quite expensive and highly reactive to corrosive fluids. Because of this, high TC ceramic material such as Aluminium Nitride (AlN) is quite often used to fabricate HXs and they are used for spot cooling in electronic systems. AlN has TC of 160 W/m-K which is high but not as high as of Copper or Iron. TC of AlN can be increased by mixing the right volume fraction of metal powder (such as pure Aluminium) with it to a great extent. So in a nutshell, instead of using pure AlN, if we use the particle reinforced binary composite [AlN + Al (powder)] to design a HX, we would achieve the benefits of having high TC as well as properties such as anti-corrosiveness, cost effectiveness and weight reduction. In the above context, prediction of TC of particle reinforced composite materials containing a base material of low TC and a filler material of high TC is of utmost importance. Till now a very few analytical heat transfer models are available in the literature that can accurately predict the TC value of such composites especially when high volume fraction of filler particles is added to the base material or if more than one type of filler particles are added. So in this thesis, three analytical heat transfer models have been developed that can predict the TC of binary as well as tertiary particle reinforced composites. The third and the final segment of the thesis deals with the performance study of a refrigeration system comprised of the optimized VT cascaded with a suitable HX made out of a particle reinforced composite material. The numerical results show how the HX effectiveness improves as the volume fraction of the filler particles in the composite increases. The key results of the works described in the thesis are as follows: • Through extensive numerical simulations it is shown that for = 0.5, the temperature separation in a VT is maximum. • The heat transfer models developed to predict the thermal conductivity of binary composites, shows the trend of how thermal conductivity varies with increasing volume fraction of filler. It has been shown that initially the thermal conductivity increases linearly with a small slope, then after a critical volume fraction an abrupt increment of slope is observed due to the formation of continuous heat conduction paths within the composite. Further increase in volume fraction shows linear increment of thermal conductivity with lesser slope as before. • The heat transfer model developed to predict the thermal conductivity of tertiary composites is suitable for low volume fraction (< 20 %). The model shows the addition of one component into the base matrix affects the distribution of the other component which is observed through the covariance. • The last part of the thesis shows that compared to a pure AlN heat exchanger, a heat exchanger made of AlN + 30 % volume fraction of pure Aluminium powder, has increased heat exchanger effectiveness by more than 50 %. Thesis outline is as follows: • Chapter 1 is a brief introduction to Vortex Tube. • Chapter 2 deals with the necessary literature review related to Vortex Tube as well as presently available heat transfer models that are equipped to handle composite materials to predict their TC. • Chapter 3 elaborates numerical modeling and optimization of a critical parameter ( to achieve maximum temperature separation in a VT. • Chapter 4 presents a stochastic heat transfer model to estimate the TC of Binary particle reinforced composites containing low volume fraction of filler particles. • Chapter 5 describes the development of a computational heat transfer model to predict the TC of Particle Reinforced Binary Composite materials containing high volume fraction of filler element. • Chapter 6 deals with a stochastic heat transfer model to calculate TC of Particle Reinforced Tertiary Composite materials containing low volume fractions of filler elements. • Chapter 7 consolidates all the necessary concepts and data from previous chapters to design the final cascaded VT based refrigeration system and presents a performance study. • The last chapter summarizes the entire work along with scope for future work.

Vortex Tube (VT) is a simple device having no moving mechanical parts, in which compressed gas at high pressure is injected through one or more tangential nozzles into a vortex chamber resulting in the separation of the inlet flow into two low pressure streams. One of the streams is the peripheral flow that is warmer than the inlet stream while the other is the central (core) flow that is colder than the inlet stream. This separation of the inlet flow into high and low temperature streams is known as temperature or energy separation. It is suggested by many investigators that compressed air of few atmospheres pressure and at room temperature can produce temperatures as high as +200ºC at the hot end (peripheral flow exit) and as low as -50ºC at the cold end (core flow exit) of the VT. Though VTs have large potential for simple heating and cooling applications, the mechanism of energy separation is not clear so far. Based on their studies, many investigators have suggested various theories, different from each other, but having specific lacunas and is an unresolved issue. Also, till date, experimental and industrial designs of the VTs are based purely on empirical correlations. Apart from heating and cooling applications, VTs can also be used for separation of binary gas mixtures and separation of oxygen from two-phase precooled air stream. The conceptual futuristic cryogenic launch vehicle designs are being attempted with in-flight liquid oxygen (LOX) collection system that significantly improves the pay load fraction. Vortex tube technology is one of the few promising technologies for futuristic in-flight LOX separation based launch vehicles. This technology has significant advantages over its counterparts as it is a simple, compact and light weight, and most importantly have no moving parts and unaffected by gravity and orientation. In order that VTs become an acceptable technology for in-flight LOX separation system, it is necessary to achieve minimum oxygen purity of 90% with more than 60% yield (separation efficiency) for the oxygen enriched stream in the VT. A survey of the available open literature has shown very little reported details, in particular, on achieving the required specifications for in-flight LOX separation systems. Till date, the highest LOX purity of 60% with 40% separation efficiency has been reported with VT technology. In view of the above mentioned facts, the work carried out has been focused on to: • Optimize the critical parameters of the VT to achieve maximum energy separation by CFD and experimental studies. • Understand the flow behaviour in the VT by estimating the velocity, temperature and pressure profiles at various locations in the VT and validation of secondary circulation flow and its effect on the performance of energy separation in VT. • Estimation of the energy transfer between the core and the peripheral layers of fluid flow in VT by analytical and CFD methods to propose the most appropriate mechanism of energy separation in VT. • Design and development of a dedicated experimental setup for both energy separation and LOX separation studies in VTs. • Design and fabrication of straight and conical VTs and experimental programme on energy separation and LOX separation. • Development of the VT air separation technology to achieve the required specifications of in-flight LOX separation system for futuristic launch vehicles. With these specific objectives and motivations, the total work was carried out with the following planned and sequential steps: • The first step was the CFD modeling of the VT with the available CFD software (Star-CD) and obtain the energy separation phenomena for a 12mm diameter VT. After gaining sufficient confidence level, optimization of the critical parameters like the air injection nozzle profile, number of nozzles, cold end orifice diameter dc, length to diameter (L/D) ratio, hot gas fraction etc of the VT was carried out through CFD and experimental studies. • The studies show that 6 convergent nozzles perform better in comparison to other configurations like circular helical, rectangular helical, 2 convergent and 6 straight nozzles. The studies also show that cold end orifice diameter (dc) plays an important role on energy separation and bring out the existence of secondary circulation flow with improper design of cold end orifice diameter. Through our studies, the effect of cold end diameter on the secondary circulation flow has been evaluated for the first time. Also, the mechanism of energy transfer in VT based on heat pump mechanism enabled by secondary circulation flow as suggested by some investigators has been evaluated in our studies. The studies show that cold end orifice diameter dc = 7mm is optimum for 12mm diameter VT, which matches fairly with the correlations given by other investigators. The studies confirms that CFD modeling carried out in this work is capable of selecting the correct dc value for a VT, without resorting to the empirical correlations as a design guide or a laborious experimental programme. • Through the CFD and experimental studies on different length to diameter (L/D) ratios and hot gas fractions, maximum hot gas temperature of 391K was obtained for L/D = 30 with hot gas fraction of 12-15 % and minimum cold gas temperature of 267K for L/D = 35 was obtained for cold gas fraction ≈ 60% (lowest cold gas fraction possible with the present experimental system). • CFD analysis has been carried out to investigate the variation of static and total temperatures, static and total pressures as well as the velocity components of the particles as it progresses in the flow field, starting from the entry through the nozzles to the exit of the VT by tracking the particles to understand the flow phenomenon and energy transfer mechanism inside the VT. The studies indicate that the mechanism of energy transfer from the core flow to the peripheral flow in VT is predominantly occurs by the tangential shear work. Thus the investigations reported in the thesis have given a clear understanding of the contributing mechanism for energy separation in VT, which has been an unresolved issue for long time. The net energy transfer between the core and the peripheral fluid has been calculated analytically and compared with the values obtained by CFD model for VTs of L/D ratios equal to 10 and 30. The net energy transfer by analytical and CFD model for VT with L/D = 10 is 159.87W and 154.2W respectively whereas the net energy transfer by analytical and CFD model for VT with L/D = 30 is 199.87W and 192.3W respectively. The results show that CFD results are in very good agreement with the analytical results and CFD can be used as a tool for optimization of the critical parameters and to analyze the flow parameters and heat transfer analysis for VTs. Also, the net energy transfer between the core and peripheral fluids calculated analytically matches very well with that of the net energy transfer by CFD analysis, without considering the effect of acoustic streaming. Thus acoustic streaming may not be the mechanism of energy separation in VT as suggested by some investigators. • By optimizing the critical parameters of the 12mm diameter straight VT through CFD and experimental studies, LOX separation studies have been carried out using both straight and conical VTs of dc = 7mm and of different L/D ratios for high LOX purity and separation efficiency. It is observed that conical (3º divergence) VTs perform better as compared to straight VTs for LOX separation whereas straight VTs perform better for energy separation. The better performance of conical VT as compared to straight VTs can be attributed to its increased surface area for condensation-evaporation phenomenon of oxygen and nitrogen molecules. Experimental studies have been conducted to evaluate the influence of the inlet pressure and the inlet temperature (liquid fraction) on LOX purity. Studies indicate that for achieving high LOX purity for the studied experimental system, the inlet pressure is to be in the range of 6-6.5bar and there exists a very narrow band of inlet temperature zone in which high LOX purity can be achieved. Experimental studies on VTs show that VT can be optimized suitably either for high LOX purity with low separation efficiency or low LOX purity with high separation efficiency by adjusting the hot end mass fraction accordingly. It is also observed that it is not possible to obtain both high purity and high separation efficiency simultaneously with the single VT. Staging approach has to be adapted to achieve higher LOX purity with higher separation efficiency. By staging the VTs, the enriched air stream (hot end outlet flow) from the first stage of VTs is introduced to the inlet of the second stage of VTs. Experimental studies have been conducted to evaluate the design parameters on staging of VTs. LOX purity of 48% with 89% separation efficiency has been achieved for conical first stage VT of L/D = 25. LOX purity of about 94% with separation efficiency of 84% has been achieved for 50% oxygen content at the inlet of the second stage VT. Similarly, LOX purity of 96% with separation efficiency of 73.5% has been achieved for 60% oxygen content at the inlet of the VT. This is the highest LOX purity and separation efficiency reported so far indicating that, conical VT of optimized diameter, L/D ratio and orifice diameter can yield the hot end flow very close to the target value of futuristic in-flight LOX separation based launch vehicles. The present investigation has focused the optimization of the critical parameters of VTs through CFD and experimental studies. It has also given an insight to the mechanism of energy transfer between the core and peripheral flow in VT by evaluating two of the existing theories on mechanism of energy transfer in VT. The studies also highlighted the fact that custom designed and precision fabricated VTs can be very useful for obtaining maximum / minimum temperatures of fluid flow as well as LOX separation with high purity and high separation efficiency needed for futuristic in-flight LOX separation based space launch vehicles.

Wilderness therapy, the practice of sending troubled young people into nature in order to re-socialize them, poses a paradox. Time spent in wilderness is imagined to produce civilizing effects on young people, rendering them better prepared to live responsible and productive lives in society. Study of wilderness therapy, therefore, provides insight into constructions of youth and nature in contemporary American society. This thesis emerges from ethnographic research conducted at Camp E-Wen-Akee, a therapeutic camping program for troubled youth, in Benson, Vermont, USA. In addition to living with the three groups of campers in their rustic camp sites and engaging in camp activities, I facilitated two camper-run research projects, and interviewed camp staff members, and the state social workers responsible for sending adjudicated youth to residential programs. I find that camp life is an achievement of many heterogeneous actors, some of whom are human and others nonhuman. The resulting work is an ethnography of a nature-culture, wherein I describe how the camp mobilizes various resources to create the conditions for therapeutic change. The differing nature narratives of campers and the adults indicated that expectations for nature are at least in part, outcomes of class processes. Close attention to camp life shows that therapy is a social strategy brought into being at a number of scales: the material body, built and temporal architectures, landscape, and 'public' wilderness outside of camp's borders. I find at each scale a tension between the ordering tactics deployed by camp staff members and resistance posed by campers and 'nature' alike. Campers' identities are meant to change as a result o f repeated performances of prosocial behavior, and the on-going circulation of success stories. Together these practices underscore that what one person does always has effects on others. The irony uncovered i n this research is that while troubled youth are sent to a nature imagined as separate from society, Camp E-Wen-Akee provides young people with an ecological model for social life. Wilderness therapy is the outcome not of a separation between nature and society, but of ongoing relations between the two. / Arts, Faculty of / Geography, Department of / Graduate