The thesis deals with possibilities for more precise determination of geographical position of given IP address by combination of estimates of data obtained from geolocation databases. The first part introduces the issue on theoretical level. Possibilities of network device identification, its geographical location and principles of geolocation databases are described here. After analyzing the theoretical part of this issue, the current state of application for geolocation databases is described. The next section introduces a new application which uses original software ip2geotools as a library. Using the three implemented methods for combining results (based on average, median, and cluster analysis by K-Means algorithm), the new program allows to estimate the physical location of IP address. The app is complemented with console interface and geographic data visualization on the map. In the last part, the accuracy of computational methods is validated and a detailed statistical analysis of data obtained by performing a calculation over a set of IP addresses with known geographical location of the RIPE Atlas service is performed.

In this dissertation, we present a number of studies that primarily focus on data movement challenges among different types of memories (viz., 3D-DRAM, DDRx DRAM and NVM) employed together as a flat-address heterogeneous memory system. We introduce two different hardware-based techniques for prefetching data from slow off-chip phase change memory (PCM) to fast on-chip memories. The prefetching techniques efficiently fetch data from PCM and place that data into processor-resident or 3D-DRAM-resident buffers without putting high demand on bandwidth and provide significant performance improvements. Next, we explore different page migration techniques for flat-address memory systems which differ in when to migrate pages (i.e., periodically or instantaneously) and how to manage the migrations (i.e., OS-based or hardware-based approach). In the first page migration study, we present several epoch-based page migration policies for different organizations of flat-address memories consisting of two (2-level) and three (3-level) types of memory modules. These policies have resulted in significant energy savings. In the next page migration study, we devise an efficient "on-the-fly'" page migration technique which migrates a page from slow PCM to fast 3D-DRAM whenever it receives a certain number of memory accesses without waiting for any specific time interval. Furthermore, we present a light-weight hardware-assisted address reconciliation process for address management of the migrated pages. Such an on-the-fly page migration with hardware-assisted address reconciliation technique provides significant performance improvement over systems using epoch-based page migration and OS-based address management. Finally, we have developed an analytical model, which employs offline analyses of memory access counts per page and recommends whether an application is migration friendly or not. This can be useful in deciding if page migration (either epoch-based or on-the-fly based) should be used or turned off for a given application. Thus, our data management techniques and model enable significant performance improvements for flat-address heterogeneous memory systems involving NVMs.

It has always been the tendency of the human race to look with skepticism upon that which is new. Just so has it been with the progress of radio in the school. There are those who dismiss the whole matter as impractical or visionary and there are others who even have the teachers replaced with the loudspeakers. The experienced educator will take a stand between these two and be alert to new devices and techniques which will enable him to administer his school more effectively.

Microarchitectural simulation is needed to help explore the large design space of new computer systems. These simulations are taking increasingly longer amounts of time to run due to the increasing complexity of modern processors. Co-simulation and high level synthesis are promising fields to improve the overall time required for microarchitectural simulators, and can contribute to low design times and fast simulation speeds permitting a larger range of design space exploration. While promising, co-simulation techniques must find effective ways to map the host memory address space to the FPGA memory address space to be able to correctly transfer simulation data between the host and FPGA. Load relations mapping is a new technique that builds upon existing techniques to provide support for the discovery and translation of runtime memory addresses to their equivalent FPGA memory addresses. This is accomplished by storing object reachability information discovered during a memory profiling run and later using it to recreate an object reachability mapping at runtime. This mapping can be traversed to discover needed memory addresses. We demonstrate how this technique can be used by incorporating it into the FAMEbuilder tool flow. Results show that simulation speed is not reduced and that only a small overhead is required to perform the additional memory initialization at the start of simulation. Area increases are also shown and are limited to near 10\% increase on small single core models.

Processor address traces are invaluable for characterizing workloads and testing proposed memory hierarchies. Long traces are needed to exercise modern cache designs and produce meaningful results, but are difficult to collect with hardware monitors because microprocessors access memory too frequently for disks or other large storage to keep up. The small, fast buffers of the monitors fill quickly; in order to obtain long contiguous traces, the processor must be stopped while the buffer is emptied. This halting may perturb the traces collected, but this cannot be measured directly, since long uninterrupted traces cannot be collected. We make the case that hardware performance counters, which collect runtime statistics without influencing execution, can be used to measure halting effects. We use the performance counters of the Pentium 4 processor to collect statistics while halting the processor as if traces were being collected. We then compare these results to the statistics obtained from unhalted runs. We present our results in terms of which counters are affected, why, and what this means for trace-collection systems.

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Thesis(M.A.(Translation Studies and Linguistics)) -- University of Limpopo, 2022 / The aim of this study was to explore the forms of address and terms of reference used by students to address their lecturers at the University of Limpopo. The study discovered that, there were many ways in which forms of address and terms of reference are used. The theory of pronouns of power and solidarity by Brown and Gilman (1960) is implemented. Data are collected using face-to-face and telephone interviews from a sample of fifteen (15) University of Limpopo postgraduate students majoring in languages and linguistics in Turfloop, Limpopo, South Africa, however, ten (10) participants satisfied the notion of data saturation. This is because the participants were giving slightly similar information. The study found that there are two types of forms of address which are used by the University of Limpopo students which are Names and Titles. Addressing lecturers by first name, last name, nickname or title plus first name symbolises closer relationship between student and lecturers whereas, addressing lecturers by title only or title plus last name represents a limited relationship between the lecturer and student. It is found that most of postgraduate students address lecturers depending on the relationship existing between them and the lecturers. It has been found that, the factors that influence choice of forms of address are setting, respect, degree of intimacy, age and culture; and factors that influence the use of terms of reference are setting and respect. The data obtained reveal that undergraduate students, especially first years are not aware of the importance of forms of address. And it has been found that students promote the idea of the implementation of a rule(s) or policy regarding the importance of forms of address.

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