Conselho Nacional de Desenvolvimento Científico e Tecnológico / This work presents the implementation and analysis of a system devoted to the extraction and recognition of optical characters which is based on the hardware and software co-design methodology and built over a reconfigurable platform. Since vision is a very important sense, the research in the field of artificial vision systems has been carried out since the very beginning of the digital era, in the early 60 s. Taking into account the recent evolution experienced by the configurable computing area, a new tendency of research and development of heterogeneous artificial vision systems emerges. Among the main benefits provided by the so called systems on chip are the reduction of power dissipation, financial costs and physical area. In this sense, taking a License Plate Recognition System (LPRS) as a case study, the focus of this work is the implementation of the character localization and recognition steps, while the partitioning of hardware and software resources is based in costbenefit heuristics. Initially, a software-only version of the system is build over an x86 platform. More than to allow the evaluation of several character localization related methods, this software-only version is also intended to be used as parameter of comparison for the embedded version of the system. Regarding the character recognition step, it is performed by the means of an Artificial Neural Network. Based on the results provided by the software-only evaluation system, the implementation of the embedded version is performed, considering an FPGA as platform. In this embedded version, the character localization step consists of a dedicated hardware block, while the character recognition step comprises a piece of software executed in a microprocessor that is physically implemented inside the FPGA. Taking into account a 10 times higher frequency of operation for the processor of the x86 platform, as well as the fact that most of the embedded hardware block employs a clock frequency smaller or equal to 25 MHz, the most noticeable result is the 2.25 times faster speed of processing achieved by the embedded version. Regarding the plate recognition capability, both systems have the same performance, being able to successfully recognize plates in 51.62 % of the cases (considering the best case). Beyond LPRSs, the system developed here could also be employed to build other applications that require optical character recognition features, such as automatic traffic signs recognition and serial number reading of items in a production line. / Este trabalho apresenta a implementação e análise de um sistema voltado à extração e reconhecimento de caracteres ópticos a partir do co-projeto de hardware e software sobre uma plataforma reconfigurável. Por conta da importância atribuída ao sentido da visão, sistemas artificiais capazes de emular as tarefas envolvidas neste processo biológico têm sido alvo de pesquisas desde o surgimento dos primeiros computadores digitais, na década de 60. Tendo em vista a recente evolução experimentada na área da computação configurável, surge uma tendência natural à pesquisa e desenvolvimento de sistemas heterogêneos (compostos por uma combinação de blocos de hardware e software) de visão artificial baseados em tal plataforma. Dentre os principais benefícios proporcionados por sistemas em chip podem ser citados a redução no consumo de potência, custos financeiros e área física. Neste sentido, tomando como estudo de caso um Sistema de Reconhecimento de Placas de Licenciamento Veicular (SRPLV), o foco do trabalho está situado na implementação das etapas de localização e reconhecimento de caracteres, sendo o particionamento dos blocos de hardware e software baseado em heurísticas de custo-benefício. Inicialmente é realizada a implementação de uma versão totalmente em software do sistema aqui proposto, sobre plataforma x86, no intuito de avaliar os diversos métodos passíveis de implementação, bem como o de possibilitar um parâmetro de comparação com a versão embarcada do sistema. Os métodos avaliados dizem respeito à etapa de localização de caracteres, haja vista a definição à priori do emprego de Redes Neurais Artificiais no reconhecimento dos mesmos. A partir dos resultados obtidos por esta avaliação é realizada a implementação da versão embarcada do sistema, tendo como plataforma um FPGA. Nesta versão, a etapa de localização de caracteres é implementada como um bloco dedicado de hardware, enquanto a de reconhecimento constitui-se num software executado sobre um microprocessador fisicamente embutido no interior do FPGA. Considerando uma freqüência de operação 10 vezes superior para o processador da plataforma x86, bem como o fato da maior parte do hardware embarcado utilizar um clock menor ou igual a 25 MHz, o principal resultado consiste no ganho de 2,25 vezes no tempo de execução obtido na segunda versão do sistema. No tocante à capacidade de reconhecimento de placas, os sistemas são equivalentes, sendo capazes de reconhecê-las corretamente em 51,62% das vezes, no melhor caso. Além de SRPLVs, o sistema aqui desenvolvido pode ser empregado na criação de outras aplicações que envolvam a problemática do reconhecimento de caracteres óticos, como reconhecimento automático de placas de trânsito e do número de série de itens numa linha de produção.

Made available in DSpace on 2014-06-12T15:58:27Z (GMT). No. of bitstreams: 2 arquivo4484_1.pdf: 6966497 bytes, checksum: 24a281b3de8ed514a81a117af5c76238 (MD5) license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2004 / A maioria dos sistemas electrônicos modernos consiste em hardware dedicado e componentes programáveis (chamados componentes de software). Ao longo dos últimos anos, o número de metodologias que aplicaram simultaneamente técnicas de diferentes áreas para desenvolver sistemas mistos de hardware e software tem crescido consideravelmente. Projetos concorrentes de sistemas mistos de hardware/software têm mostrado ser vantajoso quando considerado como um todo ao invés de se considerar entidades independentes. Hoje em dia, o mercado eletrônico demanda sistemas de alto desempenho e de baixo custo. Estes requisitos são essenciais para a competitividade de mercado. Além disso, um curto time-to-market é um fator importante. A demora no lançamento do produto causa sérias reduções no lucro, desde que é mais simples vender um produto quando se tem pouca ou nenhuma competição. Isto significa que facilitando o re-uso de projetos anteriores, uma rápida exploração de projeto, análise/verificação qualitativa em fases iniciais do projeto, prototipação e a redução do tempo requerido para testes, reduzem o tempo global exigido de uma especificação até o produto final. Ao projetar tais sistemas mistos de hardware/software, a análise de alternativas de projeto e a decisão de onde implementar cada parte de sistema, isto é, em hardware ou em software, são tarefas muito importantes. A estimativa de métricas de qualidade permite a exploração do espaço de projeto e pode guiar a decisão de implementação de partes do sistema. Tais métricas são calculadas no nível de sistema, ou seja, sem implementação real. Conseqüentemente, tais estimativas também aceleraram o projeto do sistema e permitem a análise de restrições de projeto, fornecendo uma retroalimetação para decisões de projeto. As redes de Petri são técnicas de especificação formal que permitem uma representação gráfica e matemática. Têm métodos poderosos que permitem aos projetistas realizar análises qualitativa e quantitativa. Redes de Petri Timed, são extensões de redes de Petri nas quais as informações de tempo são expressas por duração (rede com tempo determinístico, política de disparo em três fases) e são associadas às transições. Para uma descrição comportamental de alto nível, o projeto de hardware é dividido em classes de blocos funcionais: caminho de dados e controladores. O caminho de dados consiste em três tipos de componentes RT: unidades de armazenamento (registradores e latches), unidades funcionais (ALUS e comparadores), e unidades de interconexão (multiplexadores e barramentos). As unidades de armazenamento são requeridas para armazenar valores de dados como constantes, variáveis e vetores no comportamento. As unidades funcionais são necessárias para implementar as operações no comportamento. Após todas as variáveis e operações no comportamento terem sido mapeadas às unidades de armazenamento e funcionais, respectivamente, podemos estimar o número de unidades de interconexão, como os barramentos e multiplexadores, os quais são requeridos para interligar as unidades de armazenamento e funcionais. Este trabalho propõe uma abordagem para estimar a área de hardware a partir do número de unidades de armazenamento, funcionais e de interconexão, levando-se em consideração restrições de tempo e dependência de dados, e estende alguns trabalhos anteriores com o objetivo de melhorar a precisão dos métodos de estimativa de área. Isto é, o método proposto considera uma rede de fluxo de dados que captura dependência de dados e calcula a área do caminho de dados a partir do número e tipo dos seus componentes, considerando a relação de dependência temporal

Ce mémoire présente une étude sur le processus du co-design dans le contexte d’un projet d’architecture d’intérieur mené avec des acteurs multidisciplinaires. Nous nous sommes intéressés principalement sur la méthode de participation des acteurs lors du déroulement du processus. Le but de cette recherche est de mieux comprendre les rôles des différents intervenants en co-conception selon leurs disciplines et en contexte des différents outils représentationnels utilisés. Le projet du réaménagement de la bibliothèque HEC Montréal a été utilisé pour cette étude où trois groupes de participants multidisciplinaires, composés d'architectes, professeurs, bibliothécaires, professionnels, gestionnaires, étudiants et designers, on été mobilisés. Nous avons effectué l’observation de ces trois groupes lors de l’idéation, où les conversations, les comportements et les activités des participants ont été observés et analysés. Les résultats suggèrent une différence importante entre les rôles des participants multidisciplinaires en fonction de l’utilisation des outils représentationnels traditionnels et numériques. Nous avons trouvé que la multidisciplinarité est principalement plus importante dans les premières phases des conversations de design, et que les phases les plus avancées davantage font plus appel aux connaissances des disciplines en question. À travers les différents rôles des participants, les résultats proposent aussi l’apparition de deux types de hiérarchie communicationnelle et créative. À partir de ces résultats, cette étude apporte de nouvelles pistes de recherche qui pourront bonifier davantage l'approche du co-design en architecture d’intérieur et en design en général. / This paper presents a study on the co-design process in the context of an interior design project with multidisciplinary stakeholders. We focused mainly on the method of participation of stakeholders in the process flow. The purpose of this research is to better understand the roles of different stakeholders in co-design according to their disciplines and in context of different representational tools. The project of the redevelopment of the library HEC Montreal was used for this study where three multidisciplinary groups of participants were mobilized composed of architects, teachers, librarians, professionals, managers, students and designers. We conducted the observation of these three groups during the ideation, where conversations, behaviours and activities of the participants were observed and analyzed. The results suggest a significant difference between the muldisciplinary participants roles based on the use of representational tools, the involvement of the multidisciplinary nature mainly in the earlier phases of collaborative ideation; two types of hierarchies (communicational and creative) emerged from the different roles of the participants. From these results, this study may provide new avenues of research that could further enhance the approach of co-design.

This research investigates the potential of the general public to actively design their own products and let consumers either manufacture by themselves or send the files to manufacturers to be produced. This approach anticipates the rapid growth of fabrication technology, particularly in Additive Manufacturing (AM)/3D printing. Recent developments in the field of AM/3D printing have led to renewed interest in how to manufacture customised products and in a way that will allow consumers to create bespoke products more easily. These technologies can enhance the understanding of non-technology compliant consumers and bring the manufacturing process closer to them. Consequently, to make AM/3D printing more accessible and easier to employ by the general public, design aspects need to be developed to be as simple to operate in the same manner as AM/3D printing technologies. These technologies will then attract consumers who want to produce Do-It-Yourself (DIY) products. This study suggests a Computer-aided Consumer Design (CaCODE) system as user- friendly design software to simplify the Computer Aided Design (CAD) stages that are required to produce 3D model data required by the AM/3D printing process. This software will be an easy-to-operate design system where consumers interact with parameters of designed forms easily instead of operating conventional CAD. In addition, this research investigates the current capabilities of AM/3D printing technologies in producing consumer products. To uncover the potential of consumer-led design and manufacturing, CaCODE has been developed for consumer evaluation, which is needed to measure the appropriateness of the tool. In addition, a range of consumer product samples as pens has been built using a range of different materials, AM/3D printing technologies and additional post-processing methods. This was undertaken to evaluate consumer acceptance of the AM/3D printed product based on products perceived quality. Forty non-designer participants, 50% male and 50% female, from 5 to 64 years old, 6-7 participants per ten-year age groups in 6 groups, were recruited. The results indicated that 75% of the participants would like to design their own product using consumer design software. The study compared how consumers interacted with the 3D model to manipulate the shape by using two methods: indirect manipulation (sliders) and direct manipulation (drag points). The majority of the participants would prefer to use the direct manipulation because they felt it was easy to use and enabled them to enjoy the design process. The study concluded that the direct manipulation was more acceptable because it enabled users to touch the digital product and manipulate it, making it more intuitive and natural. The research finds that there is a potential for consumers to design a product using user-friendly design tools. Using these findings, a consumer design tool concept was created for future development. The study indicated that 53% of participants would like to use products made by AM/3D printing although they still wanted the surface finish of injection moulded parts. However, the AM/3D printing has advantages that can fulfil the participants preference such as multi-materials from the material jetting method and it is proved that additional post-processing can increase participants acceptance level.

Varje år slänger svensken 74 kilo mat per person. För att förstå vad och varför vi slänger mat gick jag igenom vad ett hyreshus slänger i soprummet. Bland den slängda maten kunde jag se att de boende äter mycket ägg och tillsammans med de boende bestämde vi oss för att dem skulle testa att bli hönsägare. I mitt designarbete har jag designat ett modulärt hönshus och ett driftsystem för att de boende i hyreshuset tillsammans ska ta hand om höns och ge sina matrester till hönorna. Jag har undersökt vad de boende behöver för skapa gemenskap kring huset och på bäst sätt sköta driften. Med insikter från denna prototyp designade ytterligare ett modulärt hönshus, denna gång matas hönsen på Konstfack med Konstfacks restaurangs matrester. Jag kallar projektet ”The urban hens” och vill med detta projekt skapa en social mötesplats och verka för en mer cirkulär matekonomi som kan öka förståelse för matens värde.

V této práci je navrhnut energeticky úsporný procesor typu TTA (Transport Triggered Architecture) pro výpočet rychlé Fourierovy transformace (FFT). Návrh procesoru byl vytvořen na míru použitému algoritmu pomocí speciáoních funkčních jednotek. Algoritmus byl realizován jako posloupnost instrukcí tak, že většina výpočtu probíhá ve smyčce obrahující pouze jedionu paralelní instrukci. Tato instrukce je umístěna do instrukčního bufferu, odkud je potom volána místo instrukční paměti. Díky tomu se dá docílit nižší spotřeby, neboť volání z instrukčního bufferu je efektivnější než volání z instrukční paměti. Program byl zkompilován na časovém modelu procesoru a časová simulace potvrdila správnost návrhu. Součástí práce jsou rovněž pomocné programy v Pythonu, které slouží ke generaci referenčních výsledků a automatické simulaci a porovnání výsledků simulace s referencí.

Ce travail de thèse explore les aspects organisationnels de l’accompagnement local de la transition agroécologique. Cet accompagnement nécessite d’articuler différents processus individuels et collectifs de transformation des activités de la production et du développement agricole. En construisant un dispositif de recherche-action au sein d’un projet de transition agroécologique porté par une association d’éleveurs et conseillers dans le rayon de Roquefort, nous mettons en oeuvre avec eux une forme d’expérimentation sociale qui nous permet de comprendre le problème de l’accompagnement de la transition à la fois sur le plan théorique et pratique. Dans notre cas, l’articulation des transformations individuelles et collectives a été permise par un travail de co-conception entre éleveurs et conseillers des outils de l’accompagnement des changements dans les fermes. Ce processus a permis de débattre de la diversité des modèles agricoles et des représentations des acteurs de la transition agroécologique au sein du groupe, ainsi que d’engager conjointement éleveurs et conseillers dans la transformation de leurs pratiques. Ces transformations ont été d'autant plus facilitées que la coconception a été envisagée comme un processus dialogique entre conception et expérimentation dans différentes situations réelles d’usage dans les fermes. A l’issue de ce travail, nous proposons une approche pragmatiste pour accompagner localement la transition agroécologique / We explore in this research the organizational dimensions of agroecological transition and the ways to support it locally. The support of agroecological transition requires connecting differentprocesses of individual and collective transformations of agricultural development and production activities. We design a device for action reseach within an agroecological transition project, carriedby a farmers and advisers association in the Roquefort area. We implement with them a social experiment to explore this problem both from theoretical and practical point of view. In our casethe connection between individual and collective transformation of participant activities required farmers and advisers to design together tools to accompany the agroecological transition on farms. This process allowed the debate about the diversity of agricultural models and representations that actors have regarding agroecological transition. It as well allows engaging advisers and farmers jointly in the agroecological transition. These transformations have been enhanced by the fact that the co-design process was organized as a dialogical process between design and experimentation of the tools in diverse real situations of use on farms. At the end of this journey, we propose to develop a pragmatist approach to accompany locally the agroecological transition

No description available.

<p>  </p> <p>By means of this dissertation we bring to light that FETs (that are either Si or 2D-TMD based) when coupled with piezoelectric or ferroelectric materials can offer attractive solutions such as (i) technology scaling, (ii) non-volatile memory functionality and (iii) beyond-von-Neumann computing paradigms that address the limitations of current architectures. Our efforts encompass the domains of steep switching devices, non-volatile memories, computation-in-memory and non-Boolean computing, wherein we explore devices embedded with piezoelectric (strain-based) and ferroelectric (polarization-based) properties and propose novel circuits based on them, while focusing on understanding their device-circuit interactions and system implications.</p>

Deep Neural Networks are widely applied to various kinds of fields nowadays. However, hundreds of thousands of neurons in each layer result in intensive memory storage requirement and a massive number of operations, making it difficult to employ deep neural networks on mobile devices where the hardware resources are limited. One common technique to address the memory limitation is to prune and quantize the neural networks. Besides, due to the frequent usage of Rectified Linear Unit (ReLU) function or network pruning, majority of the data in the weight matrices will be zeros, which will not only take up a large amount of memory space but also cause unnecessary computation operations. In this thesis, a new value-based compression method is put forward to represent sparse matrix more efficiently by eliminating these zero elements, and a customized hardware is implemented to realize the decompression and computation operations. The value-based compression method is aimed to replace the nonzero data in each column of the weight matrix with a reference value (arithmetic mean) and the relative differences between each nonzero element and the reference value. Intuitively, the data stored in each column is likely to contain similar values. Therefore, the differences will have a narrow range, and fewer bits rather than the full form will be sufficient to represent all the differences. In this way, the weight matrix can be further compressed to save memory space. The proposed value-based compression method reduces the memory storage requirement for the fully-connected layers of AlexNet to 37%, 41%, 47% and 68% of the compressed model, e.g., the Compressed Sparse Column (CSC) format, when the data size is set to 8 bits and the sparsity is 20%, 40%, 60% and 80% respectively. In the meanwhile, 41%, 53% and 63% compression rates of the fully-connected layers of the compressed AlexNet model with respect to 8-bit, 16-bit and 32-bit data are achieved when the sparsity is 40%. Similar results are obtained for VGG16 experiment. / Djupa neurala nätverk används i stor utsträckning inom olika fält nuförtiden. Emellertid ställer hundratusentals neuroner per lager krav på intensiv minneslagring och ett stort antal operationer, vilket gör det svårt att använda djupa neurala nätverk på mobila enheter där hårdvaruresurserna är begränsade. En vanlig teknik för att hantera minnesbegränsningen är att beskära och kvantifiera de neurala nätverken. På grund av den frekventa användningen av Rectified Linear Unit (ReLU) -funktionen eller nätverksbeskärning kommer majoriteten av datat i viktmatriserna att vara nollor, vilket inte bara tar upp mycket minnesutrymme utan också orsakar onödiga beräkningsoperationer. I denna avhandling presenteras en ny värdebaserad komprimeringsmetod för att representera den glesa matrisen mer effektivt genom att eliminera dessa nollelement, och en anpassad hårdvara implementeras för att realisera dekompressions- och beräkningsoperationerna. Den värdebaserade komprimeringsmetoden syftar till att ersätta icke-nolldata i varje kolumn i viktmatrisen med ett referensvärde (aritmetiskt medelvärde) och de relativa skillnaderna mellan varje icke-nollelement och referensvärdet. Intuitivt kommer data som lagras i varje kolumn sannolikt att innehålla liknande värden. Därför kommer skillnaderna att ha ett smalt intervall, och färre bitar snarare än den fullständiga formen kommer att räcka för att representera alla skillnader. På så sätt kan viktmatrisen komprimeras ytterligare för att spara minnesutrymme. Den föreslagna värdebaserade komprimeringsmetoden minskar minneslagringskravet för de helt anslutna lagren av AlexNet till 37%, 41%, 47% och 68% av den komprimerade modellen, t.ex. Compressed Sparse Column (CSC) format, när datastorleken är inställd på 8 bitar och sparsiteten är 20%, 40%, 60% respektive 80%. Under tiden uppnås 41%, 53% och 63% komprimeringshastigheter för de helt anslutna lagren i den komprimerade AlexNet-modellen med avseende på 8- bitars, 16-bitars och 32-bitars data när sparsiteten är 40%. Liknande resultat erhålls för VGG16-experiment.