This master thesis presents an exploration of participatory workshops. It focuses on how these may involve a design project’s various stakeholders, and take the design process further by joint activities of mutual learning. The main concern addressed in the thesis is how participatory workshops may be designed and carried through, together with companies working with design. The aim of the exploration is to gain an understanding of the various steps of the design and implementation of workshops, and also how these steps interact during the process. The exploration is mainly based on the design and implementation of three different workshops: One workshop was designed on behalf of a design consultancy as part of the phase of concept, in an ongoing design project about cleaning products. Afterwards the team worked on ideas based on the winning concepts from this workshop. A second workshop was designed for a working team at a company of wood floor production, in order to identify what future steps to take. The outcome emphasized what the team needed as well as desired to be working on next. In collaboration with the same wood floor producer, a third workshop was also designed as a part of the company’s design competition. This workshop aimed to making the competitors share their personal experiences of the theme of the competition. The workshop resulted in a joint creation of understanding and knowledge about the company’s demands and desires of the new product. In order to broaden my perspective on the method, I carried out a number of interviews, for example with MiL Institute, who is working with management training and coaching, and with Ordrum, who offers training in communication. To support mutual learning in the workshops, aspects of knowledge and learning are additionally included in the study. The exploration shows the advantage of using prepared ambiguous materials as part of the framework of a workshop, for supporting divergent thinking; individual and collective storytelling; diversity of ideas; and collaboration between people. Additionally the exploration indicates that people’s involvement in participatory workshops may create more responsibility of the design, through the experience of a shared ownership of the process. Moreover, it points out the challenge of working co-creationally in design work, also through the design process of workshops.

La estimación y verificación de las prestaciones de los diseños de sistemas embebidos de la forma más rápida posible al principio del proceso de diseño es un hito de gran importancia. Por ello, esta tesis propone una nueva solución basada en simulación por anotación de código fuente, que a costa de algo de precisión, permite realizar simulaciones muy rápidas con un mínimo esfuerzo de diseño. La primera tarea realizada en esta tesis ha sido extender el lenguaje SystemC para incluir primitivas de un sistema operativo de tiempo real(RTOS) que permiten la ejecución y el refinado de módulos software. La segunda parte de la tesis se ha centrado en la generación de una librería capaz de obtener datos dinámicamente sobre las prestaciones temporales de dichos sistemas a partir del código fuente, para poder verificar el cumplimiento de las características requeridas. Junto con los elementos SW se han desarrollado componentes SystemC de alto nivel capaces de modelar los elementos principales de un sistema embebido, como buses, memorias, redes de comunicaciones, etc. Por último se han desarrollado los componentes necesarios para poder incluir toda esta infraestructura en procesos de exploración automática del proceso de diseño, de forma que en base a descripciones iniciales del sistema en formato XML. La infraestructura de simulación y estimación de rendimiento ha sido desarrollada y probada en diversos proyectos europeos. / Estimating and verifying system performance of embedded designs at the beginning of the design process is a very important task. Fast estimation tools are required in order to evaluate different design possibilities, such as HW/SW partitioning or resource allocation, to verify the fulfillment of the system constraints, or to support design space exploration flows. In this context, the thesis proposes a tool capable of simulating embedded systems using source code annotation. As a consequence, fast estimations are obtained with minimal design effort, obtaining an adequate accuracy. For developing such tool several tasks has been performed. First, the SystemC language has been extended to provide the designer with a model of a real-time operating system. This model enables the correct simulation, scheduling and debugging of embedded SW. The second element added is an infrastructure capable of estimating and annotating performance information for each basic block in the source code. This infrastructure enables obtaining timed simulations of the SW. Additionally generic TLM elements have been developed to enable creating models of the HW platforms. Finally, additional components has been developed to use the proposed tool in a complete Design Space Exploration flow. The simulation infrastructure has been developed and checked in several European projects, and in collaboration with private companies.

Augmented Reality (AR) is a recent technology that allows a seamless composition between virtual objects and the real world. This practice-based research uses the affordances of AR to design an AR textbook for collaborative learning experience. It identifies the key concepts of children s AR textbooks for the designing and evaluation of collaborative learning experiences. These concepts were used to develop a conceptual framework for the AR textbook that considers collaborative experience, learning and usability. Informed by these concepts, the research also has identified the design features which are unique to AR affordances which can be integrated in the school textbooks to develop a collaborative AR textbook for primary school children. The research follows a participatory design approach to involve the users of the AR textbook in the design process. The researcher has conducted three co-design studies involving primary school children and adults using cooperative inquiry techniques. The first study uses low-tech prototyping to find the overall direction of designing the AR textbook. After the development of the first AR textbook prototype, two formative evaluations have been conducted using cooperative inquiry critiquing, and layered elaboration techniques. Throughout these studies, a conceptual framework has been developed namely, Experience, Learn and Use (ELU) for the designing and evaluation of children s AR textbooks for collaborative learning experience. This framework is based on the adaption of Janet Read s Play, Learn, Use (PLU) model that defines children s relationships with the interactive technologies. The research proposes the ELU framework as a useful classification framework in the evaluation process, which informs the design features of the AR textbook which are related to the concepts of collaborative experience, learning and usability. The practical component of the thesis proposes a sample of an AR textbook that is integrated in the regular school curriculum. It demonstrates the design features which can be implemented in other textbooks to support collaborative learning experiences for primary school children. The documentation of the co-design process provides a practical framework for co-designing an AR textbook with children, as well as an evidence of using the ELU framework in practice. 4 This research also contributes in bridging the gap between AR and Child-Computer Interaction (CCI) communities, through the use of common CCI methods in the AR development. This research has resulted in key design principles which contribute original knowledge to the literature of the AR for children s education considering the CCI perspective. These important principles are informed by the collaborative experiences, learning and usability aspects that establish a framework for the design and evaluation of collaborative AR textbook for children. The eight identified principles by this research are, Joint Textbooks, Personalised AR Experience, Interactive AR Book, Communication-Based Learning, Rewarding AR feedback, Audio AR Textbook, Intuitive AR Markers, and Mutual AR Display. The research introduces the definition for each of the concepts and a demonstration of the related design features in the outcome of the AR textbook prototype.

La conception des systèmes de contrôle embarqués devient de plus en plus complexe en raison des algorithmes utilisés, de l'augmentation des besoins industriels et de la nature des domaines d'applications. Une façon de gérer cette complexité est de concevoir les contrôleurs correspondant en se basant sur des plateformes numériques puissantes et ouvertes. Plus précisément, cette thèse s'intéresse à l'utilisation des plateformes FPGA System-on-Chip (SoC) pour la mise en œuvre des algorithmes d'entraînement électrique pour des applications avioniques. Ces dernières sont caractérisées par des difficultés techniques telles que leur environnement de travail (pression, température élevée) et les exigences de performance (le haut degré d'intégration, la flexibilité). Durant cette thèse, l'auteur a contribué à concevoir et à tester un contrôleur numérique pour un variateur de vitesse synchrone qui doit fonctionner à 200 °C de température ambiante. Il s'agit d'une commande par flux orienté (FOC) pour une Machine Synchrone à Aimants Permanents (MSAP) associée à un capteur de type résolveur. Une méthode de conception et de validation a été proposée et testée en utilisant une carte FPGA ProAsicPlus de la société Actel/Microsemi. L'impact de la température sur la fréquence de fonctionnement a également été analysé. Un état de l'art des technologies basées sur les SoC sur FPGA a été également présenté. Une description détaillée des plateformes numériques récentes et les contraintes en lien avec les applications embarquées a été également fourni. Ainsi, l'intérêt d'une approche basée sur SoC pour des applications d'entrainements électriques a été démontré. D'un autre coté et pour profiter pleinement des avantages offertes par les SoC, une méthodologie de Co-conception matériel-logiciel (hardware-software (HW-SW)) pour le contrôle d'entraînement électrique a été proposée. Cette méthode couvre l'ensemble des étapes de développement de l'application de contrôle à partir des spécifications jusqu'à la validation expérimentale. Une des principales étapes de cette méthode est le partitionnement HW-SW. Le but est de trouver une combinaison optimale entre les modules à mettre en œuvre dans la partie logiciel et celles qui doivent être mis en œuvre dans la partie matériel. Ce problème d'optimisation multi-objectif a été réalisé en utilisant l'algorithme de génétique, Non-Dominated Sorting Genetic Algorithm (NSGA-II). Ainsi, un Front de Pareto des solutions optimales peut être déduit. L'illustration de la méthodologie proposée a été effectuée en se basant sur l'exemple du régulateur de vitesse sans capteur utilisant le filtre de Kalman étendu (EKF). Le choix de cet exemple correspond à une tendance majeure dans le domaine des contrôleurs embraqués pour entrainements électriques. Par ailleurs, la gestion de l'architecture du contrôleur embarqué basée sur une approche SoC a été effectuée en utilisant un système d'exploitation temps réel. Afin d'accélérer les services de ce système d'exploitation, une unité temps réel a été développée en VHDL et associée au système d'exploitation. Il s'agit de placer les services d'ordonnanceur et des processus de communication du système d'exploitation logiciel au matériel. Ceci a permis une accélération significative du traitement. La validation expérimentale d'un contrôleur du courant a été effectuée en utilisant un banc de test du laboratoire. Les résultats obtenus prouvent l'intérêt de l'approche proposée. / Designing embedded control systems becomes increasingly complex due to the growing of algorithm complexity, the rising of industrials requirements and the nature of application domains. One way to handle with this complexity is to design the corresponding controllers on performing powerful and open digital platforms. More specifically, this PhD deals with the use of FPGA System-on-Chip (SoC) platforms for the implementation of complex AC drive controllers for avionic applications. These latters are characterized by stringent technical issues such as environment conditions (pressure, high temperature) and high performance requirements (high integration, flexibility and efficiency). During this thesis, the author has contributed to design and to test a digital controller for a high temperature synchronous drive that must operate at 200°C ambient. It consists on the Flux Oriented Controller (FOC) for a Permanent Magnet Synchronous Machine (PMSM) associated with a Resolver sensor. A design and validation method has been proposed and tested using a FPGA ProAsicPlus board from Actel-Microsemi Company. The impact of the temperature on the operating frequency has been also analyzed. A state of the art FPGA SoC technology has been also presented. A detailed description of the recent digital platforms and constraints in link with embedded applications was investigated. Thus, the interest of a SoC-based approach for AC drives applications was also established. Additionally and to have full advantages of a SoC based approach, an appropriate HW-SW Co-design methodology for electrical AC drive has been proposed. This method covers the whole development steps of the control application from the specifications to the final experimental validation. One of the main important steps of this method is the HW-SW partitioning. The goal is to find an optimal combination between modules to be implemented in software and those to be implemented in hardware. This multi-objective optimization problem was performed with the Non-Dominated Sorting Genetic Algorithm (NSGA-II). Thus, the Pareto-Front of optimal solution can be deduced. The illustration of the proposed Co-design methodology was made based on the sensorless speed controller using the Extended Kalman Filter (EKF). The choice of this benchmark corresponds to a major trend in embedded control of AC drives. Besides, the management of SoC-based architecture of the embedded controller was allowed using an efficient Real-Time Operating System (RTOS). To accelerate the services of this operating system, a Real-Time Unit (RTU) was developed in VHDL and associated to the RTOS. It consists in hardware operating system that moves the scheduling and communication process from software RTOS to hardware. Thus, a significant acceleration has been achieved. The experimentation tests based on digital current controller were also carried out using a laboratory set-up. The obtained results prove the interest of the proposed approach.

Designing for Social Impact is an approach of social sustainability that presents an alternative way to improve living conditions in low income communities, of low income countries, by providing solutions that will enable them to meet their basic needs. Some current methods and tools used by social designers are focused on specific social aspects and often fail to engage communities to participate actively in the design processes. A non-linear Design Research Method was used to engage experts from the Design for Social Impact sector, Product Service System “PSS”, and social designers. A case study based in Gambia was used to study if “PSS” could encourage social designers to co-design with these communities as a way to promote positive solutions. Thus, strategic actions were collected from the research findings as a way to promote co-designing with involved stakeholders in low income communities. / ING/School of Engineering +46 455 38 50 00

<p>This thesis proposes SoPC (System on a Programmable<br />Chip) architectures for efficient embedding of vison-based<br />localization and obstacle detection tasks in a navigational<br />pipeline on autonomous mobile robots. The obtained<br />results are equivalent or better in comparison to state-ofthe-<br />art. For localization, an efficient hardware architecture<br />that supports EKF-SLAM&#39;s local map management with<br />seven-dimensional landmarks in real time is developed.<br />For obstacle detection a novel method of object<br />recognition is proposed - detection by identification<br />framework based on single detection window scale. This<br />framework allows adequate algorithmic precision and<br />execution speeds on embedded hardware platforms.</p> / <p>Ova teza bavi se dizajnom SoPC (engl. System on a<br />Programmable Chip) arhitektura i algoritama za efikasnu<br />implementaciju zadataka lokalizacije i detekcije prepreka<br />baziranih na viziji u kontekstu autonomne robotske<br />navigacije. Za lokalizaciju, razvijena je efikasna<br />računarska arhitektura za EKF-SLAM algoritam, koja<br />podržava skladi&scaron;tenje i obradu sedmodimenzionalnih<br />orijentira lokalne mape u realnom vremenu. Za detekciju<br />prepreka je predložena nova metoda prepoznavanja<br />objekata u slici putem prozora detekcije fiksne<br />dimenzije, koja omogućava veću brzinu izvr&scaron;avanja<br />algoritma detekcije na namenskim računarskim<br />platformama.</p>

The Master thesis is focused on creation of an editor of CodAL language for the development toolkit of the project Lissom which is based on Eclipse framework. The goal of this thesis is to analyze the problem of editor creation and the features in existing editors which add some value to their usability. The outline of parser creation and subsequent code analysis of the source codes written into the editor is described in the theoretical part. It also explains the syntax and semantic aspects of the CodAL language. In the practical part the new CodAL language editor is designed and developed. The new CodAL language editor integrated into the development toolkit of the project Lissom is the final outcome of this thesis.

Předmětem dizertační práce je návrh nových technik pro verifikaci hardwaru, které jsou optimalizovány pro použití v procesu souběžného vývoje hardwaru a softwaru. V rámci tohoto typu vývoje je hardware spolu se software vyvíjen paralelně s cílem urychlit vývoj nových systémů. Současné nástroje pro tvorbu mikroprocesorů stavějící na tomto stylu vývoje obvykle umožňují vývojářům ověřit jejich návrh využitím různých simulačních technik a/nebo za pomoci tzv. funkční verifikace. Společnou nevýhodou těchto přístupů je, že se zaměřují pouze na hledání chyb. Výsledný produkt tedy může stále obsahovat nenalezené netriviální defekty. Z tohoto důvodu se v posledních letech stává stále více žádané nasazení formálních metod. Na rozdíl od výše uvedených přístupů založených na hledání chyb, se formální verifikace zaměřuje na dodání rigorózního důkazu, že daný systém skutečně splňuje požadované vlastnosti. I když bylo v uplynulých letech v této oblasti dosaženo značného pokroku, tak aktuální formální přístupy nemají zdaleka schopnost plně automaticky prověřit všechny relevantní vlastnosti verifikovaného návrhu bez výrazného a často nákladného zapojení lidí v rámci verifikačního procesu. Tato práce se snaží řešit problém s automatizací verifikačního procesu jejím zaměřením na verifikační techniky, ve kterých je záměrně kladen menší důraz na jejich přesnost a obecnost, za cenu dosažení plné automatizace (např. vyloučením potřeby ručně vytvářet modely prostředí). Dále se práce také zaměřuje na efektivitu navrhovaných technik a jejich schopnost poskytovat nepřetržitou zpětnou vazbu o verifikačním procesu (např. v podobě podání informace o aktuálním stavu pokrytí). Zvláštní pozornost je pak věnována vývoji formálních metod ověřujících ekvivalenci návrhů mikroprocesorů na různých úrovních abstrakce. Tyto návrhy se mohou lišit ve způsobu, jakým jsou vnitřně zpracovány programové instrukce, nicméně z vnějšího pohledu (daného např. obsahem registrů viditelných z pozice programátora) musí být jejich chování při provádění stejného vstupního programu shodné. Kromě těchto témat se práce také zabývá problematikou návrhu metod pro verifikaci správnosti mechanismů zabraňujících výskytu datových a řídících hazardů v rámci linky zřetězeného zpracování instrukcí. Veškeré metody popsané v této práci byly implementovány ve formě několika nástrojů. Aplikací těchto nástrojů pro verifikaci návrhů netriviálních procesorů bylo dosaženo slibných experimentálních výsledků.

Un véhicule autonome ou un robot mobile est équipé d'un système de navigation qui doit comporter plusieurs briques fonctionnelles pour traiter de perception, localisation, planification de trajectoires et locomotion. Dès que ce robot ou ce véhicule se déplace dans un environnement humain dense, il exécute en boucle et en temps réel plusieurs fonctions pour envoyer des consignes aux moteurs, pour calculer sa position vis-à-vis d'un repère de référence connu, et pour détecter de potentiels obstacles sur sa trajectoire; du fait de la richesse sémantique des images et du faible coût des caméras, ces fonctions exploitent souvent la vision. Les systèmes embarqués sur ces machines doivent alors intégrer des cartes assez puissantes pour traiter des données visuelles en temps réel. Par ailleurs, les contraintes d'autonomie de ces plateformes imposent de très faibles consommations énergétiques. Cette thèse proposent des architectures de type SOPC (System on Programmable Chip) conçues par une méthodologie de co-design matériel/logiciel pour exécuter de manière efficace les fonctions de localisation et de détection des obstacles à partir de la vision. Les résultats obtenus sont équivalents ou meilleurs que l'état de l'art, concernant la gestion de la carte locale d'amers pour l'odométrie-visuelle par une approche EKF-SLAM, et le rapport vitesse d'exécution sur précision pour ce qui est de la détection d'obstacles par identification dans les images d'objets (piétons, voitures...) sur la base de modèles appris au préalable. / An autonomous mobile platform is endowed with a navigational system which must contain multiple functional bricks: perception, localization, path planning and motion control. As soon as such a robot or vehicle moves in a crowded environment, it continously loops several tasks in real time: sending reference values to motors' actuators, calculating its position in respect to a known reference frame and detection of potential obstacles on its path. Thanks to semantic richness provided by images and to low cost of visual sensors, these tasks often exploit visual cues. Other embedded systems running on these mobile platforms thus demand for an additional integration of high-speed embeddable processing systems capable of treating abundant visual sensorial input in real-time. Moreover, constraints influencing the autonomy of the mobile platform impose low power consumption. This thesis proposes SOPC (System on a Programmable Chip) architectures for efficient embedding of vison-based localization and obstacle detection tasks in a navigational pipeline by making use of the software/hardware co-design methodology. The obtained results are equivalent or better in comparison to state-of-the-art for both EKF-SLAM based visual odometry: regarding the local map size management containing seven-dimensional landmarks and model-based detection-by-identification obstacle detection: algorithmic precision over execution speed metric.

The research presented in this thesis investigates the design challenges associated with the development and use of mobile applications and tools for supporting collaboration in educational activities. These technologies provide new opportunities to promote and enhance collaboration by engaging learners in a variety of activities across different places and contexts. A basic challenge is to identify how to design and deploy mobile tools and services that could be used to support collaboration in different kinds of settings. There is a need to investigate how to design collaborative learning processes and to support flexible educational activities that take advantage of mobility. The main research question that I focus on is the identification of factors that influence the design of mobile collaborative learning. The theoretical foundations that guide my work rely on the concepts behind computer supported collaborative learning and design-based research. These ideas are presented at the beginning of this thesis and provide the basis for developing an initial framework for understanding mobile collaboration. The empirical results from three different projects conducted as part of my efforts at the Center for Learning and Knowledge Technologies at Växjö University are presented and analyzed. These results are based on a collection of papers that have been published in two refereed international conference proceedings, a journal paper, and a book chapter. The educational activities and technological support have been developed in accordance with a grounded theoretical framework. The thesis ends by discussing those factors, which have been identified as having a significant influence when it comes to the design and support of mobile collaborative learning. The findings presented in this thesis indicate that mobility changes the contexts of learning and modes of collaboration, requiring different design approaches than those used in traditional system development to support teaching and learning. The major conclusion of these efforts is that the learners’ creations, actions, sharing of experiences and reflections are key factors to consider when designing mobile collaborative activities in learning. The results additionally point to the benefit of directly involving the learners in the design process by connecting them to the iterative cycles of interaction design and research.