abstract: This work analyzes and develops a point-of-load (PoL) synchronous buck converter using enhancement-mode Gallium Nitride (e-GaN), with emphasis on optimizing reverse conduction loss by using a well-known technique of placing an anti-parallel Schottky diode across the synchronous power device. This work develops an improved analytical switching model for the GaN-based converter with the Schottky diode using piecewise linear approximations. To avoid a shoot-through between the power switches of the buck converter, a small dead-time is inserted between gate drive switching transitions. Despite optimum dead-time management for a power converter, optimum dead-times vary for different load conditions. These variations become considerably large for PoL applications, which demand high output current with low output voltages. At high switching frequencies, these variations translate into losses that contribute significantly to the total loss of the converter. To understand and quantify power loss in a hard-switching buck converter that uses a GaN power device in parallel with a Schottky diode, piecewise transitions are used to develop an analytical switching model that quantifies the contribution of reverse conduction loss of GaN during dead-time. The effects of parasitic elements on the dynamics of the switching converter are investigated during one switching cycle of the converter. A designed prototype of a buck converter is correlated to the predicted model to determine the accuracy of the model. This comparison is presented using simulations and measurements at 400 kHz and 2 MHz converter switching speeds for load (1A) condition and fixed dead-time values. Furthermore, performance of the buck converter with and without the Schottky diode is also measured and compared to demonstrate and quantify the enhanced performance when using an anti-parallel diode. The developed power converter achieves peak efficiencies of 91.7% and 93.86% for 2 MHz and 400 KHz switching frequencies, respectively, and drives load currents up to 6A for a voltage conversion from 12V input to 3.3V output. In addition, various industry Schottky diodes have been categorized based on their packaging and electrical characteristics and the developed analytical model provides analytical expressions relating the diode characteristics to power stage performance parameters. The performance of these diodes has been characterized for different buck converter voltage step-down ratios that are typically used in industry applications and different switching frequencies ranging from 400 KHz to 2 MHz. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2020

No description available.

This master thesis deals with designing of a recuperative converter system and auxiliary circuits that extend the life of the automotive battery by using supercapacitor as a source of power when starting a car using the start-stop function. The microcontroller is used to measure important circuit values and control the output current of the converter.

It is not a coincidence that over half the world‟s population live in coastal areas using the sea as a mean to develop its industry, thus the sea is present in most aspects of daily life. Because of the vital relationship with the marine environment, for many years mankind is aware of the high energy potential contained in waves. During the last hundred years, thousands patents of devices for the extraction of the energy from waves have been published. However, the researching still faces the challenge of develop the optimal wave energy converter that matches robustness, to withstand extreme marine conditions, and sensitivity, to respond the different sea states. In this thesis a scale model of a wave overtopping converter has been designed, built and tested. In this type of wave electricity converter the waves ascend a ramp, filling a reservoir located at a certain height above sea level. The stored water in the reservoir is discharged back into the sea, powering a turbine, thus generating electricity. The system is composed of a wave energy converter, at a scale of 1:100 without turbine, a test channel and a plunger type wave maker. Different sea conditions have been simulated, to assess how the different configurations of the device influence the obtained hydraulic power and flow. It has been concluded that there is an appropriate configuration of the wave electricity converter for each wave period and height. The simulated sea conditions were composed of wave periods of around a second and wave heights of about two centimeters. Finally by applying scale transformations, an estimation of the hydraulic power that the wave electricity converter would extract with this configuration in the deep waters of Tenerife South has been calculated. Summarizing, in this thesis the methodology of testing and the comparison with real conditions has been developed.

Photovoltaic (PV) systems are a rapidly growing segment in the renewable energy industry.  Though they have humble origins and an uncertain future, the commercial viability of PV has significantly increased, especially in the past decade.  In order to make PV useful, however, significant effort has to go into the power conditioning systems that take the low-voltage dc from the panel and create utility compatible ac output.  Popular architectures for this process include the centralized inverter and the distributed micro-inverter, each with its own advantages and disadvantages.  One attempt to retain the advantages of both architectures is to centralize the inverter function but construct PV panel-level micro-converters which optimize the panel output and condition the power for the inverter.  The main focus of this work is to explore the technical challenges that face the evolution of the dc-dc micro-converter and to use them as a template for a vertically integrated design procedure. The individual chapters focus on different levels of the process:  topology, modulation and control, transient mitigation, and steady-state optimization.  Chapter 2 introduces a new dc-dc topology, the Integrated Boost Resonant (IBR) converter, born out of the natural design requirements for the micro-converter, such as high CEC efficiency, simple structure, and inherent Galvanic isolation.  The circuit is a combination of a traditional PWM boost converter and a discontinuous conduction mode (DCM), series resonant circuit.  The DCM operation of the high-frequency transformer possesses much lower circulating energy when compared to the traditional CCM behavior.  When combined with  zero-current-switching (ZCS) for the output diode, it results in a circuit with a high weighted efficiency of 96.8%.  Chapter 3 improves upon that topology by adding an optimized modulation scheme to the control strategy.  This improves the power stage efficiency at nominal input and enhances the available operating range.  The new, hybrid-frequency method utilizes areas where the modulator operates in constant-on, constant-off, and fixed-frequency conditions depending on duty cycle, the resonant period length, and the desired input range.  The method extends the operating range as wide as 12-48V and improves the CEC efficiency to 97.2% in the 250-W prototype.  Chapter 4 considers the soft-start of the proposed system, which can have a very large capacitive load from the inverter.  A new capacitor-transient limited (CTL) soft-start method senses the ac transient across the resonant capacitor, prematurely ending the lower switch on-time in order to prevent an excessive current spike.  A prototype design is then applied to the IBR system, allowing safe system startup with a range of capacitive loads from 2μF to 500μF and a consistent peak current without the need for current sensing.  Chapter 5 further investigates the impact of voltage ripple on the PV output power.  A new method for analyzing the maximum power point tracking (MPPT) efficiency is proposed based on panel-derived models.  From the panel model, an expression demonstrating the MPPT efficiency is derived, along with a ripple "budget" for the harmonic sources.  These ripple sources are then analyzed and suggestions for controlling their contributions are proposed that enable circuit designers to make informed and cost-effective design decisions.  Chapter 6 illustrates how results from a previous iteration can provide a basis for the next generation's design.  A zero-voltage-switching (ZVS) version of the circuit in Chapter 2 is proposed, requiring only two additional MOSFETs and one inductor on the low-voltage side.  The maximum switching frequency is then increased from 70kHz to 170kHz, allowing for a 46% reduction in converter volume (from 430cm³ to 230cm³) while retaining greater than 97% weighted efficiency. / Ph. D.

With the fast development of communication systems, computers and consumer electronics, the power supplies for telecoms, servers, desktops, laptops, flat-panel TVs, LED lighting, etc. are required for more power delivery with smaller spaces. The LLC resonant converter has been widely adopted for these applications due to the advantages in high efficiency, high power density and holdup time operation capability. However, unlike PWM converters, the control of the LLC resonant converter is much more difficult because of the fast dynamic characteristic of the resonant tank. In some highly dynamic processes like the load transient, start-up, over-load protection and burst operation, it is hard to control the current and voltage stresses and oscillations in the resonant tank. Moreover, to meet the high power density requirement, the LLC is required to operate at a high switching frequency. Thus the driving of the synchronous rectifier (SR) poses a design challenge as well. To analyze the fast dynamic characteristic, a graphic state-plane technique has been adopted for a class of resonant converters. In this work, it has been extended to the LLC resonant converter. First of all, the LLC steady state and dynamic behaviors are analyzed in the state plane. After that, a simplified implementation of the optimal trajectory control is proposed to significantly improve the load transient response: the new steady state can be tracked in the minimal period of time. With the advantages of the state-trajectory analysis and digital control, the LLC soft start-up is optimized as well. The current and voltage stress is limited in the resonant tank during the start-up process. The output voltage is built up quickly and smoothly. Furthermore, the LLC burst mode is investigated and optimized in the state plane. Several optimal switching patterns are proposed to improve the light load efficiency and minimize the dynamic oscillations. During the burst on-time, the LLC can be controlled to track the steady state of the best efficiency load condition in one-pulse time. Thus, high light-load efficiency is accomplished. Finally, an intelligent SR driving scheme is proposed and its simple digital implementation is introduced. By sensing the SR drain to source voltage and detecting the paralleled body diode conduction, the SR gate driving signal can be tuned within all operating frequency regions. In conclusion, this work not only solves some major academic problems about analysis and control of the LLC resonant converter based on the graphic state plane, but also makes significant contributions to the industry by improving the LLC transient responses and overall efficiency. / Ph. D.

The duty cycle control (DCC) modulation scheme for the three-phase dual-active-bridge (3p-DAB) DC-DC converter is a promising three degree-of-freedom modulation scheme which can extend the converter’s soft-switching range and reduce conduction losses under partial loading and wide voltage variations. However, the prior suggested methods to implement DCC in 3p-DABs have drawbacks such as requiring a multi-frequency approximation and offline optimization process or achieving less than optimal efficiency. To overcome these challenges, this research first proposes an optimal DCC modulation strategy (OMS) for the 3p-DAB based on a novel piece-wise time-domain analysis (TDA) and optimization process that obtains the optimal control parameters for minimum RMS phase current. Secondly, this research proposes a novel closed-form minimum current stress optimization (MCSO) DCC scheme based on the theoretical findings of the TDA optimization. The MCSO reduces the transformer phase currents and extends soft-switching operation under partial loading and wide voltage variations. Experimental results via open-loop testing show that the proposed closed-form MCSO DCC scheme has virtually identical efficiency as the OMS, making this the first research to provide a closed-form DCC modulation scheme for a 3p-DAB that achieves efficiency results equivalent to a fully-optimized offline scheme, but without the drawbacks of the offline optimization process. / Thesis / Master of Applied Science (MASc)

The future of microprocessors is unknown. Over the past 40 years, their historical trend has been for adopting smaller and more powerful designs that drive the world that we live in today. The state of the microprocessor business today faces a crossroad, wishing to continue on the historical trend of doubling the number of transistors on a chip every 18 months (Moore’s Law) but also facing the realistic task of needing to power these sophisticated devices. With the low voltages and high currents that are required for these microprocessors to operate, it poses a difficult task for the future designers of the voltage regulators that are used to power these microprocessors. The technique that has been widely adopted as the preferred method to power these devices is called a multiphase buck converter, or multiphase voltage regulator. This thesis is a continuation of and is aimed to improve previous work done by two former Cal Poly students, Kay Ohn and Ian Waters. A new design that uses an interleaving control scheme, careful component selection, an input LC filter, and a reduction in board size seeks to improve the efficiency, input current noise, and increase the current density of the original design. Research was first conducted to determine how to best make such improvements. The design phase ensued, which used design calculations and simulations to test if the proposed multiphase topology was plausible. Once the theory was fully proven, a real hardware circuit was created and tested to confirm the results. The results yield a multiphase design with improved input noise filtering, greater efficiency, more equal current sharing, and higher current density as compared to previous topologies in this field. Parameters such as output voltage ripple, load and line regulation, and transient response remained excellent, as they were with the previous work.

Electric vehicle (EV) adoption continues to rise, yet EV sales still represent a small portion of vehicle sales in most countries. An expansion of the DC fast charging (DCFC) network is likely to accelerate this revolution towards sustainable transportation, giving drivers more flexible options for charging on longer trips. However, DCFC presents a large load on the grid which can lead to costly grid reinforcements and high monthly operating costs – adding energy storage to the DCFC station can help mitigate these challenges. This thesis first performs a comprehensive review of DCFC stations with energy storage, including motivation, architectures, power electronic converters, and detailed simulation analysis for various charging scenarios. The review is closely tied to current state-of-the-art technologies and covers both academic research contributions and real energy storage projects in operation around the world. It is identified that the battery energy storage systems (BESSs) with active front end converter provides high efficiency with reasonable power density in a DCFC station. It is also realized that the isolated DC/DC converter interfacing BESS and EV determines the overall efficiency of a DCFC station with a low grid connection. Secondly, this thesis analyzes the impact of active front end based DCFC stations connected to a grid distorted with background voltage harmonics. In active front end based DCFC stations, background voltage harmonics produce current not only at the frequencies of the distorted voltage, but also at other coupled frequencies. Various mitigation techniques, such as increasing inner control loop gain, grid voltage feedforward, and selective harmonic compensation, have been adopted in industry to reduce the emissions originating from distorted background voltage. However, although these techniques are effective in suppressing the current at the harmonic orders present in the background voltage, they deteriorate the emission at coupled frequencies. This thesis provides the theoretical explanation of this phenomenon, which is verified by simulation of a two-level active front end in PSCAD/EMTDC. This thesis also discusses the proper treatment of current emission due to background voltage harmonics. Thirdly, the thesis identifies the semi dual active bridge (semi-DAB) converter as an ideal candidate as the interfacing isolated DC/DC converter between the BESS and the BEV. A novel control strategy is proposed for the semi-DAB converter to achieve wide voltage gain while increasing the efficiency at operational points with high input voltage and low output voltage, which is a commonly occurring scenario when the BESS is fully charged, and the EV battery is at low charge. Furthermore, this thesis also provides an algorithm to determine the required phase-shift in real time for any operating point, eliminating the need to devise the control trajectory offline. A 550 V, 10 kW experimental prototype is built and tested to validate the proposed control strategy. With a 25 A constant charging current, the prototype shows the proposed control strategy can improve efficiency by up to 3.5% compared to the well-known dual phase shift control at operating points with high input voltage (450 – 550 V) and low output voltage (150 – 275 V), with a peak efficiency of 97.6%. Finally, this thesis proposes a novel variable turns-ratio semi-DAB converter to improve its overall efficiency even further when the input voltage is high and the output voltage is low. Furthermore, a control law is also proposed to determine the turns-ratio, i.e., the operational structure of the converter, which reduces the converter peak and rms current. The 550 V, 10 kW prototype is modified to accommodate the variable turns-ratio high frequency transformer to test the proposed converter and control. The proposed converter with control can further improve the efficiency at many operating points compared to single turns-ratio semi-DAB with DPS control. The peak efficiency achieved is 98.5%. / Thesis / Doctor of Philosophy (PhD)

No description available.