Die vorliegende Arbeit behandelt die Charakterisierung von epitaktischem Graphen auf Siliziumkarbid (0001) mittels Raman-Spektroskopie. Nach der Einführung theoretischer sowie experimenteller Grundlagen werden das Wachstum von Graphen auf Siliziumkarbid (SiC) behandelt und die untersuchten Materialsysteme vorgestellt. Es wird gezeigt, dass das Raman-Spektrum von epitaktischem Graphen auf SiC (0001) neben den Phononenmoden des Graphens und des Substrats weitere Signale beinhaltet, welche der intrinsischen Grenzflächenschicht, dem Buffer-Layer, zwischen Graphen und SiC zugeordnet werden können. Das Raman-Spektrum dieser Grenzflächenschicht kann als Abbild der phononischen Zustandsdichte interpretiert werden. Fortführend werden verspannungsinduzierte Änderungen der Phononenenergien der G- und 2D-Linie im Raman-Spektrum von Graphen untersucht. Dabei werden starke Variationen des Verspannungszustands beobachtet, welche mit der Topographie der SiC-Oberfläche korreliert werden können und erlauben, Rückschlüsse auf Wachstumsmechanismen zu ziehen. Die Entwicklung einer neuen Messmethode, bei der das Raman-Spektrum von Graphen durch das SiC-Substrat aufgenommen wird, ermöglicht die detektierte Raman-Intensität um über eine Größenordnung zu erhöhen. Damit wird die Raman-spektroskopische Charakterisierung eines Graphen-Feldeffekttransistors mit top gate ermöglicht und ein umfassendes Bild des Einflusses der Ladungsträgerkonzentration und der Verspannung auf die Positionen der G- und 2D-Raman-Linien von quasifreistehendem Graphen auf SiC erarbeitet.

Organic semiconducting polymers are widely employed in organic electronics such as organic photovoltaics (OPVs), organic field-effect transistors (OFETs) and organic light emitting diodes (OLEDs). Their remarkable mechanical and charge transport properties as well as solution processability allow low-cost fabrication of light-weight and flexible devices. Among them indacenodithiophene (IDT)-based materials are promising candidates for application in organic electronics. Due to their low energetic disorder, extended conjugation and high electron density the IDT-based polymers show high field-effect mobilities and high absorption coefficients. However, their synthesis suffers from long reaction sequences and is often accomplished using toxic materials. Commercialization requires development of more efficient and sustainable reaction pathways to ease tailoring of structures and to limit molecular defects. Herein, the development of new synthetic pathways towards IDT-based polymers is presented in which all C-C coupling steps are achieved by C-H activation – an atom-economic alternative to conventional transition-metal catalyzed cross couplings. Two different strategies were established to synthesize a series of well-defined IDT-based homo- and copolymers with different side chain patterns and varied molecular weights. The first way starts by synthesis of a precursor polymer and subsequent cyclization affording IDT homopolymers. In the second approach, cyclized IDT monomers were prepared first and then polymerized using direct arylation polycondensation (DAP) yielding IDT homo- and copolymers. The synthetic pathways were optimized in terms of maximizing molecular weights and limiting defect structures. While the first pathway enables synthesis of well-defined homopolymers, the latter is the method of choice for preparation of IDT-based copolymers in high yields and adjustable molecular weights. The polymers were further characterized in detail by optical, thermal, electrical and morphological analyses. OFETs as well as all-polymer solar cells (all-PSCs) were fabricated to investigate the influence of structural modifications and molecular weight on their optoelectronic performance. Thus, this thesis provides a comprehensive study of the structure-property correlations of IDT-based polymers and simplified synthetic protocols for the design and preparation of donor-acceptor copolymers in the future.

Inspired by neurobiological systems, Spiking Neural Networks (SNNs) are gaining an increasing interest in the field of bio-inspired machine learning. Neurons, as central processing and short-term memory units of biological neural systems, are thus at the forefront of cutting-edge research approaches. The realization of CMOS circuits replicating neuronal features, namely the integration of action potentials and firing according to the all-or-nothing law, imposes various challenges like large area and power consumption. The non-volatile storage of polarization states and accumulative switching behavior of nanoscale HfO₂ - based Ferroelectric Field-Effect Transistors (FeFETs), promise to circumvent these issues. In this paper, we propose two FeFET-based neuronal circuits emulating the Integrate-and-Fire (I&F) behavior of biological neurons on the basis of SPICE simulations. Additionally, modulating the depolarization of the FeFETs enables the replication of a biology-based concept known as membrane leakage. The presented capacitor-free implementation is crucial for the development of neuromorphic systems that allow more complex features at a given area and power constraint.

Reconfigurable transistors merge unipolar p- and n-type characteristics of field-effect transistors into a single programmable device. Combinational circuits have shown benefits in area and power consumption by fine-grain reconfiguration of complete logic blocks at runtime. To complement this volatile programming technology, a proof of concept for individually addressable reconfigurable nonvolatile transistors is presented. A charge-trapping stack is incorporated, and four distinct and stable states in a single device are demonstrated.

The electric-field-driven and reversible polarization switching in ferroelectric materials provides a promising approach for nonvolatile information storage. With the advent of ferroelectricity in hafnium oxide, it has become possible to fabricate ultrathin ferroelectric films suitable for nanoscale electronic devices. Among them, ferroelectric field-effect transistors (FeFETs) emerge as attractive memory elements. While the binary switching between the two logic states, accomplished through a single voltage pulse, is mainly being investigated in FeFETs, additional and unusual switching mechanisms remain largely unexplored. In this work, we report the natural property of ferroelectric hafnium oxide, embedded within a nanoscale FeFET, to accumulate electrical excitation, followed by a sudden and complete switching. The accumulation is attributed to the progressive polarization reversal through localized ferroelectric nucleation. The electrical experiments reveal a strong field and time dependence of the phenomenon. These results not only offer novel insights that could prove critical for memory applications but also might inspire to exploit FeFETs for unconventional computing.

Electrostatic Discharge (ESD) is a significant hazard to electronic components and systems. Based on a specific processing technology, a given circuit application requires a customized ESD consideration that includes the devices’ operating voltage, leakage current, breakdown constraints, and footprint. As new technology nodes mature every 3-5 years, design of effective ESD protection solutions has become more and more challenging due to the narrowed design window, elevated electric field and current density, as well as new failure mechanisms that are not well understood. The endeavor of this research is to develop novel, effective and robust ESD protection solutions for both emerging technologies and modern complementary metal–oxide–semiconductor (CMOS) technologies. The Si nanowire field-effect transistors are projected by the International Technology Roadmap for Semiconductors as promising next-generation CMOS devices due to their superior DC and RF performances, as well as ease of fabrication in existing Silicon processing. Aiming at proposing ESD protection solutions for nanowire based circuits, the dimension parameters, fabrication process, and layout dependency of such devices under Human Body Mode (HBM) ESD stresses are studied experimentally in company with failure analysis revealing the failure mechanism induced by ESD. The findings, including design methodologies, failure mechanism, and technology comparisons should provide practical knowhow of the development of ESD protection schemes for the nanowire based integrated circuits. Organic thin-film transistors (OTFTs) are the basic elements for the emerging flexible, printable, large-area, and low-cost organic electronic circuits. Although there are plentiful studies focusing on the DC stress induced reliability degradation, the operation mechanism of OTFTs iv subject to ESD is not yet available in the literature and are urgently needed before the organic technology can be pushed into consumer market. In this work, the ESD operation mechanism of OTFT depending on gate biasing condition and dimension parameters are investigated by extensive characterization and thorough evaluation. The device degradation evolution and failure mechanism under ESD are also investigated by specially designed experiments. In addition to the exploration of ESD protection solutions in emerging technologies, efforts have also been placed in the design and analysis of a major ESD protection device, diodetriggered-silicon-controlled-rectifier (DTSCR), in modern CMOS technology (90nm bulk). On the one hand, a new type DTSCR having bi-directional conduction capability, optimized design window, high HBM robustness and low parasitic capacitance are developed utilizing the combination of a bi-directional silicon-controlled-rectifier and bi-directional diode strings. On the other hand, the HBM and Charged Device Mode (CDM) ESD robustness of DTSCRs using four typical layout topologies are compared and analyzed in terms of trigger voltage, holding voltage, failure current density, turn-on time, and overshoot voltage. The advantages and drawbacks of each layout are summarized and those offering the best overall performance are suggested at the end

No description available.

Ferroelectrics are promising for nonvolatile memories. However, the difficulty of fabricating ferroelectric layers and integrating them into complementary metal oxide semiconductor (CMOS) devices has hindered rapid scaling. Hafnium oxide is a standard material available in CMOS processes. Ferroelectricity in Si-doped hafnia was first reported in 2011, and this has revived interest in using ferroelectric memories for various applications. Ferroelectric hafnia with matured atomic layer deposition techniques is compatible with three-dimensional capacitors and can solve the scaling limitations in 1-transistor-1-capacitor (1T-1C) ferroelectric random-access memories (FeRAMs). For ferroelectric field-effect-transistors (FeFETs), the low permittivity and high coercive field Ec of hafnia ferroelectrics are beneficial. The much higher Ec of ferroelectric hafnia, however, makes high endurance a challenge. This article summarizes the current status of ferroelectricity in hafnia and explains how major issues of 1T-1C FeRAMs and FeFETs can be solved using this material system.

The carbon nanotube-based field effect transistor (CNTFET) possesses the potential to overcome limitations of state-of-the-art technologies such as silicon-based complementary metal-oxide-semiconductors. However, the carbon nanotube (CNT) technology is still at its infancy and technology development is still necessary to exploit the CNT properties such as high charge carrier mobility, high current carrying capability, one-dimensional charge transport and their versatile integrability. Within this work significant progress has been achieved scientifically and technologically in the advance of high frequency (HF) CNTFETs for analog applications. According to simulations by others, a technology flow has been developed based on electron beam lithography for bottom gated HF CNTFETs which outperform state-of the art top gate architectures with respect to their parasitic capacitances. Moreover, the impact of electrostatic doping on the CNTFETs has been investigated. In particular, the dynamics of water desorption from the CNTFETs and the related reduction of p-type doping was investigated and the different impact of the n-type dopant polyethylenimine onto the channel region and contact region could be separated for the first time. Furthermore, the impact of doped CNT bundles on the device performance has been studied. It could be shown in detail for the first time, that high off-state source-drain leakage currents can be due to bundled semiconducting CNTs and does not necessarily imply the presence of metallic CNTs. The within the framework of this thesis designed and realized HF CNTFETs are operating in the GHz range with cut-off frequencies up to 14 GHz and maximum frequencies of oscillation up to 6 GHz at a channel length of 280 nm. Moreover, the impact of the spacer between the source-/ drain- to the gate electrode on the HF properties of the CNTFETs has been investigated experimentally for the first time. Simulations by others have successfully confirmed that a symmetrical reduction of the source to gate electrode spacer results in an increased device speed. By asymmetrically reducing the source to gate electrode spacer and in parallel increasing the drain-to-gate electrode spacer the device speed can be further enhanced. Moreover, within this work it has been experimentally indicated for the first time that the device properties of HF CNTFETs can be tuned by different device geometries towards either highest linearity or speed.

No description available.