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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
81

Verifikation av verktyget aspect analyzer / Aspect analyzer tool verification

Bodin, Joakim January 2003 (has links)
Rising complexity in the development of real-time systems has made it crucial to have reusable components and a more flexible way of configuring these components into a coherent system. Aspect-oriented system development (AOSD) is a technique that allows one to put a system’s crosscutting concerns into"modules"that are called aspects. Applying AOSD in real-time and embedded system development one can expect reductions in the complexity of the system design and development. A problem with AOSD in its current form is that it does not support predictability in the time domain. Hence, in order to use AOSD in real-time system development, we need to provide ways of analyzing temporal behavior of aspects, components and resulting system (made from weaving aspects and components). Aspect analyzer is a tool that computes the worst-case execution time (WCET) for a set of components and aspects, thus, enabling support for predictability in the time domain of aspect-oriented real-time software. A limitation of the aspect analyzer, until now, were that no verification had been made whether the aspect analyzer would produce WCET values that were close to the measured or computed (with another WCET analysis technique) WCET of an aspect-oriented real-time system. Therefore, in this thesis we perform a verification of the correctness of the aspect analyzer using a number of different methods for WCET analysis. These investigations of the correctness of the output from the aspect analyzer gave confidence to the automated WCET analysis. In addition, performing this verification led to the identification of the steps necessary to compute the WCETs of a piece of program, when using a third party tool, which gives the ability to write accurate input files for the aspect analyzer.
82

Log-selection strategies in a real-time system

Gillström, Niklas January 2014 (has links)
This thesis presents and evaluates how to select the data to be logged in an embedded realtime system so as to be able to give confidence that it is possible to perform an accurate identification of the fault(s) that caused any runtime errors. Several log-selection strategies were evaluated by injecting random faults into a simulated real-time system. An instrument was created to perform accurate detection and identification of these faults by evaluating log data. The instrument’s output was compared to ground truth to determine the accuracy of the instrument. Three strategies for selecting the log entries to keep in limited permanent memory were created. The strategies were evaluated using log data from the simulated real-time system. One of the log-selection strategies performed much better than the other two: it minimized processing time and stored the maximum amount of useful log data in the available storage space. / Denna uppsats illustrerar hur det blev fastställt vad som ska loggas i ett inbäddat realtidssystem för att kunna ge förtroende för att det är möjligt att utföra en korrekt identifiering av fel(en) som orsakat körningsfel. Ett antal strategier utvärderades för loggval genom att injicera slumpmässiga fel i ett simulerat realtidssystem. Ett instrument konstruerades för att utföra en korrekt upptäckt och identifiering av dessa fel genom att utvärdera loggdata. Instrumentets utdata jämfördes med ett kontrollvärde för att bestämma riktigheten av instrumentet. Tre strategier skapades för att avgöra vilka loggposter som skulle behållas i det begränsade permanenta lagringsutrymmet. Strategierna utvärderades med hjälp av loggdata från det simulerade realtidssystemet. En av strategierna för val av loggdata presterade klart bättre än de andra två: den minimerade tiden för bearbetning och lagrade maximal mängd användbar loggdata i det permanenta lagringsutrymmet.
83

Robust MIMO Precoding on Real-World Measured Channels

Hedenskog, Filip January 2015 (has links)
It is well known that multi-input multi-output (MIMO) wireless communication systemsthat employ precoding techniques are capable of meeting the high expectations of modernand future wireless communication standards. In order to fully utilize these techniques, thecommunication system typically requires information of the channel, commonly referred toas channel state information (CSI). In practice, the CSI at the transmitter (CSIT) is oftennot perfect which addresses the need for robust precoding designs, that can mitigate theeffects of precoding with imperfect CSIT. By modeling the imperfect CSIT as deterministic,it can be assumed that the estimated channel, as represented by the CSIT, belongs to aconvex uncertainty set. With this approach, the problem of finding a robust precoding designcan be formulated as a convex maximin problem, where the solution optimizes the systemperformance for the worst channel that belongs to the uncertainty set. How the uncertaintyset is modeled impacts the performance of the communication system, which calls for theevaluation of several robust precoding designs. While different characteristics of the convexuncertainty sets has been evaluated for MIMO flat-fading channels represented by i.i.d. zero-mean, unit variance Gaussian elements, it is of interest to apply the theory of worst-caserobust precoding designs on real-world measured MIMO channels.More concisely, this project investigates MIMO precoding designs with deterministic im-perfect CSIT for real-world measured channels that utilizes orthogonal frequency divisionmultiplexing (OFDM) schemes. The worst-case received signal-to-noise ratio (SNR) will bepresented as a result of using MIMO precoding designs on real-world channels, and the effectof the choice of model parameters and characteristics of the chosen uncertainty set will bevisualized and discussed. Furthermore, orthogonal space-time block code (OSTBC) transmis-sion designs will be employed to measure the worst case symbol error rate (SER) as a tool toevaluate the system performance in different scenarios. The results will be compared to thatwhen the channel is composed of i.i.d. zero-mean, unit variance Gaussian elements and forthe case when the channel is based on the Kronecker model.The results indicate that a further analysis of how the Kronecker model behaves in termsof capacity is required in order to draw accurate conclusions regarding the implementation ofrobust precoding strategies when each pair of antennas are correlated. Also, it is essential todevelop a framework that offers methods on how to accurately model the uncertainty set sothat it can represent errors that originates from both quantization errors, estimation errorsand outdated estimates. / Det är välkänt att trådlösa multi-input, multi-output (MIMO) system som använder förkodar-tekniker har kapabilitet att möta de höga förväntningar som är fastställt av moderna ochframtida kommunikationsstandarder. För att utnyttja dessa förkodartekniker till fullo be-hövs information om kanalen (CSI). I praktiska kommunikationssystem är kanalinformatio-nen hos sändaren (CSIT) ofta inte perfekt vilket adresserar betydelsen av att använda robustaförkodare som kan mildra den negativa effekten som uppstår av att förkoda med CSIT som in-nehåller fel. Genom att använda en deterministisk modell för CSIT med fel kan man anta attden skattade kanalen som är representerad av CSIT tillhör en konvex osäkerhetsregion. Meddetta tillvägagångssätt kan man formulera problemet att hitta en robust förkodardesign somett konvext maximin-problem, där lösningen optimerar systemets prestanda för den värstakanalskattningen i osäkerhetsregionen. Olika modeller av osäkerhetsregioner ger upphov tillolika systemprestanda vilket betyder att olika modeller med tillhörande robusta förkodare be-höver utvärderas. Medan tidigare forskningsrapporter behandlat MIMO flat fädnings-kanalerför i.i.d. Gaussisk fördelning av elementen finns det ett intresse att applicera teorin omvärsta-fallet robust förkodning på riktiga uppmätta MIMO-kanaler.Mer koncist undersöker detta projekt designs på förkodare för riktiga uppmätta MIMO-kanaler utifrån en deterministisk modell på felaktigt CSIT, där MIMO-kanalerna utnyttjarorthogonal frequency divsion multiplexing (OFDM) scheman. Värsta-fallet signal-to-noiseratio (SNR) kommer presenteras för olika förkodar-designs och MIMO-kanaler. Hur olika valav modellparametrar och karakteristik hos osäkerhetsregionerna påverkar systemprestandankommer att diskuteras. Vidare kommer även orthogonal space-time block codes (OSTBC)användas som transmissionsscheman för att mäta symbol error rate (SER). Resultaten kom-mer att jämföras med när MIMO-kanalen består av i.i.d. Gaussisk fördelning av elementenoch för fallet när kanalen är baserad på en Kronecker-modell.Resultaten indikerar att en fortsatt analys av hur Kronecker-modellen beter sig medavseende på kapacitet är nödvändig för att dra tillförlitliga slutsatser om systemprestan-dan för förkodar-designs när antennparen är korrelerade. Det är även väsentligt att utvecklaen teori som behandlar metoder för hur man kan på ett tillförlitligt sätt modellera osäker-hetsregionen så CSIT så att kvantiseringsfel, skattningsfel och utdaterade skattningar kanrepresenteras i den.
84

Towards Aspectual Component-Based Real-Time System Development

Tešanović, Aleksandra January 2003 (has links)
Increasing complexity of real-time systems and demands for enabling their configurability and tailorability are strong motivations for applying new software engineering principles such as aspect-oriented and component-based software development. The integration of these two techniques into real-time systems development would enable: (i) efficient system configuration from the components in the component library based on the system requirements, (ii) easy tailoring of components and/or a system for a specific application by changing the behavior (code) of the component by aspect weaving, and (iii) enhanced flexibility of the real-time and embedded software through the notion of system configurability and component tailorability. In this thesis we focus on applying aspect-oriented and component-based software development to real-time system development. We propose a novel concept of aspectual component-based real-time system development (ACCORD). ACCORD introduces the following into real-time system development: (i) a design method that assumes the decomposition of the real-time system into a set of components and a set of aspects, (ii) a real-time component model denoted RTCOM that supports aspect weaving while enforcing information hiding, (iii) a method and a tool for performing worst-case execution time analysis of different configurations of aspects and components, and (iv) a new approach to modelling of real-time policies as aspects. We present a case study of the development of a configurable real-time database system, called COMET, using ACCORD principles. In the COMET example we show that applying ACCORD does have an impact on the real-time system development in providing efficient configuration of the real-time system. Thus, it could be a way for improved reusability and flexibility of real-time software, and modularization of crosscutting concerns. In connection with development of ACCORD, we identify criteria that a design method for component-based real-time systems needs to address. The criteria include a well-defined component model for real-time systems, aspect separation, support for system configuration, and analysis of the composed real-time system. Using the identified set of criteria we provide an evaluation of ACCORD. In comparison with other approaches, ACCORD provides a distinct classification of crosscutting concerns in the real-time domain into different types of aspects, and provides a real-time component model that supports weaving of aspects into the code of a component, as well as a tool for temporal analysis of the weaved system. / <p>Report code: LiU-TEK-LIC-2003:23.</p>
85

Projeto e análise de aplicações de circuladores ativos para a operação em frequências de ultrassom Doppler de ondas contínuas / Design and application analysis of active circulators for operation in frequencies of continuous-wave Doppler ultrasound

Santini, Tales Roberto de Souza 11 July 2014 (has links)
Os circuladores tradicionais são amplamente utilizados em telecomunicações e defesa militar para o simultâneo envio e recepção de sinais por um único meio. Esses circuitos passivos, fabricados a partir de materiais ferromagnéticos, possuem a desvantagem do aumento de dimensões, peso e custos de fabricação com a diminuição da frequência de operação definida no projeto destes dispositivos, inviabilizando sua aplicação em frequências abaixo de 500 MHz. O circulador ativo surgiu como uma alternativa aos tradicionais, tendo aplicações em frequências desde o nível DC até a ordem de dezenas de gigahertz. As suas maiores aplicações ocorrem quando são necessários dispositivos compactos, de baixo custo e de baixa potência. Os primeiros circuitos propostos possuíam uma grande limitação em termos de frequência de operação e de potência entregue à carga. Entretanto, com os avanços tecnológicos na eletrônica, tais problemas podem ser amenizados atualmente. Neste trabalho é apresentado o desenvolvimento de um circuito circulador ativo para a utilização em instrumentação eletrônica, em particular para a operação em frequências na ordem das utilizadas em equipamentos de ultrassom Doppler de ondas contínuas, na faixa de 2 MHz a 10 MHz. As possíveis vantagens da implementação de circuladores em sistemas de ultrassom estão relacionadas ao incremento da relação sinal-ruído, aumento da área de recepção do transdutor, simplificação da construção do transdutor, simplificação do circuito de demodulação/ processamento, e maior isolação entre os circuitos de transmissão e recepção de sinais. Na fase inicial, o circulador ativo proposto é modelado por equacionamento, utilizando-se tanto o modelo ideal dos amplificadores operacionais como o seu modelo de resposta em frequência. Simulações computacionais foram executadas para confirmar a validade do equacionamento. Um circuito montado em placa de prototipagem rápida foi apresentado, e testes de prova de conceito em baixas frequências foram realizados, mostrando uma grande semelhança entre o teórico, o simulado e o experimental. A segunda parte contou com o projeto do circuito circulador para a operação em maiores frequências. O circuito proposto é composto por três amplificadores operacionais de realimentação por corrente e vários componentes passivos. Uma análise de sensibilidade utilizando os métodos de Monte-Carlo e análise do pior caso foi aplicada, resultando em um perfil de comportamento frente às variações dos componentes do circuito e às variações da impedância de carga. Uma placa de circuito impressa foi projetada, utilizando-se de boas práticas de leiaute para a operação em altas frequências. Neste circuito montado, foram realizados os seguintes testes e medições: comportamento no domínio do tempo, faixa dinâmica, nível de isolação em relação à amplitude do sinal, largura de banda, levantamento dos parâmetros de espalhamento, e envio e recepção de sinais por transdutor de ultrassom Doppler de ondas contínuas. Os resultados dos testes de desempenho foram satisfatórios, apresentando uma banda de transmissão de sinais para frequências de 100 MHz, isolação entre portas não consecutivas de 39 dB na frequência de interesse para ultrassom Doppler e isolação maior que 20 dB para frequências de até 35 MHz. A faixa dinâmica excedeu a tensão de 5 Vpp, e o circuito teve bom comportamento no envio e na recepção simultânea de sinais pelo transdutor de ultrassom. / Traditional circulators are widely used in both telecommunications and military defense for sending and receiving signals simultaneously through a single medium. These passive circuits which are manufactured from ferromagnetic materials, have the disadvantages of having suffered an increase in dimensions, weight, and manufacturing costs along with the decrease in the operation frequency established in the designs of such devices, thus preventing their useful employment in frequencies below 500 MHz. The active circulator emerged as an alternative to the traditional ones, and has applications on frequencies ranging from a DC level to levels involving dozens of gigahertz. It is applicable when compact devices are made necessary, at a low cost, and for low frequencies. The first circuits to be introduced had a major limitation in terms of operating frequency and power delivered to the load. However, due to technological advances in electronics, problems such as the aforementioned can now be minimized. This research work presents the development of an active circulator circuit to be used in electronic instrumentation, particularly for operation at frequencies such as those used in continuous wave Doppler ultrasound equipment, ranging from 2 MHz to 10 MHz. The advantages made possible by implementing ultrasound systems with circulators are related to an increase in the signal-to-noise ratio, an increase in the transducers reception area, a simplified construction of the transducer, simplification of the demodulation/processing circuit, and a greater isolation between the transmission circuits and signal reception. In the initial phase, the proposed active circulator was modeled by means of an equating method, using both the ideal model of operational amplifiers and the model of frequency response. Computer simulations were carried out in order to confirm the validity of the equating method. A circuit mounted upon a breadboard was introduced and proof of concept assessments were performed at low frequencies, showing a great similarity among the theoretical, simulated and experimented data. The second phase is when the circulator circuits design was developed in order make its operation at higher frequencies possible. The proposed circuit is comprised of three currentfeedback operational amplifiers and several passive components. A sensitivity analysis was carried out using Monte-Carlo methods and worst-case analyses, resulting in a certain behavioral profile influenced by variations in circuit components and variations in load impedance. A printed circuit board was designed, employing good practice layout standards so that operation at high frequencies would be achieved. The following evaluations and measurements were performed on the circuit that was assembled: time domain behavior, dynamic range, isolation level relative to signal amplitude, bandwidth, survey of the scattering parameters, and transmission and reception of signals by a continuous wave Doppler ultrasound transducer. The results of the performance tests were satisfactory, presenting a 100 MHz signal transmission band, isolation between non-consecutive ports of 39 dB at the frequency of interest to the Doppler ultrasound, and an isolation greater than 20 dB for frequencies of up to 35 MHz. The dynamic range exceeded the 5Vpp and the circuit performed satisfactorily in the simultaneous transmission and reception of signals through the ultrasound\'s transducer.
86

La protection des enfants contre l'exploitation au travail dans les principaux instruments internationaux et européens / The protection of children against exploitation at work in the principal international and european instruments

Bouhairi, Samar 03 July 2012 (has links)
Aujourd’hui, plus de deux cent millions d’enfants sont contraints de travailler dans le monde pour des raisons multiples. Leurs conditions de travail sont généralement déplorables. L’abolition effective du travail des enfants est donc l’un des plus urgents défis de notre époque. Divers instruments internationaux et européens protègent les enfants contre l’exploitation au travail. Ces instruments visent à assurer l’épanouissement physique et psychologique des enfants ainsi que le respect de leur droit à l’éducation. La présente étude a pour but d’analyser ces principaux instruments. / Today, more than two hundred million children are forced to work throughout the world for various reasons. The working conditions are in general deplorable. The effective abolition of children work is therefore one of the most urgent challenges nowadays. Many international and European instruments protect children against exploitation at work. These instruments aim at insuring physical and physiological development of children as well as respecting their right to education. This study aims at analyzing these principal instruments.
87

L'exploitation des enfants par le travail en droit international, européen et iranien : étude normative comparée / Child labour and child exploitation in international, European and Iranian law : a comparative legal study

Boroumand, Armin 26 January 2013 (has links)
D’après la Convention n° 182 de l’OIT, toutes les formes d’esclavage ou pratiques analogues, telles que la servitude pour dettes et le servage, la traite, le travail forcé, ainsi que le recrutement obligatoire des enfants dans les conflits armés figurent parmi les pires formes de travail des enfants. Ledit instrument regroupe l’ensemble de ces notions dans une seule et même catégorie pouvant donner lieu à une possible ambiguïté. Le but de ce travail est de faire toute la lumière sur les nuances qui distinguent chacune de ces notions en droit international, européen (en particulier, le droit du Conseil de l’Europe) et iranien. Cette thèse se compose de deux parties. La première partie traite de l’évolution du cadre juridique international, européen et iranien dans la lutte contre le travail des enfants dans son ensemble. La deuxième partie, quant à elle, se penche sur les formes particulièrement graves de travail des enfants, d’ordre économique, qui nécessitent de ce fait un régime juridique spécifique. / Child Labour and Child Exploitation in International, European and Iranian law (a Comparative Legal Study): According to the ILO’s Convention No. 182, all forms of slavery or similar practices, such as debt bondage and serfdom, trafficking, forced labour and compulsory recruitment of children for use in armed conflicts appear among the worst forms of child labour. The aforementioned Convention classifies all these concepts into a singlecategory which may give rise to a possible ambiguity. The aim of this thesis is to shed light on the nuances of each of these notions in international, European (in particular, Council of Europe) and Iranian law. This thesis consists of two parts. The first part deals with theevolution of the international, European and Iranian Legal framework in the fight against child labour in general. The second part particularly focuses on grave forms of child labour of economic nature which require a specific legal regime.
88

Calcul du pire temps d'exécution : méthode formelle s'adaptant à la sophistication croissante des architectures matérielles / Computation of the worst case execution time : formal analysis method that fits the increasing complexity of the hardware architecture

Benhamamouch, Bilel 02 May 2011 (has links)
Afin de garantir qu'un programme respectera toutes ses contraintes temporelles, nous devons être capable de calculer une estimation fiable de son temps d'exécution au pire cas (WCET: worst case execution time). Cependant, identifier une borne précise du pire temps d'exécution devient une tâche très complexe du fait de la sophistication croissante des processeurs. Ainsi, l'objectif de nos travaux de recherche a été de définir une méthode formelle qui puisse s'adapter aux évolutions du matériel. Cette méthode consiste à développer un modèle du processeur cible, puis à l'exécuter symboliquement afin d'associer à chaque trace d'exécution un temps d'exécution au pire cas. Une méthode de fusionnement est également prévue afin d'éviter une possible explosion combinatoire. Cette méthode a pour principale contrainte de ne pas introduire trop d'imprécision sur les temps calculés. / To ensure that a program will respect all its timing constraints we must be able to compute a safe estimation of its worst case execution time (WCET). However with the increasing sophistication of the processors, computing a precise estimation of the WCET becomes very difficult. In this report, we propose a novel formal method to compute a precise estimation of the WCET that can be easily parameterized by the hardware architecture. Assuming that we developed an executable timed model of the hardware, we use symbolic execution to precisely infer the execution time for a given instruction flow. We also merge the states relying on the loss of precision we are ready to accept, in order to avoid a possible states explosion.
89

Architecture multi-coeurs et temps d'exécution au pire cas / Multicore architectures and worst-case execution time

Lesage, Benjamin 21 May 2013 (has links)
Les tâches critiques en systèmes temps-réel sont soumises à des contraintes temporelles et de correction. La validation d'un tel système repose sur l'estimation du comportement temporel au pire cas de ses tâches. Le partage de ressources, inhérent aux architectures multi-cœurs, entrave le calcul de ces estimations. Le comportement temporel d'une tâche dépend de ses rivales du fait de l'arbitrage de l'accès aux ressources ou de modifications concurrentes de leur état. Cette étude vise à l'estimation de la contribution temporelle de la hiérarchie mémoire au pire temps d'exécution de tâches critiques. Les méthodes existantes, pour caches d'instructions, sont étendues afin de supporter caches de données privés et partagés, et permettre l'analyse de hiérarchies mémoires riches. Le court-circuitage de cache est ensuite utilisé pour réduire la pression sur les caches partagés. Nous proposons à cette fin différentes heuristiques basées sur la capture de la réutilisation de blocs de cache entre différents accès mémoire. Notre seconde proposition est la politique de partitionnement Preti qui permet l'allocation d'un espace sans conflits à une tâche. Preti favorise aussi les performances de tâches non critiques concurrentes aux temps-réel dans les systèmes de criticité hybride. / Critical tasks in the context of real-time systems submit to both timing and correctness constraints. Whence, the validation of a real-time system rely on the estimation of its tasks’ Worst case execution times. Resource sharing, as it occurs on multicore architectures, hinders the computation of such estimates. The timing behaviour of a task is impacted by its concurrents, whether because of resource access arbitration or concurrent modifications of a resource state. This study focuses on estimating the contribution of the memory hierarchy to tasks’ worst case execution time. Existing analysis methods, defined for instruction caches, are extended to support private and shared data caches, hence allowing for the analysis of rich memory hierarchies. Cache bypass is then used to reduce the pressure laid by concurrent tasks on shared caches levels. We propose different bypass heuristics, based on the capture of cache blocks’ reuse between memory accesses. Our second proposal is the Preti partitioning scheme which allows for the allocation to tasks of a cache space, free from inter-task conflicts. Preti offers the added benefit of providing for average-case performance to non-critical tasks concurrent to real-time ones on hybrid criticality systems.
90

Cache Prediction and Execution Time Analysis on Real-Time MPSoC

Neikter, Carl-Fredrik January 2008 (has links)
<p>Real-time systems do not only require that the logical operations are correct. Equally important is that the specified time constraints always are complied. This has successfully been studied before for mono-processor systems. However, as the hardware in the systems gets more complex, the previous approaches become invalidated. For example, multi-processor systems-on-chip (MPSoC) get more and more common every day, and together with a shared memory, the bus access time is unpredictable in nature. This has recently been resolved, but a safe and not too pessimistic cache analysis approach for MPSoC has not been investigated before. This thesis has resulted in designed and implemented algorithms for cache analysis on real-time MPSoC with a shared communication infrastructure. An additional advantage is that the algorithms include improvements compared to previous approaches for mono-processor systems. The verification of these algorithms has been performed with the help of data flow analysis theory. Furthermore, it is not known how different types of cache miss characteristic of a task influence the worst case execution time on MPSoC. Therefore, a program that generates randomized tasks, according to different parameters, has been constructed. The parameters can, for example, influence the complexity of the control flow graph and average distance between the cache misses.</p>

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