Recently, several SiGe HBT devices fabricated on CMOS-compatible silicon on insulator (SOI) substrates (SiGe HBTs-on-SOI) have been demonstrated, combining the well-known SiGe HBT performance with the advantages of SOI substrates. These new devices are especially interesting in the context of extreme environments - highly challenging surroundings that lie outside commercial and even military electronics specifications. However, fabricating HBTs on SOI substrates instead of traditional silicon bulk substrates requires extensive modifications to the structure of the transistors and results in significant trade-offs. The present work investigates, with measurements and TCAD simulations, the performance and reliability of SiGe heterojunction bipolar transistors fabricated on silicon on insulator substrates with respect to operation in extreme environments such as at extremely low or extremely high temperatures or in the presence of radiation (both in terms of total ionizing dose and single effect upset).

Extreme environment applications impose stringent demands on technology platforms that are incorporated in electronic systems. Space is a classic extreme environment, encompassing both large temperature fluctuations as well as intense radiation fields. Silicon-germanium technology has emerged as a competitive platform for space-based applications, owing to its excellent low-temperature performance and total ionizing dose tolerance. This technology has however been repeatedly shown to be vulnerable to single event phenomena induced by galactic cosmic rays as well as trapped particles within the earth's geomagnetic field. To improve the radiation tolerance of systems incorporating SiGe components, modifications to fabrications steps (Radiation Hardening by Process, RHBP) and/or device/circuit topologies (Radiation Hardening by Design, RHBD) may be employed. For this thesis, two methodologies are analyzed, both RHBD techniques which come at no additional power/area penalty for implementation.

Les travaux de thèse, présentés dans ce manuscrit, portent sur la caractérisation et la modélisation des sources de bruit basse fréquence dans les transistors bipolaires à hétérojonction Si/SiGe:C issus des filières BiCMOS 130 et 55 nm utilisées pour la réalisation de circuits intégrés dédiés aux futures applications dans le domaine du THz. A partir des mesures réalisées en fonction de la polarisation, de paramètres géométriques (surface et périmètre d'émetteur principalement) et de la température, la composante de bruit en 1/f, associée aux fluctuations du courant de base, a été entièrement caractérisée et les sources de bruit associées localisées. Les paramètres du modèle compact SPICE ont été extraits et comparés avec ceux de la littérature. Pour la technologie BiCMOS 130 nm, la valeur obtenue pour la figure de mérite KB égale 6,8 10-11 µm² ce qui représente le meilleur résultat publié à ce jour, toutes filières de transistors bipolaires confondues. Réalisée sur une plaque entière, l'étude statistique de la dispersion du niveau de bruit en 1/f a permis d'étendre la modélisation compacte de type SPICE. Mesuré sur une large gamme de température, le niveau de bruit en 1/f n'a pas présenté de variation significative. Pour la première fois, une étude complète de la composante de bruit en 1/f associée aux fluctuations du courant de collecteur est présentée et les paramètres du modèle SPICE extraits. Concernant la caractérisation des composantes de génération-recombinaison (présence non systématique), une étude statistique a montré que les transistors de plus petites dimensions étaient les plus impactés. La comparaison entre les différentes technologies montre que ces composantes sont beaucoup plus présentes dans les technologies les moins matures. Quand ces composantes ont été associées à du bruit RTS, une méthode de caractérisation temporelle et fréquentielle a été mise en œuvre. Enfin, dans certains cas, une étude en basses températures a permis d'extraire les énergies d'activation des pièges responsables de ces composantes de génération-recombinaison. / The presented thesis work, in this manuscript, focuses on the characterization and modeling of the low frequency noise sources in heterojunction bipolar transistors Si/SiGe :C derived from 130 to 55 nm BiCMOS technology used in the production of integrated circuits dedicated for THz domain applications. From measurements versus bias, geometrical parameters (emitter area and perimeter) and temperature, the 1/f noise component, associated to the base current fluctuations, has been fully characterized and the associated sources have been localized. The SPICE compact model parameters have been extracted and compared with those of the literature. For the BiCMOS 130 nm technology, the obtained figure of merit value of 6,8 10-11 µm2 represents the best published result so far in all bipolar transistors. The dispersion study of the 1/f noise component, performed over a complete wafer, allowed us to extend the SPICE type compact modeling. Measured over a large temperature range, the 1/f noise did not show any variations. For the first time, a complete characterization of the 1/f component at the output of the transistors is presented as well as the extraction of SPICE parameters. Regarding the characterization of generation-recombination components (unsystematic presence), a statistical study has showed that transistors with small emitter areas (Ae < 1 µm2) are affected more than the transistors with large emitter areas by the presence of g-r components. Comparison between different technologies shows that these components are much more present in the less mature technologies. When these components have been associated to RTS, time and frequency domain method is implemented. Finally, in some cases, a study at low temperatures was used to extract the activation energy of the traps responsible for the generation-recombination components.

No description available.

Les travaux de cette thèse portent sur la simulation de la dégradation des paramètres électriques des transistors MOS et bipolaires sous stress statiques et dynamiques. Cette étude a été menée à l’aide d’un outil de simulation de fiabilité développé en interne. Selon la technologie MOS ou bipolaire, les mécanismes étudiés ont été successivement : Hot Carrier Injection, Bias Temperature instability, Mixed Mode et Reverse base emitter bias. L’investigation a été aussi étendue au niveau circuit. Nous nous sommes ainsi intéressés à l’effet de la dégradation des transistors sur la fréquence d’un oscillateur en anneau et les performances RF d’un amplificateur faible bruit. Les circuits ont été soumis à des contraintes DC , AC et RF. La prédictibilité, établie de ces dégradations, a été validée par des essais de vieillissement expérimentaux sur des démonstrateurs encapsulés et montés sur PCB. Les résultats de ces études ont permis de valider la précision du simulateur et la méthode de calcul quasi-statique utilisée pour calculer les dégradations sous stress dynamiques. Ces travaux de recherche ont pour but d’inscrire cette approche prédictive dans un flot de conception de circuits afin d’assurer leur fiabilité. / The work of this thesis focuses on the simulation of the electrical parameters degradation of MOS and bipolar transistors under static and dynamic stresses. This study was conducted using an in-house reliability simulation tool. According to the MOS or bipolar technology, the studied mechanisms were successively: Hot Carrier Injection, Bias Temperature instability, Mixed Mode and Reverse base emitter bias. The investigation was then extended to circuit-level. The effect of transistors degradation on a ring oscillator frequency and the RF performances of a low noise amplifier were investigated. The circuits were subjected to DC, AC and RF constraints. Predictability of these degradations has been validated by experimental aging tests on encapsulated and PCB-mounted demonstrators. The results of these studies proved the accuracy of the simulator and validated the quasi-static calculation method used to predict the degradation under dynamic stress. The goal of this research is to embed this predictive approach into a circuit design flow to ensure its reliability.

Using bandgap engineering, silicon-germanium (SiGe) BiCMOS technology effectively combines III-V transistor performance with the cost and integration advantages associated with CMOS manufacturing. The suitability of SiGe technology for cryogenic and radiation-intense environments is well known, yet SiGe has been generally overlooked for applications involving extreme high temperature operation. This work is an investigation into the potential capabilities of SiGe technology for operation up to 300°C, including the development of packaging and testing procedures to enable the necessary measurements. At the device level, SiGe heterojunction bipolar transistors (HBTs), field-effect transistors (FETs), and resistors are verified to maintain acceptable functionality across the temperature range, laying the foundation for high temperature circuit design. This work also includes the characterization of existing bandgap references circuits, redesign for high temperature operation, validation, and further optimization recommendations. In addition, the performance of temperature sensor, operational amplifier, and output buffer circuits under extreme high temperature conditions is presented. To the author's knowledge, this work represents the first demonstration of functional circuits from a SiGe technology platform in ambient temperatures up to 300°C; furthermore, the optimized bandgap reference presented in this work is believed to show the best performance recorded across a 500°C range in a bulk-silicon technology platform.

Hydrocarbon exploration, global navigation satellite systems, computed tomography, and aircraft avionics are just a few examples of applications that require system operation at an ambient temperature, pressure, or radiation level outside the range covered by military specifications. The electronics employed in these applications are known as "extreme environment electronics." On account of the increased cost resulting from both process modifications and the use of exotic substrate materials, only a handful of semiconductor foundries have specialized in the production of extreme environment electronics. Protection of these electronic systems in an extreme environment may be attained by encapsulating sensitive circuits in a controlled environment, which provides isolation from the hostile ambient, often at a significant cost and performance penalty. In a significant departure from this traditional approach, system designers have begun to use commercial off-the-shelf technology platforms with built in mitigation techniques for extreme environment applications. Such an approach simultaneously leverages the state of the art in technology performance with significant savings in project cost. Silicon-germanium is one such commercial technology platform that demonstrates potential for deployment into extreme environment applications as a result of its excellent performance at cryogenic temperatures, remarkable tolerance to radiation-induced degradation, and monolithic integration with silicon-based manufacturing. In this dissertation the radiation response of silicon-germanium technology is investigated, and novel transistor-level layout-based techniques are implemented to improve the radiation tolerance of HBT digital logic.

This thesis investigates the effects of low temperatures on Silicon Germanium (SiGe) Hterojunction Bipolar Transistors (HBT) BiCMOS technology. A comprehensive set of dc measurements were taken on first, second, third and fourth generation IBM SiGe technology over a range of temperatures (room temperature to 43K for first generation, and room temperature to 15K for the rest). This work is unique in the sense that this sort of comprehensive study of dc characteristics on four SiGe HBT technology generations over a wide range of temperatures has never been done before to the best of the authors knowledge.

Η παρούσα διπλωματική πραγματεύεται τη μελέτη και κατασκευή ενός κυκλώματος οδήγησης ενός Σύγχρονου Κινητήρα Μαγνητικής Αντίδρασης. Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών της Πολυτεχνικής Σχολής του Πανεπιστημίου Πατρών. Σκοπός είναι η μελέτη και κατασκευή ενός κυκλώματος Τριφασικού Αντιστροφέα Πηγής Τάσης, ο οποίος θα επιτρέπει την υλοποίηση βαθμωτού και διανυσματικού ελέγχου της λειτουργίας του Σύγχρονου Κινητήρα Μαγνητικής Αντίδρασης. Στην παρούσα διπλωματική εργασία υλοποιήθηκε βαθμωτός έλεγχος της γωνιακής ταχύτητας περιστροφής του δρομέα (με σταθερό λόγο V/f), ανοιχτού και κλειστού βρόχου. Όσον αφορά το Σύγχρονο Κινητήρα Μαγνητικής Αντίδρασης, τα τελευταία χρόνια έχει αναπτυχθεί έντονο επιστημονικό ενδιαφέρον σχετικά με τη βελτιστοποίηση της κατασκευής του, καθώς και του ελέγχου της λειτουργίας του μέσω διαφόρων μεθόδων ελέγχου. Το κυριότερο χαρακτηριστικό του συγκεκριμένου κινητήρα αποτελεί η έλλειψη οποιασδήποτε μορφής διέγερσης στον δρομέα. Επομένως, η δημιουργούμενη ροπή οφείλεται αποκλειστικά στη λεγόμενη ροπή μαγνητικής αντίδρασης, από την οποία προέρχεται και η ονομασία του κινητήρα. Στην παρούσα διπλωματική εργασία, γίνεται μια εισαγωγή στους κινητήρες εναλλασσόμενου ρεύματος, ενώ η ανάλυση επικεντρώνεται στον προαναφερθέντα κινητήρα, προσεγγίζοντάς τον από διάφορες πλευρές (κατασκευαστικά χαρακτηριστικά, μαθηματικό μοντέλο, σύγκριση με άλλους τύπους κινητήρων). Επιπλέον γίνεται μια θεωρητική ανάλυση του Τριφασικού Αντιστροφέα Πηγής Τάσης, ο οποίος χρησιμοποιείται για την οδήγηση του κινητήρα, καθώς και της τεχνικής Διαμόρφωσης Εύρους Παλμών, η οποία χρησιμοποιείται για την παλμοδότηση των ημιαγωγικών στοιχείων ισχύος. Η προσομοίωση του κινητήρα ήταν το επόμενο βήμα για την καλύτερη κατανόηση της δυναμικής απόκρισης του κινητήρα. Η παρούσα διπλωματική εργασία συνεχίζεται με την αναφορά στο σχεδιασμό και την κατασκευή των απαραίτητων κυκλωμάτων, ενώ ιδιαίτερη αναφορά γίνεται στο μικροελεγκτή που χρησιμοποιήθηκε στην υπάρχουσα εργασία, καθώς και στο πρόγραμμα που δημιουργήθηκε για τις λειτουργίες ανοιχτού και κλειστού βρόχου. Τέλος, η ολοκλήρωση της διπλωματικής εργασίας έρχεται μέσω της παρουσίασης των πειραματικών αποτελεσμάτων, στα οποία έγινε χρήση των κατασκευασθέντων κυκλωμάτων. / This Thesis is focused on the study and development of a Drive System for the Synchronous Reluctance Motor. This work was conducted in the laboratory of Electromechanical Energy Conversion, at the department of Electrical and Computer Engineering, in the University of Patras, Greece. The main purpose of this project was the study and construction of a three Phase Voltage Source Inverter for the control of the performance of a Synchronous Reluctance Motor by the implementation of Scalar and Vector control. In this thesis, a scalar V/f control scheme was applied, both open and closed loop, for the control of the rotational speed of the rotor. As far as the Synchronous Reluctance Motor is concerned, in the latest years a great interest has emerged around this motor, which mainly focuses in the optimization of its construction and control. The main feature of this motor is that the rotor does not have any field winding. By this way, the output torque is produced only by the so called reluctance torque. In this work, an introduction on the AC motor is done, while the main interest is focused on the already mentioned motors. The analysis of this motor covers many aspects, such as the construction characteristics, the mathematical model of the motor, as well as a comparison with other popular motors. Moreover, the three Phase Inverter is studied, since it is used for the control of the motor. Also, there is an extended reference on the Pulse Width Modulation technique, which is used for the control of power devices. In the next chapters, the simulation of this motor is presented, since it is necessary fot the understanding of its dynamic behavior. In the following, an analysis on the design and construction of the required printed circuit boards is done, while the microcontroller which was used is presented in a more detailed way. The flowacharts of the open and closed loop control methods of the rotational speed are also given. Finally, the experimental results for both cases are presented and analysed.

O presente trabalho tem por objetivo o desenvolvimento de um modelo analógico dinâmico do IGBT 2MBI1200U4G-170 para simulação SPICE para a análise de tempos de comutação, perdas e corrente de carga. Este desenvolvimento foi motivado pelo fato de não se dispor de modelos prontos para IGBT para faixas de tensão e corrente na ordem de kV e kA, destinado ao projeto de um conversor CC para controle de motores de tração em locomotivas diesel-elétricas. Como parte do processo se fez uma tentativa de modificação do modelo padrão de IGBT da plataforma Cadence Orcad 16.5, baseada nos trabalho de Hefner, considerada uma forma de modelo físico. Verificou-se que o correto levantamento dos dados para o modelo físico não seria compensatório frente às análises desejadas, o que gerou necessidade por outras formas de modelagem. Decidiu-se por um modelo analógico, obtido com dados do catálogo do componente descritos em tabelas e como fontes de tensão e corrente. Os resultados mostraram-se adequados para projeto térmico, análise de formas de onda e corrente de porta e coletor. A simulação é comparada com curvas da documentação do fabricante e com dados obtidos a partir de testes estáticos em laboratório com duas topologias. Testes foram feitos com tensão de entrada de 74V, 300V, 900V e 1000V, frequências de comutação de 200Hz, 416Hz, 1kHz e 2kHz e correntes de carga de até 1400A. A corrente de carga apresentou diferenças de até 3% com a medida em laboratório e a temperatura divergiu em até 7% com a medida no dissipador do protótipo usado. / This paper presents the design report for an analog IGBT SPICE model, part number 2MBI1200U4G-170. The modeling was perceived as a interesting tool in order to analyze the switching times and losses during the development, not performed at the University, of a chopper DC-DC converter used for current control of traction motors of diesel-electric locomotives. The main motivational factor was that an practical and quick approach was wanted and none standard model was found for the intended IGBT part number. As part of the process, an attempt to modify the standard SPICE model of the Cadence Orcad 16.5, which is a physics model based on Hefner works, was made. It was verified that the correct data collecting for the standard model would not be compensatory, so other modeling techniques were needed. It was decided an analog modeling would be used. The modeling achieved uses no more than the information found on the component datasheet described in tables format, voltage and current sources. The validation was done in two different topologies with load currents up to 1400A, switching frequencies of 200Hz, 416Hz, 1kHz and 2kHz and input voltages of 74V, 300V, 900V and 1000V . Comparatives were done with the vendor catalog and laboratory data. The model is satisfactory for heat, collector and gate currents analysis. The simulation current and temperature results showed differences up to 3% and 7%, respectively, when compared to laboratories measurements.