This letter presents a low-noise amplifier with a 3 dB-bandwidth, from 55 to 74 GHz, excellent noise performance and low power consumption based on a three-stage common-source topology. For the first time to the authors’ best knowledge, an analytical equation that also considers the gate–drain capacitance is derived for the employed shunt–series transformer feedback input matching network. To enable shunt–series transformer feedback matching without significant gain reduction a highly asymmetric transformer is designed. Furthermore, a compact transformer-implemented T-shaped output matching network is investigated to minimize the required area. To prove these concepts, the circuit has been fabricated in a 22 nm fully depleted silicon-on-insulator technology. Thanks to the transformer-based matching, an ultra-compact active footprint of 0.039 mm² is achieved. At a power consumption of 8.4 mW from a 0.41 V supply an average noise figure of 4.8 dB and a peak gain of 14.2 dB has been measured. In- and output matching better than −10 dB over the 19 GHz wide 3 dB-bandwidth are demonstrated.

Разработан прототип приемника-декодера сигналов стандарта ADS-B. В ходе разработки предложена структурная схема выполнения устройства, а так же проведено комплексное исследование элементов устройства. Предложены принципиальные схемы и прототипы печатных плат для таких устройств как усилитель, инжектор питания, малошумящий усилитель, логарифмический детектор, а так же рассмотрена топология фильтра с двойной комплементарной спиралью. Приводятся результаты моделирования в различных пакетах программного обеспечения перечисленных выше устройств, а так же результаты их экспериментального исследования. Для обеспечения симуляции сигналов стандарта, а так же для обработки создано программное обеспечение. / A prototype of the receiver-decoder for the ADS-B system. During the development the block diagram of the device was proposed and a comprehensive study of elements of the device was done. Circuit schematics and layouts of printed circuit boards for devices such as amplifier, power injector, low noise amplifier, logarithmic detector and filter with a double complementary spiral were proposed. The results of the simulation of the listed above devices in a variety of software packages, as well as the results of an experimental study are presented. In order to simulate the signals, as well as for processing them special software was created.

This letter presents a scalable technique to reduce the power of the analog input stage in neural recording front-ends in Globalfoundries 22 -nm FDSOI. The back-gate voltages are adapted to reduce the threshold voltage and thus allow supply voltage reduction. This adaption increases PVT stability of subthreshold circuits. A comparison to a conventional delta–sigma ADC is drawn and the minimum power point is measured, resulting in 0.7 - μW /channel at 7.2 - μV input-referred noise. Additionally, the transition to smaller technologies promises low-power consumption in the digital domain, by allowing smaller supply voltage and higher integration density.

No description available.

Like cell to the human body, transistors are the basic building blocks of any electronics circuits. Silicon has been the industries obvious choice for making transistors. Transistors with large size occupy large chip area, consume lots of power and the number of functionalities will be limited due to area constraints. Thus to make the devices smaller, smarter and faster, the transistors are aggressively scaled down in each generation. Moore's law states that the transistors count in any electronic circuits doubles every 18 months. Following this Moore's law, the transistor has already been scaled down to 14 nm. However there are limitations to how much further these transistors can be scaled down. Particularly below 10 nm, these silicon based transistors hit the fundamental limits like loss of gate control, high leakage and various other short channel effects. Thus it is not possible to favor the silicon transistors for future electronics applications. As a result, the research has shifted to new device concepts and device materials alternative to silicon. Carbon is the next abundant element found in the Earth and one of such carbon based nanomaterial is graphene. Graphene when extracted from Graphite, the same material used as the lid in pencil, have a tremendous potential to take future electronics devices to new heights in terms of size, cost and efficiency. Thus after its first experimental discovery of graphene in 2004, graphene has been the leading research area for both academics as well as industries. This dissertation is focused on the analysis and optimization of graphene based circuits for future electronics. The first part of this dissertation considers graphene based transistors for analog/radio frequency (RF) circuits. In this section, a dual gate Graphene Field Effect Transistor (GFET) is considered to build the case study circuits like voltage controlled oscillator (VCO) and low noise amplifier (LNA). The behavioral model of the transistor is modeled in different tools: well accepted EDA (electronic design automation) and a non-EDA based tool i.e. \simscape. This section of the dissertation addresses the application of non-EDA based concepts for the analysis of new device concepts, taking LC-VCO and LNA as a case study circuits. The non-EDA based approach is very handy for a new device material when the concept is not matured and the model files are not readily available from the fab. The results matches very well with that of the EDA tools. The second part of the section considers application of multiswarm optimization (MSO) in an EDA tool to explore the design space for the design of LC-VCO. The VCO provides an oscillation frequency at 2.85 GHz, with phase noise of less than -80 dBc/Hz and power dissipation less than 16 mW. The second part of this dissertation considers graphene nanotube field effect transistors (GNRFET) for the application of digital domain. As a case study, static random access memory (SRAM) hs been design and the results shows a very promising future for GNRFET based SRAM as compared to silicon based transistor SRAM. The power comparison between the two shows that GNRFET based SRAM are 93% more power efficient than the silicon transistor based SRAM at 45 nm. In summary, the dissertation is to expected to aid the state of the art in following ways: 1) A non-EDA based tool has been used to characterize the device and measure the circuit performance. The results well matches to that obtained from the EDA tools. This tool becomes very handy for new device concepts when the simulation needs to be fast and accuracy can be tradeoff with. 2)Since an analog domain lacks well-design design paradigm, as compared to digital domain, this dissertation considers case study circuits to design the circuits and apply optimization. 3) Performance comparison of GNRFET based SRAM to the conventional silicon based SRAM shows that with maturation of the fabrication technology, graphene can be very useful for digital circuits as well.

Phased array element RF front ends typically use single pole double throw (SPDT) switches or circulators with high isolation to prevent leakage of transmit energy into the receiver circuits. However, as phased-array designs scale to the millimeter-wave range, with high degrees of integration, the physical size and performance degradations associated with switches and circulators can present challenges in meeting system performance and size/weight/power (SWAP) requirements. This work demonstrates a loss-aware methodology for analysis and design of switchless transmit/receive (T/R) circuits. The methodology provides design insights and a practical, generally applicable approach for solving the multi-variable optimization problem of switchless power amplifier/low-noise amplifier (PALNA) matching networks, which present optimal matching impedances to both the power amplifier (PA) and the low noise amplifier (LNA) while maximizing power transfer efficiency and minimizing dissipative losses in each (transmit or receive) mode of operation. Three PALNA example designs at W-band are presented in this dissertation, each following a distinct design methodology. The first example design in 32SOI CMOS leverages PA and LNA circuits that already include 50 Ω matching networks at both input and output. The second example design in 8XP SiGe develops the PA and LNA circuits and integrates the PA output and LNA input matching networks into the PALNA matching network that connects the PA and the LNA. The third design in 32SOI CMOS leverages the loss-aware PALNA design methodology to develop a PALNA that achieves simulated maximum power added efficiency of 18 % in transmit and noise figure of 7.5 dB in receive at 94 GHz, which is beyond the published state-of-art for T/R circuits. In addition, for comparison purposes, this dissertation also presents an efficient, switch-based T/R circuit design in 32SOI CMOS technology, which achieves a simulated maximum power added efficiency of 15 % in transmit and noise figure of 6.5 dB in receive at 94 GHz, which is also beyond the published state-of-art for T/R circuits. / Doctor of Philosophy / In military and commercial applications, phased arrays are devices primarily used to achieve focusing and steering of transmitted or received electromagnetic energy. Phased arrays consist of many elements, each with an ability to both transmit and receive radio frequency (RF) signals. Each element incorporates a power amplifier (PA) for transmit and a low noise amplifier (LNA) for receive, which are typically connected using a single pole double throw (SPDT) switch or a circulator with high isolation to prevent leakage of transmit energy into the receiver circuits. However, as phased arrays exploit the latest technological advances in circuit integration and their frequencies of operation increase, physical size and performance degradations associated with switches and circulators can present challenges in meeting system performance and size/weight/power (SWAP) requirements. This dissertation provides a loss-aware methodology for analysis and design of switchless transmit/receive (T/R) circuits where the switches and circulators are replaced by carefully designed power amplifier/low-noise amplifier (PALNA) impedance matching networks. In the switchless T/R circuits, the design goals of maximum power efficiency and minimum noise in transmit and receive, respectively, are achieved through impedance matching that is optimal and low-loss in both modes of operation simultaneously. Three distinct PALNA example designs at W-band are presented in this dissertation, each following a distinct design methodology. With each new design, lessons learned are leveraged and design methodologies are enhanced. The first example design leverages already available PA and LNA circuits and connects them using 50 Ω transmission lines whose lengths are designed to guarantee optimum impedance match in receive and transmit mode of operation. The second example design develops new PA and LNA circuits and connects them using 50 Ω transmission lines whose lengths are designed to simultaneously achieve optimum impedance matching for maximum power efficiency in transmit mode of operation and lowest noise in receive mode of operation. The third design leverages a loss-aware PALNA design methodology, a multi-variable optimization procedure, to develop a PALNA that achieves simulated maximum power added efficiency of 18 % in transmit and noise figure of 7.5 dB in receive at 94 GHz, which is beyond the published state-of-art for T/R circuits. In addition, for comparison purposes with the third PALNA design, this dissertation also presents an efficient, switch-based T/R circuit design, which achieves a simulated maximum power added efficiency of 15 % in transmit and noise figure of 6.5 dB in receive at 94 GHz, which is also beyond the published state-of-art for T/R circuits.

An accurate, high-speed, fully differential difference amplifier for current sensing utilizing the chopper approach was implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology. Unlike state-of-the-art solutions, we use a higher chopping frequency in the MHz range due to the bandwidth requirements of the introduced circuits for the latter application, namely, low-side phase-current measurement in motor control circuits. Except the low-pass filter (LPF) effect of the output stage, no additional LPF was integrated in hardware at the output of the circuits. We show that on the other hand a digital LPF, which can be integrated in the field-programmable gate-array (FPGA) logic or microcontroller used for the motor control, offers a higher flexibility in terms of filter design. Weak input signals of only few mV can be reconstructed with a high accuracy. This is demonstrated for a 500 kHz rectangular signal and a chopping frequency of 20 MHz. Note that an input-signal frequency of several hundreds of kHz with harmonics in the MHz region is very challenging for chopper amplifiers. Still, a significant decrease of the input-referred noise is demonstrated, especially cancelling out the 1/f-noise achieving a remaining noise floor of approximately 8.5 nV/√Hz. Overall, the input-referred noise level can be pushed far below 50 μV (root mean square). Moreover, using a quite relaxed second-order Butterworth filter with a 3 dB corner frequency of 1 MHz, input-referred noise levels of 10 μV (root mean square) can be easily achieved at the costs of reduced bandwidth. The lowest achieved input offset is 50 μV. The gain is adjusted by resistive feedback and is approximately 40 dB. Hence, the amplifier is suitable for current sensing in motor control circuits, and a significant reduction of the shunt resistance typically used for this purpose will be possible.

Le principal objectif de ce travail est le développement, l'application et la validation de nouveaux traceurs hydrogéologiques sur la base de signatures spectrales spécifiques des matières organiques dissoutes (MOD) et du suivi de leur évolution dans les hydrosystèmes karstiques méditerranéens. Pour cela, de nombreuses analyses hydrodynamiques et hydrochimiques ont été réalisées, et plusieurs méthodes de caractérisation de la MOD ont été utilisées. Le travail s'est alors fondé sur l'étude de différents niveaux du bassin expérimental de la Fontaine de Vaucluse (sol, épikarst et zone non saturée), grâce à un accès privilégié rendu possible par le Laboratoire Souterrain à Bas Bruit de Rustrel-Pays d'Apt (Vaucluse, France). Un bon traceur hydrogéologique requiert des caractéristiques particulières (solubilité dans l'eau, stabilité, tendance faible à l'adsorption, limite de détection faible et des variations bien identifiables). Les composés organiques correspondant le mieux à ces critères sont des substances dérivées de la décomposition de la lignine. Leurs différentes caractéristiques et leurs faibles concentrations dans l'hydrosystème poussent à utiliser des modes de détection suffisamment sensibles tels que la spectrométrie de fluorescence et la Résonance Paramagnétique Électronique (RPE). L’application conjointe des analyses en RPE et en spectrofluorimétrie sur les lixiviats de sols et les eaux souterraines du LSBB permet de proposer deux protocoles de traçages hydrogéologiques. Le premier concerne la détermination des zones superficielles de sol appartenant au bassin d’alimentation des écoulements suivis. Le second, s'appuyant notamment sur l'évolution et la dynamique des MOD dans l'hydrosystème, correspond au développement de traceurs quantitatifs du temps de transit de l'eau pouvant s’appliquer de manière évènementielle par le marquage d’une période particulière de leur variation, ou en continu permettant ainsi le suivi des variations du temps de transit. Enfin, le rapprochement des résultats obtenus par ces nouveaux traceurs organiques avec ceux d'un traceur isotopique (l'oxygène 18) a permis de tester la validité des calculs du temps de transit, mais aussi de démontrer leur complémentarité / The aim of this study is to develop, apply and validate new hydrogeological tracers, based on specific spectral fingerprints of Dissolved Organic Matter (DOM), and a monitoring of their evolution in Mediterranean karstic hydrosystems. Many hydrodynamic and hydrochemical analyses were made, and several DOM characterization methods were used. The basis of this work is therefore the study of different levels of Fontaine de Vaucluse experimental basin (soil, epikarst and unsaturated zone), thanks to a privileged access : the Low-Noise Underground Laboratory of Rustrel - Pays d’Apt (Vaucluse, France). Good hydrogeological tracers require specific characteristics (water solubility, stability, a low tendency to adsorption, a low detection limit and identifiable variations). Organic compounds, corresponding to these criterions at best, are lignin-derived compounds. Their different characteristics and their low concentrations in the hydrosystem drive us to use sensitive enough detection methods, such as fluorescence spectrometry and Electronic Paramagnetic Resonance (EPR). Linked application of EPR and spectrofluorimetric analyses of leachate soil and LSBB groundwater allow to develop two hydrogeological tracing protocols. The first one concerns the determination of upper soil zone, which belongs to monitoring flow catchment area. The second one, using the evolution and the dynamics of DOM in the hydrosystem, corresponds to the development of transit time qualitative tracers, which apply either in an event-driven way by the marking of specific period of their variations, or continuously allowing the monitoring of transit time variations. Finally, the comparison between the results obtained by these new organic tracers and by an isotopic tracer (18 Oxygen) allows to validate transit time calculations and prove their complementarity

Cette thèse porte sur la conception, la réalisation et la caractérisation de diodes lasers de puissance, faible bruit à 1.5 µm sur InP pour des applications d’optique hyperfréquence, notamment pour des liaisons optiques analogiques de grande dynamique pour les systèmes radar. La première partie du travail a consisté à modéliser et concevoir des structures laser DFB ayant de faibles pertes internes. Ces structures, appelées lasers à semelle, incorporent une couche épaisse de matériaux entre la zone active et le substrat pour agrandir et délocaliser le mode propre optique des zones dopées p. La complexité de la conception résidait dans le bon compromis à trouver entre les performances statiques et dynamiques. Nous avons réalisé des diodes-lasers DFB avec une puissance > 150 mW, un rendement de 0.4 W/A, un niveau de bruit de 160 dB/Hz et une bande passante de modulation à 3 dB de 7.5 GHz. Les composants ont ensuite été caractérisés puis évalués dans des liaisons analogiques. Nous avons démontré des performances de gain de liaison, de dynamique et de point de compression à l’état de l’art mondial. En bande L (1-2 GHz) par exemple, nous avons montré des liaisons avec 0.5 dB de gain, un point de compression de 21 dBm et une dynamique (SFDR) de 122 dB.Hz2/3.En utilisant la même méthodologie de conception, la dernière partie du travail de thèse a été consacrée à la réalisation et à la caractérisation de lasers de puissance à verrouillage de modes pour la génération de train d’impulsions ultra-courts et la génération de peignes de fréquences. Ces structures présentent de très faibles largeurs de raie RF (550 Hz) et de très fortes puissances optiques (> 18 W en puissance crête). / This work focuses on the design, realization and characterization of high power, low noise 1.5 µm diode lasers for microwave applications and more particularly for high dynamic optical analog link for radar systems. The first part of this study deals with modeling and design of low internal losses DFB laser structures. These specific structures are called slab-coupled optical waveguide lasers, and are composed of a thick layer between the active layer and the substrate. The aim of this waveguide is to enlarge the optical eigenmode and to move the optical mode away from p-doped layers. The main difficulty was to find the good trade-off between laser static performances (optical power, efficiency) and dynamic performances (RIN and modulation bandwidth). We have succeeded in developing high efficiency (0.4 W/A), low noise (RIN ≈ 160 dB/Hz) DFB lasers with more than 150 mW and a 3 dB modulation bandwidth up to 7.5 GHz. We have then characterized our components on wide band and narrow band analog links. We have demonstrated state of the art gain links, dynamic and 1 dB compression power. In the L band (1-2 GHz) for example, we have obtained an optical link with a gain of 0.5 dB, a compression power of 21 dBm and a dynamic (SFDR) of 122 dB.Hz2/3.Finally we have applied the methodology and the design of slab-coupled optical waveguide structures to develop high power mode-locked lasers for ultra-short pulses generation and for optical and electrical comb generation. We have demonstrated narrow RF linewidth (550 Hz) lasers with very high power (continuous power > 400 mW and peak power > 18 W).

The growth in the number of wireless devices and applications underscores the need for characterizing and mitigating interference induced problems such as distortion and blocking. A typical interference scenario involves the detection of a small amplitude signal of interest (SOI) in the presence of a large amplitude interfering signal; it is desirable to attenuate the interfering signal while preserving the integrity of SOI and an appropriate dynamic range. If the frequency of the interfering signal varies or is unknown, an adaptive notch function must be applied in order to maintain adequate attenuation. This work explores the performance space of a phase cancellation technique used in implementing the desired notch function for communication systems in the 1-3 GHz frequency range. A system level model constructed with MATLAB and related simulation results assist in building the theoretical foundation for setting performance bounds on the implemented solution and deriving hardware specifications for the RF notch subsystem devices. Simulations and measurements are presented for a Low Noise Amplifer (LNA), voltage variable attenuators, bandpass filters and phase shifters. Ultimately, full system tests provide a measure of merit for this work as well as invaluable lessons learned. The emphasis of this project is the on-wafer LNA measurements, dependence of IC system performance on mismatches and overall system performance tests. Where possible, predictions are plotted alongside measured data. The reasonable match between the two validates system and component models and more than compensates for the painstaking modeling efforts. Most importantly, using the signal to interferer ratio (SIR) as a figure of merit, experimental results demonstrate up to 58 dB of SIR improvement. This number represents a remarkable advancement in interference rejection at RF or microwave frequencies.