The use of Community Antenna Television Network (CATV) cable systems are a very common way that subscribers use to access the internet and download data. The transmitters that send the signals to subscribers must conform to a very stringent specification known as DOCSIS. Using traditional high frequency design techniques to meet this specification often lead to a lengthy and difficult production process where several calibrations have to be made. In order to send a digitally modulated signal that conforms to the DOCSIS specification some sort of conversion between the discrete digital domain and the analog domain must occur. To accomplish this a Digital to Analog converter is used. In recent years, the clocking or sampling frequency that can be used for Digital to Analog converters (DACs) has been rapidly increasing. The clocking frequency is directly proportional to the bandwidth that can be transmitted. DAC's that have exceptionally high clocking frequencies can be referred to as Radio Frequency DAC's. The clocking frequency of these devices has now progressed to the point where direct digital synthesis can be used for a DOCSIS transmitter without any analog frequency conversion stages. Since Radio Frequency DAC's are real devices the output is not a perfect representation of the discrete signal that is sent to it. Unwanted distortion is added that can be measured at the analog output. Removal of this distortion or at least significantly reducing it could be the difference meeting or or not meeting the DOCSIS specification. This thesis will explore the usage of these devices in this application. The basic structure of DAC's as well as the distortion signals themselves will be investigated in order to develop a method where the distortion can be removed. Ideally this can be done in a way that is suitable to be integrated into a transmitter architecture and meet the specification. The frequency response of the major distortion products across the DOCSIS band is measured. Once this is done a way to match these frequency responses is needed so a cancellation signal can be created that removes the distortion. A method is developed that uses an iterative algorithm to find filter coefficients whose frequency response matches that of the distortion signals as closely as possible. Since these cancellation signals are added to the discrete signal to be transmitted before the interface with the Radio Frequency DAC the process is known as pre-distortion. The generated coefficients are used in digital filters as part of a pre-distortion design. Tests are performed with discrete signals that are close approximates to a DOCSIS signal that would be sent to a subscriber. Measured results show a decrease in the power of targeted distortion signals. The reduction of the distortion level is enough that the DOCSIS specification is met for all test signals.

During the thesis, a two-staged analog baseband circuit incorporating a passive analog filter and a wideband voltage amplifier were successfully designed, implemented in an IC mask layout in a 65nm CMOS technology, and joined with a previously designed analog front-end design to form a wideband observation receiver. The baseband circuit is capable of receiving an IF bandwidth up to 990MHz produced by the analog front-end using low-side injection. The final circuit shows high IMD3 of at least 90 dBc. The voltage amplifier delivers a voltage amplification of 15 dB with around 0.08 dB amplitude precision over the bandwidth, while the passive filter is capable of a passband amplitude precision of 0.67 dB over the bandwidth, while effectively suppress signal images created by the mixer with at least 60 dBc. Both stages were realized in an IC mask layout, in addition, the filter layout were simulated using an EM simulator.

The transition from the 5G to the 6G era is a pivotal juncture in contemporary wireless communication. Under such a circumstance, Digital Pre-Distortion (DPD) technology has established its significance as an effective method to linearize Power Amplifiers. However, DPD is facing a series of challenges, notably the increased bandwidth which necessitates more complex modeling techniques. This thesis focuses on the fact that the DPD requires multi-ported memories for the Look-Up-Tables to store correction coefficients, where two research questions are identified. Firstly, this thesis analyses the power, area, and delay-performance trade-offs with an increase in the number of read and write ports of Flip-Flop (FF)-based memories. Secondly, this thesis evaluates and compares the performance of the conventional FF-based multi-ported memories and algorithmic FF-based multi-ported memories. As a Master’s thesis project, this research utilizes the knowledge and practice skills expected of a Master’s student specializing in Embedded Systems. In this thesis, conventional and algorithmic multi-ported memories are implemented and evaluated after studying related works. Subsequently, an industrial Application-Specific Integrated Circuit (ASIC) design flow is executed, undergoing iterative refinements. And in the end, the conclusions are drawn based on an analysis of the software reports. The results underscore that area and power consumption exhibit linear growth alongside increased port numbers within conventional multi-ported memories. Also, the algorithmic multi-ported memory presents a promising alternative, engendering improvements across all three dimensions of delay, area, and power consumption. The implemented memories can be integrated into DPD forward path with customized port numbers in the future, offering adaptability in terms of port configuration and better performance in terms of timing, area and power. Additionally, these implemented memories stand as a valuable point of reference for engineers engaged in the development of FF-based multi-ported memories within the context of ASIC. / Övergången från den 5G- till den 6G- eran är en avgörande tidpunkt inom samtida trådlös kommunikation. Under sådana omständigheter har DPDtekniken etablerat sin betydelse som en effektiv metod för att linjärisera effektförstärkare. Dock står DPD inför en rad utmaningar, särskilt den ökade bandbredden som kräver mer komplexa modelleringstekniker. Denna avhandling fokuserar på det faktum att DPD kräver flerportsminnen för att Look-Up-Tables ska lagra korrigeringskoefficienter, där två forskningsfrågor identifieras. För det första analyserar denna avhandling effekt- , area- och fördröjningsprestanda-avvägningar med en ökning av antalet läs- och skrivportar för FF-baserade minnen. För det andra utvärderar och jämför denna avhandling prestandan hos konventionella FF-baserade multiportade minnen och algoritmiska FF-baserade multiportade minnen. Som ett masteruppsatsprojekt använder denna forskning de kunskaper och övningsfärdigheter som förväntas av en masterstudent som specialiserar sig på inbyggda system. I denna avhandling implementeras och utvärderas konventionella och algoritmiska flerportade minnen efter att ha studerat relaterade arbeten. Nästa steg är att genomföra en industriell ASIC-designflöde som genomgår iterativa förbättringar. Och till slut dras slutsatserna baserat på en analys av mjukvarurapporterna. Denna avhandling understryker att area och strömförbrukning ökar linjärt med ökade portnummer inom konventionella flerportade minnen. Å andra sidan presenterar det algoritmiska flerportade minnet ett lovande alternativ och ger förbättringar inom alla tre dimensioner av fördröjning, area och strömförbrukning. De implementerade minnena kan integreras i DPD-signalförloppet med anpassade portnummer i framtiden och erbjuda anpassningsbarhet när det gäller portkonfiguration och bättre prestanda vad gäller tid, area och ström. Dessutom utgör dessa implementerade minnen en värdefull referenspunkt för ingenjörer som är engagerade i utvecklingen av FF-baserade flerportade minnen inom ramen för ASIC.

[pt] Os principais problemas causados pela passagem de múltiplas portadoras por dispositivos não lineares são, conhecidamente, a conversão AM/AM, a conversão AM/PM, e a intermodulação. Estes problemas estão presentes tanto na transmissão via satélite, onde amplificadores de alta potência (HPAs) e transponders não lineares estão presentes, quando na radiodifusão terrestre onde, com o objetivo de ampliar ao máximo o tamanho da área geográfica na qual o serviço é oferecido, são utilizados amplificadores de alta potência operando em sua região não-linear. Neste contexto encontram-se os sinais multiportadora do tipo OFDM, amplamente utilizados na radiodifusão de sinais digitais de TV. Com o objetivo de minorar efeitos de canais não lineares sobre sinais OFDM, o presente trabalho propõe a utilização de um esquema de pré-distorção não linear modelado matematicamente através de uma série complexa de potências. Duas estratégias são consideradas no dimensionamento do esquema de pré-distorção: a redução da soma das potência dos produtos de intermodulação de ordens especificadas e a equalização das potências dos diversos produtos de intermodulação. Analises de configurações baseadas nestas duas estratégias são apresentadas juntamente com resultados numéricos envolvendo situações específicas de interesse. / [en] The main problems of multiple carriers through non-linear devices are, AM / PM conversion, conversion AM / PM conversion, and intermodulation. These problems are usually present in satellite transmissions, where high-power amplifiers (HPAs) and nonlinear transponders are used, as well as in terrestrial broadcasting systems where, in order to enlarge the service area(geographical area in which the service is offered). High-power amplifiers operating in their non-linear region are used. The multicarrier transmission called OFDM, which is widely used in TV broadcasting digital signals falls in this context. In order to alleviate the effects of nonlinear channels on OFDM signals, the present study suggests the use of a pre-distortion system mathematically described through a complex power series. Two Strategies are considered in order to determine the pre-distortion system parameters: the reduction of the intermodulation power sum associated to intermodulation products of any specified order, and the equalization of the intermodulation power associated to intermodulation product of various orders. Analysis of configurations based on these two strategies are presented together with numerical results involving situations of specific interest.

<p>Spectrally pure signals are an indispensable requirement when the Signal Generator (SG) is to be used as part of a test bed. However, even sophisticated equipment may not comply with the needs imposed by certain applications. This work approaches the problem by using Digital Pre-Distortion (DPD) based on a polynomial memory-less model obtained for the SG.</p><p>Using the SG in arbitrary mode (ARB) an input signal is computer-generated and reproduced by the SG. Measurement accuracy is ensured using coherence sampling and grid matching to the Signal Analyzer (SA). Finally, careful time alignment is used to compare the transmitted and received three-tone signals to obtain the polynomials coefficients.</p><p>Results show that the accuracy of the model and the effectiveness of pre-distortion may vary depending on the amplitude of the three-tone signal. However, using polynomials of 5th and 9th degrees up to 15dB reduction of the 3rd order Inter-Modulation products can be obtained, and spurious powers may be lowered down to 70dBc.</p>

Spectrally pure signals are an indispensable requirement when the Signal Generator (SG) is to be used as part of a test bed. However, even sophisticated equipment may not comply with the needs imposed by certain applications. This work approaches the problem by using Digital Pre-Distortion (DPD) based on a polynomial memory-less model obtained for the SG. Using the SG in arbitrary mode (ARB) an input signal is computer-generated and reproduced by the SG. Measurement accuracy is ensured using coherence sampling and grid matching to the Signal Analyzer (SA). Finally, careful time alignment is used to compare the transmitted and received three-tone signals to obtain the polynomials coefficients. Results show that the accuracy of the model and the effectiveness of pre-distortion may vary depending on the amplitude of the three-tone signal. However, using polynomials of 5th and 9th degrees up to 15dB reduction of the 3rd order Inter-Modulation products can be obtained, and spurious powers may be lowered down to 70dBc.

Yes / RF power amplifiers in mobile WiMAX transceivers operate in an inherently nonlinear manner. It is possible to amplify the signal in the linear region, and avoid distortion, using output power back-off; however, this approach may suffer significant reduction in efficiency and power output. This paper investigates the use of Doherty techniques instead of back-off, to simultaneously achieve good efficiency and acceptable linearity. A 3.5 GHz Doherty RFPA has been designed and optimized using a large signal model simulation of the active device, and performance analysis under different drive levels. However, the Doherty EVM is generally poor for mobile WiMAX. Linearity may be improved by further digital pre-distortion, and a simple pre-distortion method using forward and reverse AM-AM and AM-PM modeling. Measurements on the realized amplifier show that this approach satisfies the EVM requirements for WiMAX base stations. It exhibits a PAE over 60%, and increases the maximum linear output power to 43 dBm, whilst improving the EVM.

Submitted by Geandra Rodrigues (geandrar@gmail.com) on 2018-06-14T14:24:37Z No. of bitstreams: 1 luizantoniocorreajunior.pdf: 10680548 bytes, checksum: ce7a694d4d68a5a959f30492cf71a879 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2018-06-27T14:51:20Z (GMT) No. of bitstreams: 1 luizantoniocorreajunior.pdf: 10680548 bytes, checksum: ce7a694d4d68a5a959f30492cf71a879 (MD5) / Made available in DSpace on 2018-06-27T14:51:20Z (GMT). No. of bitstreams: 1 luizantoniocorreajunior.pdf: 10680548 bytes, checksum: ce7a694d4d68a5a959f30492cf71a879 (MD5) Previous issue date: 2018-02-27 / Esta dissertação descreve, inicialmente, um sistema implementado em FPGA para a geração de modulações digitais. Posteriormente, descreve uma plataforma capaz de realizar a estimação de modelos com coeficientes lineares e demonstra aplicações de pré-distorção. O trabalho começa com uma breve visão sobre os conceitos básicos envolvidos na dissertação. É descrito como se comportam os sinais e os sistemas no domínio discreto, é feito um resumo sobre o que é um FPGA e, após isso, são analisadas figuras de mérito, ferramentas matemáticas utilizadas para medir a qualidade dos modelos. No capítulo 3, é apresentada uma ferramenta em FPGA capaz de gerar sinais com diversas modulações digitais que serão utilizadas na identificação e pré-distorção. No capítulo 4 é abordado a construção e validação de um algoritmo de estimação eficiente utilizando o método de Mínimos Quadrados. A identificação de um filtro, utilizando um sinal de trem de impulsos, é mostrado na seção 4.2. A resposta do filtro no domínio da frequência é comparada com a resposta medida por um equipamento comercial, onde os resultados mostram que o modelo obtido representa bem um filtro real. A criação de um modelo de pré-distorção é mostrado no capítulo 5. A qualidade do modelo é avaliada por quatro Figuras de Mérito diferentes. As conclusões sobre o trabalho e as pesquisas futuras são apresentadas no último capítulo. / This work describes initially a system implemented in FPGA for the generation of a digital modulations. After, it describes a platform capable of performing the estimation of a device under test. Finally, it shows applications of this platform for pre-distortion purposes. A brief overview of the basic concepts involved in the dissertation are presented, as signals and systems in the discrete domain, FPGA, and Figures of Merit, tools used to measure the quality of the models. In chapter 3, a FPGA tool capable of generating signals with various digital modulations is presented. This platform will lately be used for identification and pre-distortion purposes. Chapter 4 shows the construction of efficient estimation algorithm using the Least Squares method. The identification of a filter using a pulse wave signal is shown in the section 4.2, and the resulting frequency domain curve is compared to that generated by a commercial equipment, where results show that the estimated model represents well a real filter. A pre-distortion model of a filter is shown in the chapter 5. The quality of the model is evaluated by four different Figures of Merit. Conclusions about the work and future research are drawn in the last chapter.

Application Specific Integrated Circuits (ASICs) are critical to delivering on 5G’s promises of high speed, low latency, and expanded capacity. Digital Front-End (DFE) ASICs are particularly important components because they enhance crucial signal processing activities. It handles duties including carrier mixing, up-sampling, and modulation-demodulation, allowing for efficient data transmission and reception inthe complicated 5G environment. The main aim of this work is to develop a power estimation tool for DFE radio ASICs and to understand the different use cases. It also studies the spread of power consumption, taking into account process and metal variations. The thesis provides a detailed case study of the DFE ASIC, including its Intellectual Property (IP) blocks, configurations, and protocols. It investigates the power consumption of DFE ASICs under various conditions, including active processing, power-saving mode, and no clock. In this thesis we build a power model that describes how the factors affect the ASIC’s power consumption. It also performs spread analysis to evaluate the impact of all factors using MATLAB tool. Based on this we then generate three distributionmodels to study the combined likelihood of the variations. It also uses Monte Carlo simulation to understand total power usage. Through this work we can conclude that the power consumption of DFE ASICs is affected by a variety of factors. The power model and spread analysis can be usedto forecast and optimize power usage in 5G systems.

L'augmentation des performances des futurs systèmes dynamiques nécessite la prise en compte des phénomènes physiques non linéaires. Cette thèse apporte un éclairage et des contributions sur deux sujets complémentaires liés aux phénomènes dynamiques non linéaires. Le mémoire de thèse est divisé en deux parties.La première partie porte sur les non-linéarités des amplificateurs de puissance dans le cadre d'applications destinées aux télécommunications ou à la diffusion audio-visuelle. Plusieurs méthodes de modélisation et de linéarisation des amplificateurs de puissance ont été conçues et discutées. Un banc de test a été développé afin d'évaluer les méthodes sur des amplificateurs réels. La robustesse de ces techniques à un mauvais alignement temporel des signaux ainsi que leur capacité à faire face à des artefacts spectraux ont été évaluées. Par ailleurs, nous avons effectué une étude théorique sur l'existence et la prise en compte de solutions multiples dans l'approche adaptative par apprentissage indirect. La deuxième partie traite des systèmes dynamiques non linéaires qui présentent des solutions chaotiques. Ces systèmes sont bien connus, mais les techniques d'identification de ces solutions manquent de fiabilité ou nécessitent une puissance de calcul importante. Dans cette thèse, plusieurs méthodes utilisant également le calcul parallèle sont présentées. Les systèmes à commande différentielle fractionnaire sont brièvement discutés. Il est aussi montré, qu'il existe des systèmes liés à des fonctions de transfert non linéaires avec quantification pour lesquels les méthodes d'analyse classiques échouent / In order to achieve better performance of modern communication devices, that have to be operated on its physical limits, the nonlinear phenomena need to be taken into the account. This thesis brings insight into two different subjects related with nonlinear dynamical phenomena. The thesis itself is divided into two parts : the first part is focused on the domain of nonlinear power amplifiers from the system point of view. Several methods for modelization and linearization of power amplifiers have been designed and discussed. A test-bench has been assembled in order to evaluate the proposed methods on real power amplifiers. Then the robustness to time misalignment in the system and the ability to deal with spectral artifacts in the system of presented methods have been evaluated. Also a theoretical study has been conducted on the existence and management of multiple solutions in the frame of adaptive indirect learning approach. The second part deals with nonlinear dynamical systems that are exhibiting chaotic solutions. Such systems are well known, but techniques for identifying reliable such solutions are either missing or are computational intense. In this thesis several methods using also parallel computing are presented. Systems with fractional differential order are briefly discussed. It is as well shown, that there exists systems related with quantified nonlinear transfer functions for which the standard analyzing methods fails