Several studies have shown insufficient security in air traffic communication. The increase in air traffic in recent years also increases the need for improved security. CPDLC is used to communicate in text over the data link and ADS-B determines the position of an aircraft. These techniques are looked upon and simulated in the thesis. By proving that ADS-B and CPDLC messages can be transmitted and received with cheap and easy access equipment we want to show the simplicity in performing an attack. The thesis state a foundation to simulate attacks in the future so further work concerning the lack of security can be done.

The Internet of Things (IoT) has seen exceptional adoption in recent years, resulting in an unprecedented level of connectivity in personal and industrial domains. In parallel, software-defined radio (SDR) technology has become increasingly powerful, making it a compelling tool for wireless security research across multiple communication protocols. Specifically, SDRs are capable of manipulating the physical layer of protocols in software, which would otherwise be implemented statically in hardware. This flexibility enables research that goes beyond the boundaries of protocol specifications. This dissertation pursues four research directions that are either enabled by software-defined radio technology, or advance its utility for security research. First, we investigate the anti-tracking mechanisms defined by the Bluetooth Low Energy (BLE) wireless protocol. This protocol, present in virtually all wearable smart devices, implements address randomization in order to prevent unwanted tracking of its users. By analyzing raw advertising data from BLE devices using SDRs, we identify a vulnerability that allows an attacker to track a BLE device beyond the address randomization defined by the protocol. Second, we implement a compact, SDR-based testbed for physical layer benchmarking of wireless devices. The testbed is capable of emulating multiple data transmissions and produce intentional signal corruption in very precisely defined ways in order to investigate receiver robustness and undefined device behavior in the presence of malformed packets. We subject a range of Wi-Fi and Zigbee devices to specifically crafted packet collisions and "truncated packets" as a way to fingerprinting wireless device chipsets. Third, we introduce a middleware framework, coined "Snout", to improves accessibility and usability of SDRs. The architecture provides standardized data pipelines as well as an abstraction layer to GNU Radio flowgraphs which power SDR signal processing. This abstraction layer improves usability and maintainability by providing a declarative experiment configuration format instead of requiring constant manipulation of the signal processing code during experimentation. We show that Snout does not result in significant computational overhead, and maintains a predictable and modest memory footprint. Finally, we address the visibility problem arising from the growing number of IoT protocols across large bands of radio spectrum. We model an SDR-based IoT monitor which is capable of scanning multiple channels (including across multiple protocols), and employs channel switching policies to maximize freshness of information obtained by transmitting devices. We present multiple policies and compare their performance against an optimal Markov Decision Process (MDP) model, as well as through event-based simulation using real-world device traffic. The results of this work demonstrate the use of SDR technology in privacy and security research of IoT device communication, and open up opportunities for further low-layer protocol discoveries that require the use of software-defined radio as a research tool.

No description available.

In contemporary communication systems, Digital-to-Analog Converters (DAC), Signal Defined Radio (SDR) signal creation, and clock data recovery are essential components. DACs convert digital signals to analog signals, creating continuous waveforms. DACs provide versatility in the transmission of SDR by supporting a range of communication protocols. Clock data recovery enables precise signal recovery and synchronization at the receiver end. These elements work together to provide effective and high-quality communication systems across several sectors. With the development of quantum computing, these SDR systems also find extensive use in generating precisely timed signals for controlling components of a quantum computer and also for read-out operations from various specialized instruments. This thesis demonstrates an FPGA (Xilinx vcu118) with a DAC (Analog Devices AD9081) platform. It employs SDR for generating of periodic signals and also stream of bits which are then recovered using a simple Clock Data Recovery technique. The signal integrity of the generated signals and error-rate from the proposed Clock Data Recovery technique is also analyzed. / Master of Science / Communication systems in our networked world depend on key technologies to provide dependable connectivity. By converting digital data into continuous waveforms, Digital-to- Analog Converters (DACs) serve a crucial role in enabling the generation of various analog signals. This makes it possible for Software-Defined Radio (SDR) to produce a variety of modulated signals and enables smooth communication between various hardware and software systems. The Clock and Data Recovery (CDR) algorithms correct for clock fluctuations and phase offsets to provide precise signal recovery and synchronization. Together, these technologies improve communication networks' effectiveness and dependability, allowing seamless connectivity and enhancing our networked experiences. This thesis presents an SDR platform comprising Xilinx FPGA vcu118 and Analog Devices high-speed DAC/ADC AD9081. A CDR algorithm is also proposed to recover data from the signals generated by the DAC, and its effectiveness and error rate is also analyzed.

Software defined radios (SDRs) have changed the paradigm of slowly designing custom radios, instead allowing designers to quickly iterate designs with a large range of functionality. With the help of environments like the open-source project, GNU Radio, a designer can prototype radios with greatly improved productivity. Unfortunately, due to software performance limitations, there is no way to achieve the range of radio designs made possible with actual physical radio hardware. In order for SDRs to become more prevalent in radio prototyping and development, accelerators must be added to high-throughput and computationally intensive portions. Custom DSPs, GPUs, and FPGAs have all been added to SDRs to try and expand their computational capabilities. One difficulty in this is that by adding these accelerators, the "instant gratification" dynamic of the GNU Radio is lost. In this thesis, an enhanced GNU Radio flow is presented that seamlessly augments the GNU Radio software-only model with FPGAs, yet preserves the GNU Radio dynamics by providing full-custom radio hardware/software structures in seconds. By delegating portions of a GNU Radio flow graph to networked FPGAs, a larger class of software-defined radios can be implemented. Assembly of the signal processing structures within the FPGAs is accomplished using an enhanced flow where modules are customized, placed, and routed in a fraction of the time required by the vendor tools. With rapid FPGA assembly, a GNU Radio designer retains the ability to perform "what-if" experiments, which in turn greatly enhances productivity. Due to the modular nature of GNU Radio and of the FPGA designs, a modular assembly of the FPGA hardware is used. In the flow presented here, optimized hardware library components are designed by a domain expert, and stored as compact placed-and-routed modules. When a designer requests the assembly of one or more components within a given FPGA via a GNU Radio Python script, the necessary library components are accessed and translated to an appropriate location within the chip. Then the ports of the modules are stitched together using a custom FPGA router. This process reduces the large compile times of hardware for an FPGA to reasonable software-like times. To the radio designer, the complexity of the underlying hardware is abstracted away, making it appear as if everything compiles and runs in software, allowing many iterations to be realized quickly. Radio design can continue at the speeds that GNU Radio designers are accustomed to but with the range of possible waveforms and general functionality extended. / Master of Science

As technology evolves and new methods for designing radios arise, it becomes necessary to continue the search for fast and flexible development environments. Some of these new technologies include software defined radio (SDR), Field Programmable Gate Arrays (FPGAs), and the open source project GNU Radio. Software defined radio is a concept that GNU Radio has harnessed to allow developers to quickly create flexible radio designs. In terms of hardware, the maturity of FPGAs give radio designers new opportunities to develop high-speed radios having high-throughput and low-latency, yet the conventional build-time for FPGAs is a limiting factor for productivity. Recent research has lead to reductions in build-time by using FPGAs in a non-traditional manner, meaning productivity no longer has to be sacrificed. The AgileHW project demonstrated this concept and will be used as a basis to develop an overlaying architecture that uses a combination of the technologies mentioned to create a flexible, open, and efficient environment for radio development. This thesis discusses the realization of this architecture with the use of Xilinx FPGAs as a hardware accelerator for an enhanced GNU Radio. / Master of Science

Wireless communication serves as the foundation for a wide range of services that have become an integral part of human life in this day and age. Driven by the desire to have a single piece of hardware that can provide multiple wireless services, attention has been directed to SDRs due to their programmable nature and the flexibility they can offer in operating over multiple standards. In addition, they can provide effective solutions to current challenges in wireless communication, such as spectrum overcrowding and inter-standard operability, as well as future challenges to come due to their upgradeability. Although SDRs have been around in the research community for over a decade, they have not reached the point of transitioning to the mass consumer market, size being one of the major obstacles. Numerous SDR hardware platforms have been developed demonstrating successful functionality, yet to this day most of them remain trapped in desktop/benchtop form factors which are not suited for mobility. A main factor contributing to the size of SDR units is the RF front end. Using current technology, wide-band operation of SDR RF front-ends is achieved by aggregating multiple dedicated components, each covering a portion of the frequency range. Recent technology advances have enabled the integration of wide frequency functionality inside a single integrated package. One example is a prototype RFIC transceiver chip from Motorola Research Labs which contains a complete direct conversion RF transceiver in a single chip, with a frequency coverage range of 100MHz-2.4GHz. RFIC5, the latest version of the chip, has additionally integrated high speed ADC and DAC units, leading to a significant reduction in the component count and the overall size of the SDR hardware. This thesis describes the implementation of a highly compact, SDR PC plug-in card, known as PicoRF. PicoRF is based on the Motorola's RFIC chip for the RF front-end functionality, while the combined computational power of a V5 FPGA and a PC host is used for waveform signal processing. An overlay gird consisting of an interconnection of PR slots is reserved on the FPGA to host the components of a signal processing pipeline which can be modified during run-time. Through a high speed PCIe connection, partial bitstreams can be downloaded from the host PC to the FPGA at a very high speed making it possible for the radio to modify its function in very short time intervals and greatly reducing the service interruption time. Control software running on the PC host manages the overall system operation including the RFIC which is controlled through a custom developed API. The combination of the laptop host and the plug-in card form a small form factor, mobile SDR node that is one step towards satisfying both the performance and ergonomics demand of the consumer market. / Master of Science

[ES] En el marco de esta tesis se van a estudiar, principalmente, los efectos del movimiento de alta dinámica en receptores de Sistemas Globales de Navegación por Satélite (GNSS). El término alta dinámica es un término utilizado para referirse al movimiento de los vehículos en los que van embarcados receptores GNSS, los cuales se mueven lo suficientemente rápido como para causar un gran desplazamiento en frecuencia de la portadora debido al efecto Doppler. Se identificarán los problemas inherentes a este tipo de entornos y se estudiarán y propondrán soluciones. Para poder efectuar el estudio de estos fenómenos, se diseñará un demostrador tecnológico (conjunto de hardware y software para prueba y prototipado de tecnologías) en el que desarrollar el estudio de los casos de interés. Con el fin de trabajar en un entorno repetible, se utilizará un generador de señal GNSS. La señal generada se traslada a un receptor de radiofrecuencia definido por software, Software Defined Radio (SDR). Este tipo de receptor únicamente se encarga de digitalizar la señal de entrada y de llevar las muestras digitales a un ordenador, de modo que todo el procesado de señal se implementa en dicho ordenador. Este esquema de trabajo es ideal habida cuenta de su simplicidad y flexibilidad. Dicha flexibilidad conlleva la posibilidad de sintonizar el demostrador para poder estudiar una amplia gama de arquitecturas de receptor GNSS. Una vez se haya ensamblado el demostrador, se comprobará su correcto funcionamiento en escenarios conocidos usando los algoritmos más utilizados a día de hoy en receptores GNSS. Asegurado el correcto funcionamiento, se comparará el rendimiento de algoritmos de referencia con los algoritmos a estudiar y se extraerán conclusiones. / [CA] En aquest treball s'estudiaran, principalment, els efectes del moviment d'alta dinámica en receptors de Navegació per Satèl.lit GNSS (Global Navigation Satellite System). La denominació alta dinámica, s'utilitza per a descriure el moviment dels vehicles dins dels quals hi han receptors GNSS. El moviment d'aquests vehicles és suficientment ràpid com per a causar un gran desplaçament en freqüència de la freqüència portadora. Aquest desplaçament és consqüència de l'efecte Doppler. S'identificaran els problemes inherents d'aquest tipus de entorns GNSS i es propsararàn solucions. Per a estudiar l'efecte de l'alta dinàmica, es dissenyarà un demostrador tecnològic (conjunt de maquinari i software per a proves i prototipat de tecnologies) en que es pot desenvolupar l'estudi dels casos d'interès. Amb l'objectiu d'aconseguir treballar en un entorn repetible s'utilitzarà un generador de senyal GNSS. El senyal es processarà mitjançant un receptor SDR (Software Defined Radio). Aquest tipus de receptor s'encarrega del processat que fa un receptor GNSS en un PC. Aquesta filosofia de treball és idónia per la seua flexibilitat i simplicitat. Quan s'haja ensamblat el demostrador, és comprovarà el seu correct funcionament en escenaris de prova utilitzant els algoritmes implementats en receptors GNSS comercials. En aquest moment, el demostrador estarà preparat per a estudiar el casos d'alta dinàmica, que és l'objectiu fonamental d'aquest treball. / [EN] The study of the effects of the high dynamics on Global Navigation Satellite System (GNSS) receivers constitute the main matter of study in this work. The term high dynamics refers to the movement of vehicles that carry GNSS embedded receivers, which move fast enough to generate a large carrier frequency drift caused by the Doppler effect. The problems linked to these environments will be characterized and solutions to counteract possible signal impairments will be discussed. In order to correctly characterize these problems, a technological demonstrator (set of hardware components interacting with software tools enabling fast prototyping) will be designed and constructed. Using this technological demonstrator, different case studies will be developed. With the aim of achieving experimental repeatability, a GNSS signal generator will be used. The generated GNSS signal is fed to a Software Defined Radio (SDR) GNSS receiver. This receiver type is in charge of digitizing the analog RF signal and carrying the resulting samples to a computer in which signal processing tasks implementing the functions of GNSS receivers, take place. The main advantage linked to the usage of this work scheme is that by changing the software part, different receiver architectures can be implemented in a simple manner. Furthermore, by taking advantage of the flexible architecture it is possible to tune the detector in such a manner that it is possible to implement many different architecture types. Once the technological demonstrator is assembled, tests to assure its correct operation will be conducted by performing comparisons with the behaviour of well-known GNSS receivers in known scenarios. Later on, comparative tests using signals from high dynamics scenarios will take place. Insight and analysis of comparative performance will be given. / Alcaide Guillén, C. (2019). Design and development of a technological demonstrator for the study of high dynamics GNSS receivers [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/131697

Η παρούσα διπλωματική εργασία αφορά στην πειραματική αξιολόγηση του μηχανισμού ανάκτησης ρυθμού συμβόλου για ψηφιακούς δέκτες τεχνολογίας SDR που λαμβάνουν δεδομένα μέσω δορυφόρου. Η ορολογία SDR/SR (Software Defined Radio/Software Radio) χρησιμοποιείται για να χαρακτηρίσει τους πομποδέκτες που μπορούν να καθορίζουν σημαντικές παραμέτρους τους και βασικές αρχές της λειτουργίας τους μέσω αναβάθμισης ή ενημέρωσης του λογισμικού τους. Ο μηχανισμός ανάκτησης του ρυθμού συμβόλου (Symbol Timing Recovery, STR) αναπτύχθηκε στα πλαίσια της διδακτορικής διατριβής του διδάκτορος Παναγιώτη Σαββόπουλου. Η παρούσα εργασία μελετά τη σύγκλιση του βρόχου υπό συνθήκες παραμένοντος σφάλματος συχνότητας καθώς επίσης και τον προσδιορισμό του λόγου σήματος προς θόρυβο στην έξοδο του βρόχου κάνοντας χρήση ενός νέου μεγέθους, metric, το οποίο έχει εισαχθεί στα πλαίσια της προαναφερθείσας διδακτορικής διατριβής, υπό συνθήκες λευκού Gaussian θορύβου. Το μέγεθος αυτό είναι σε θέση να δώσει αξιόπιστα αποτελέσματα στις ενδιάμεσες υπομονάδες του δέκτη υπό συνθήκες παραμένοντος σφάλματος συχνότητας. Στην παρούσα εργασία μελετώνται οι QPSK, 8PSK, 16-APSK και 32-APSK διαμορφώσεις διότι αυτές οι διαμορφώσεις χρησιμοποιούνται από το πρότυπο DVB-S2. / The purpose of this project is the experimental evaluation of a mechanism for the symbol timing recovery which is used in digital Software Defined Radio receivers. SDR/SR (Software Defined Radio/Software Radio) technology is used to characterise the transmitters and the receivers which are able to determine important parameters and basic primciples for their function through upgrade or briefing of their software. The symbol timing recovery mechanism (STR) was developped in terms of the doctora of dr Panagiotis Savopoylos. The precent project examines the loop’s convergence when there is frequency error as well as the signal to noise ratio in the output of STR with the use of a new size, metric, which was also developped in terms of the doctora which was mentioned before, when there is white Gaussian noise. The metric is able to give reliable results in the intermediate stages of the receiver when there is frequency error. In the precent project are examined the QPSK, 8PSK,16-APSK, 32-APSK modulations because these modulations are used in DVB-S2 standard.

Dans le but d’améliorer la disponibilité des services fournis par un récepteur, la conception d’un récepteur GNSS permettant de recevoir plusieurs signaux de toutes les bandes simultanément semble être la solution. Une architecture à sous échantillonnage RF optimisée de type SDR (Software Defined Radio) comportant un étage RF intégrable et reconfigurable et un étage de traitement numérique avec une implémentation logicielle du traitement en bande de base est défini pour ce récepteur GNSS, tout en répondant aux exigences des spécifications des standards GNSS : des réseaux radio cellulaires : GPS, Glonass, Galileo, Beidou. Un choix des composants discrets suite au dimensionnement system est effectué et ceci pour installer un prototype de validation expérimental. Ensuite nous nous s’intéressons à la caractérisation de la chaine RF afin d’étudier les limitations causés par la non linéarité et d’étudier la stabilité du prototype proposé. Un étage de traitement numérique des signaux IF, capturés à la sortie de l’ADC, est implémenté sous Matlab. L’acquisition de ces données permet la détermination des satellites visible à un instant donné qui nous permet éventuellement la détermination d’une position / In order to improve the availability of services provided by a receiver, designing a GNSS receiver to collect multiple signals from all bands simultaneously seems to be the solution. An optimized software-defined RF (SDR) sub-sampling architecture with an integral and reconfigurable RF stage and a digital processing stage with a software implementation of the baseband processing is defined for this GNSS receiver, while meeting the requirements GNSS standards specifications: cellular radio networks: GPS, Glonass, Galileo, Beidou. Many discrete components are selected after system dimensioning. Thus, experimental validation prototype is installed. Then we are interested in the characterization of the RF front-end in order to determine the limitations caused by the nonlinearity and to study the stability of the proposed prototype. A stage of digital processing of the IF signals, captured at the ADC output, is implemented under Matlab software. The acquisition of these data allows the determination of satellites visible at a given instant that allows us to determine a position