Description des différentes étapes de la conception d'un microprocesseur pour le contrôle des automatismes de sécurité, en particulier pour les systèmes de transport. Ce microprocesseur est autotestable, c'est-à-dire capable de détecter ses propres erreurs. La conception du circuit est basée sur les hypothèses de pannes au niveau analytique dans la technologie NMOS. Les blocs fonctionnels «Strongly Fault Secure» et les contrôleurs «Strongly Code Disjoint» sont à la base des circuits «Self-checking», dits autotestables. Le circuit COBRA démontre la faisabilité d'un microprocesseur autotestable. COBRA gère indépendamment 19 signaux différents, date des événements externes, mesure des fréquences, surveille 14 entrées logiques et possède 7 sorties indépendantes. Le programme d'application de COBRA est contenu dans une mémoire morte programmable externe de 16 Koctets adressés par 14 bits multiplexés sur le bus interne de 8 bits. COBRA contient également une liaison série, une mémoire à accès direct de 64 octets et 3 temporisateurs de 14 bits indépendants ainsi qu'une unité arithmétique et logique de 8 bits, COBRA exécute un jeu de 43 instructions

The port site of Berenike Troglodytica - located on the Egyptian Red Sea coast - served the spice and incense routes that linked the Mediterranean World (specifically the Roman Empire) to India, Southern Arabia and East Africa. In the Greco-Roman period the site was at the cutting edge of what was then the embryonic global economy, ideally situated as a key node connecting Indian Ocean and Mediterranean trade for almost 800 years. It is now located in an arid, marginal, hostile environment but the situation must have been very different 2300 years ago, at the time of its founding. At the time of elephant-hunting trips during the Hellenistic period before the inception of its important role in the global markets of the day in the Roman period Berenike would have to have looked much different to what we can now imagine. What was it like then, when the first prospectors visited this location at the time of Ptolemy II? Why this particular place, and this particular landscape setting seemed such a propitious location for the siting of an important new harbour? Given the importance of the port over almost a millennium it is perhaps surprising that very little is known about the different factors impacting on the foundation, evolution, heyday and subsequent decline of the city; or the size, shape, and capacity of its harbour. The intention of this research is to address this shortfall in our knowledge, to examine the drivers behind the rise and fall of this port city, and to explore the extent to which the dynamics of the physical landscape were integral to this story. Using an innovative Earth Science approach, changes in the archaeological 'coastscape' have been reconstructed and correlated with periods of occupation and abandonment of the port, shedding light on the nature, degree and directionality of human-environment interactions at the site. This work has revealed profound changes in the configuration of the coastal landscape and environment (including the sea level) during the lifespan of Berenike, highlighting the ability of people to exploit changes in their immediate environment, and demonstrating that, ultimately, the decline of the port was partly due to these landscape dynamics. To further explore these themes the landscape reconstructions have been supplemented by semi-quantitative analyses of a suite of variables likely to influence the initial siting of new ports of trade. These have shown that although the site of Berenike was ideal in terms of its coastal landscape potential, possessing a natural sheltered bay and lagoon system, the choice of location was not solely influenced by its environmental conditions. Additionally, a detailed review of vessels that plied Red Sea and Indian Ocean routes is presented here in order to better understand the design and functioning of Berenike's harbour. This serves the purpose of identifying unifying features that provide more detail about the size and draught of vessels and the potential capacity of the harbour basin. By using this multi-scalar approach it has been possible to reconstruct the 'coastscape' of the site through the key periods of its occupancy and those phases immediately before and after its operation. This has wide-ranging implications for researchers studying ancient ports along this trade network as a larger database will tease out more details about how influential the landscape was in the initial siting of the port and its subsequent use and decline.

Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (SOI). Owing to its superior material properties such as wide bandgap, three times larger than Silicon, and low intrinsic carrier concentration, SiC is an excellent candidate for high-temperature applications. In this thesis, analog and mixed-signal circuits have been implemented using SiC bipolar technology, including bandgap references, amplifiers, a master-slave comparator, an 8-bit R-2R ladder-based digital-to-analog converter (DAC), a 4-bit flash analog-to-digital converter (ADC), and a 10-bit successive-approximation-register (SAR) ADC. Spice models were developed at binned temperature points from room temperature to 500 °C, to simulate and predict the circuits’ behavior with temperature variation. The high-temperature performance of the fabricated chips has been investigated and verified over a wide temperature range from 25 °C to 500 °C. A stable gain of 39 dB was measured in the temperature range from 25 °C up to 500 °C for the inverting operational amplifier with ideal closed-loop gain of 40 dB. Although the circuit design in an immature SiC bipolar technology is challenging due to the low current gain of the transistors and lack of complete AC models, various circuit techniques have been applied to mitigate these problems. This thesis details the challenges faced and methods employed for device modeling, integrated circuit design, layout implementation and finally performance verification using on-wafer characterization of the fabricated SiC ICs over a wide temperature range. / <p>QC 20170905</p>

The aim of this work was to create a system for optimisaton of specific analog circuits by evolution using multiple fitness functions . A set of experiments was run, and the results analyzed to evaluate the feasibility of evolutionary optimisation of analog circuits . A requirement for this goal is the study and choice of certain types of analog circuits and evolutionary algorithms . For the scope of this work , amplifiers and oscillators were chosen as target circuits , and genetic algorithms and evolutionary strategies as evolutionary algorithms . The motivation for this work is the ongoing effort to automate the design and optimisation of analog circuits , where evolutionary optimisation is one of the options .

No description available.

Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de la consommation dans les différents blocs digitaux, analogiques et RF. Les applications dites rapides peuvent ainsi profiter du meilleur des composants bipolaires et des transistors CMOS. Le défi est d’autant plus critique dans le cas des applications analogiques/RF puisqu’il est nécessaire de diminuer la puissance consommée tout en maintenant des fréquences de fonctionnement des transistors très élevées. Disposer de modèles compacts précis des transistors utilisés est donc primordial lors de la conception des circuits utilisés pour les applications analogiques et mixtes. Cette précision implique une étude sur un large domaine de tensions d’utilisation et de températures de fonctionnement. De plus, en allant vers des nœuds technologiques de plus en plus avancés, des nouveaux effets physiques se manifestent et doivent être pris en compte dans les équations du modèle. Les règles d’échelle des technologies plus matures doivent ainsi être réexaminées en se basant sur la physique du dispositif. Cette thèse a pour but d’évaluer la faisabilité d’une offre de modèle compact dédiée à la technologie avancée SiGe TBH de chez ST Microelectronics. Le modèle du transistor bipolaire SiGe TBH est présenté en se basant sur le modèle compact récent HICUMversion L2.3x. Grâce aux lois d’échelle introduites et basées sur le dessin même des dimensions du transistor, une simulation précise du comportement électrique et thermique a pu être démontrée.Ceci a été rendu possible grâce à l’utilisation et à l’amélioration des routines et méthodes d’extraction des paramètres du modèle. C’est particulièrement le cas pour la détermination des éléments parasites extrinsèques (résistances et capacités) ainsi que celle du transistor intrinsèque. Finalement, les différentes étapes d’extraction et les méthodes sont présentées, et ont été vérifiées par l’extraction de bibliothèques SPICE sur le TBH NPN Haute-Vitesse de la technologie BiCMOS avancée du noeud 55nm, avec des fréquences de fonctionnement atteignant 320/370GHz de fT = fmax. / The aim of BiCMOS technology is to combine two different process technologies intoa single chip, reducing the number of external components and optimizing power consumptionfor RF, analog and digital parts in one single package. Given the respectivestrengths of HBT and CMOS devices, especially high speed applications benefit fromadvanced BiCMOS processes, that integrate two different technologies.For analog mixed-signal RF and microwave circuitry, the push towards lower powerand higher speed imposes requirements and presents challenges not faced by digitalcircuit designs. Accurate compact device models, predicting device behaviour undera variety of bias as well as ambient temperatures, are crucial for the development oflarge scale circuits and create advanced designs with first-pass success.As technology advances, these models have to cover an increasing number of physicaleffects and model equations have to be continuously re-evaluated and adapted. Likewiseprocess scaling has to be verified and reflected by scaling laws, which are closelyrelated to device physics.This thesis examines the suitability of the model formulation for applicability to production-ready SiGe HBT processes. A derivation of the most recent model formulationimplemented in HICUM version L2.3x, is followed by simulation studies, whichconfirm their agreement with electrical characteristics of high-speed devices. Thefundamental geometry scaling laws, as implemented in the custom-developed modellibrary, are described in detail with a strong link to the specific device architecture.In order to correctly determine the respective model parameters, newly developed andexisting extraction routines have been exercised with recent HBT technology generationsand benchmarked by means of numerical device simulation, where applicable.Especially the extraction of extrinsic elements such as series resistances and parasiticcapacitances were improved along with the substrate network.The extraction steps and methods required to obtain a fully scalable model library wereexercised and presented using measured data from a recent industry-leading 55nmSiGe BiCMOS process, reaching switching speeds in excess of 300GHz. Finally theextracted model card was verified for the respective technology.

This thesis examines the early work of poets Leonard Cohen and Seamus Heaney in light of their treatment of mythology, ritual, and mythologization, moving either from personal to political awareness (Heaney), or from political to personal awareness (Cohen). Heaney, writing in the midst of the Irish Troubles throughout the late 1960s and 1970s, slowly works up to political awareness as the situation from which he is writing becomes more dire. By contrast, Cohen writes during the beginnings of the Quiet Revolution in Quebec, from the late 1950s to the mid-1960s, moving progressively farther away from the highly political and mythologized work of his first book. This thesis analyzes both poets first four books of poetry and how each poet addresses the politics of his historical time and place as a minority figure: an Irish Catholic in Northern Ireland, and an Anglophone Jew in Montreal, respectively. Ultimately, each poet chooses to mythologize and use traditional mythologies as a means of addressing contemporary horrors before being poetically (and politically) exhausted by the spiritual and mental exertion involved in the "poetry of disfigurement."

This thesis examines the early work of poets Leonard Cohen and Seamus Heaney in light of their treatment of mythology, ritual, and mythologization, moving either from personal to political awareness (Heaney), or from political to personal awareness (Cohen). Heaney, writing in the midst of the Irish Troubles throughout the late 1960s and 1970s, slowly works up to political awareness as the situation from which he is writing becomes more dire. By contrast, Cohen writes during the beginnings of the Quiet Revolution in Quebec, from the late 1950s to the mid-1960s, moving progressively farther away from the highly political and mythologized work of his first book. This thesis analyzes both poets first four books of poetry and how each poet addresses the politics of his historical time and place as a minority figure: an Irish Catholic in Northern Ireland, and an Anglophone Jew in Montreal, respectively. Ultimately, each poet chooses to mythologize and use traditional mythologies as a means of addressing contemporary horrors before being poetically (and politically) exhausted by the spiritual and mental exertion involved in the "poetry of disfigurement."