Le travail effectué au cours de cette thèse consiste à étudier et développer des techniques innovantes de modulation de largeurs d'impulsions (MLI) qui visent à optimiser les chaînes de traction électriques embarquées dans des véhicules hybrides ou électriques. La MLI joue un rôle stratégique au coeur des variateurs de vitesse, elle influe sur le comportement général de la chaîne de traction et sur sa performance. La MLI présente des degrés de liberté qui peuvent contribuer avantageusement à redimensionner les composants du variateur tels que le circuit de refroidissement, le filtre EMI et le condensateur du bus continu. Les véhicules hybrides constituent une étape naturelle dans la transition énergétique entre les véhicules thermiques et les véhicules électriques. Notre étude contribue à l'optimisation des variateurs de vitesse en général et ceux au coeur des véhicules hybrides ou électriques en particulier. Notre apport consiste à proposer une MLI performante afin de rendre le variateur plus léger et plus compacte tout en garantissant les fonctionnalités traditionnelles. La compétitivité de ces variateurs et par conséquent des véhicules hybrides ou électriques devient alors accessible. Les véhicules hybrides ou électriques utilisent généralement une machine de traction à courant alternatif en raison de nombreux avantages que celle ci présente par rapport à une machine à courant continu. La source d’alimentation au bord d'un véhicule est une batterie, il est donc nécessaire d'utiliser un onduleur pour transformer la tension continue en tension alternative à amplitude et fréquence variables. Le contrôle de cet onduleur est réalisé par des techniques de modulation de largeurs d'impulsions (MLI) ce qui permet ainsi de réguler le couple de la machine. Les techniques MLI produisent une composante basse fréquence, le fondamental qui est le signal désiré et des composantes hautes fréquences appelées harmoniques de commutation qui sont indésirables. Dans les véhicules modernes, il y a de plus en plus de charges mécaniques pilotées par des machines électriques et des systèmes électroniques. Il est impératif d'éliminer le risque d'interférences électromagnétiques entre ces différents systèmes pour éviter le dysfonctionnement ou la défaillance. Il faut donc filtrer ces harmoniques indésirables pour qu'elles ne perturbent pas les calculateurs et autres circuits électroniques de faibles niveaux de tensions. Il existe des techniques de modulation aléatoire (RPWM) qui permettent d'étaler les harmoniques à la fréquence de commutation et ses multiples. Dans cette étude, notre choix s’est porté sur la technique de modulation vectorielle aléatoire (RSVM) qui présente plusieurs avantages par rapport à la MLI intersective. Les machines pilotées par une MLI produisent des tensions de mode commun dites « shaft voltage », qui peuvent provoquer des courants à travers les roulements de la machine, ces derniers pouvant être destructifs. Nous avons pu développer une technique MLI vectorielle basée sur un choix judicieux des vecteurs nuls pour réduire cette tension de mode commun. La chaleur produite par les pertes dans les convertisseurs à commutation dure lors de l'ouverture et de la fermeture des interrupteurs doit être évacuée rapidement, ce qui réduit le stress thermique, évite la défaillance et augmente la durée de vie des interrupteurs. Une technique utilisée pour réduire ces pertes par commutation est la modulation discontinue (DPWM) ; une amélioration est apportée à cette technique dans ce travail. Cette amélioration est présentée sous forme d'une technique discontinue évolutive (EDSVM) qui s'adapte au régime du moteur pour minimiser les pertes. Grâce à cette technique une meilleure distribution du stress thermique sur les différents bras de l'onduleur est rendue possible et permet ainsi d'augmenter la durée de vie de l'onduleur. (...) / The dissertation documents research work carried out on Pulse Width Modulation (PWM) strategies for hard switched Voltage Source Inverters (VSI) for variable speed electric drives. This research is aimed at Hybrid Electric Vehicles (HEV). PWM is at the heart of all variable speed electric drives; they have a huge influence on the overall performance of the system and may also help eventually give us an extra degree of freedom in the possibility to rethink the inverter design including the re-dimensioning of the inverter components.HEVs tend to cost more than conventional internal combustion engine (ICE) vehicles as they have to incorporate two traction systems, which is the major discouraging factor for consumers and in turn for manufacturers. The two traction system increases the maintenance cost of the car as well. In addition the electric drives not only cost extra money but space too, which is already scarce with an ICE under the hood. An all-electric car is not yet a viable idea as the batteries have very low energy density compared with petrol or diesel and take considerable time to charge. One solution could be to use bigger battery packs but these add substantially to the price and weight of the vehicle and are not economically viable. To avoid raising the cost of such vehicles to unreasonably high amounts, autonomy has to be compromised. However hybrid vehicles are an important step forward in the transition toward all-electric cars while research on better batteries evolves. The objective of this research is to make electric drives suitable for HEVs i.e. lighter, more compact and more efficient -- requiring less maintenance and eventually at lower cost so that the advantages, such as low emissions and better fuel efficiency, would out-weigh a little extra cost for these cars. The electrical energy source in a vehicle is a battery, a DC Voltage source, and the traction motor is generally an AC motor owing to the various advantages it offers over a DC motor. Hence the need for a VSI, which is used to transform the DC voltage into AC voltage of desired amplitude and frequency. Pulse width modulation techniques are used to control VSI to ensure that the required/calculated voltage is fed to the machine, to produce the desired torque/speed. PWM techniques are essentially open loop systems where no feedback is used and the instantaneous values differ from the required voltage, however the same average values are obtained. Pulse width modulated techniques produce a low frequency signal (desired average value of the switched voltage) also called the fundamental component, along with unwanted high frequency harmonics linked to the carrier signal frequency or the PWM period. In modern cars we see more and more mechanical loads driven by electricity through digital processors. It is very important to eliminate the risk of electromagnetic interference between these systems to avoid failure or malfunction. Hence these unwanted harmonics have to be filtered so that they do not affect the electronic control unit or other susceptible components placed in the vicinity. Randomised modulation techniques (RPWM) are used to dither these harmonics at the switching frequency and its multiple. In this thesis a random modulator based on space vector modulation is presented which has additional advantages of SVM. Another EMI problem linked to PWM techniques is that they produce common mode voltages in the load. For electric machines, common mode voltage produces shaft voltage which in turn provokes dielectric stress on the motor bearings, its lubricant and hence the possibility of generating bearing currents in the machine that can be fatal for the machine. To reduce the common mode voltage a space vector modulation strategy is developed based on intelligent placement of zero vectors. (...)

For low and medium power applications, conventional two-level inverters are widely used in industrial applications including electric vehicle drives, traction drives, distributed generation, power management and grid connected renewable energy systems. To filter out the harmonic currents from the load, passive line filters are used. These filters are designed to pass the fundamental phase current and suppress higher harmonic currents, making the filters bulky. To get a nearly sinusoidal current waveform, these two level inverters are switched at high frequency to shift the harmonic components in the phase current to high frequencies to reduce size and cost of the filter. But higher switching frequencies have some drawbacks like large dV /dt stresses on the motor terminals and switching devices, leading to electro-magnetic interference (EMI) problems and higher switching losses. For full DC bus utilization to enhance the power output from the two level inverter, the inverter has to operate in overmodulation region up to the six-step operation. Considerable fifth and seventh order (6n ± 1, n = odd) harmonics are produced when the inverter operates in overmodulation region. These include some low order harmonics like fifth and seventh, which are currently suppressed by using bulky passive line filters. Different high frequency modulation schemes are uniquely used in overmodulation region to suppress these harmonics. Another well accepted method of harmonic suppression is the selective harmonic elimination (SHE) techniques. SHE introduces notches at specific angles in a fundamental period of the inverter pole voltage to eliminate a particular harmonic component from the pole voltage. But, SHE involves extensive offline computation and requirement for higher memory for implementation of huge lookup tables. dodecagonal voltage space vectors have been reported in literature. Dodecagonal voltage space vector structures inherently eliminate fifth and seventh order (6n ± 1, n = odd) harmonics from the phase voltage. However, these require multiple isolated and unequal DC supplies (like VDC and 0.366VDC ). Generating DC voltage supplies at particular ratio to the main DC supply, requires additional circuitry. This increases the size of the converter and four quadrant back to back operation is not possible for the converter. To overcome the problems mentioned above, a novel switched capacitive filtering technique is proposed in this work for low and medium power drives applications. The filtering is done by an inverter fed by capacitor. A novel method to ensure zero power contribution by an inverter is shown, enabling the inverter to be fed by a capacitor. Thus, the capacitor fed inverter is shown to operate as a switched capacitive filter, which generates harmonic voltages that gets eliminated from the phase voltage of conventional two level inverters. With the proposed switched capacitive filtering technique, the following benefits are achieved. • Fifth and seventh order (6n ± 1, n = odd) harmonics are eliminated from the phase voltage, for the full modulation range of the two level inverters even while operating in overmodulation region and six-step mode. Thus, bulky passive line filters are avoided. • Since, the capacitive filter does not contribute any active power to the load, single DC supply operation is possible. Hence, four quadrant back to back operations is possible with the proposed filtering technique. • Dodecagonal voltage space vector structures are realized using single DC supply for the first time. • Modulation techniques for different power circuit topologies have been proposed which inherently controls the capacitor voltage at specific voltage levels for the full modulation range of the inverter including six-step operation. Hence, no additional pre-charging circuitry is required. • High frequency switching is shifted to the capacitive filter which is at a low voltage compared to the DC supply fed power contributing inverter. Thus, the main inverter need not be switched at high switching frequency for harmonic suppression. This reduces the switching loss as compared to conventional inverters, to achieve harmonic suppression of comparable order. • Reduced voltage stress on the switches of the switched capacitive filter. Hence, low voltage devices can be used to implement the switched capacitive filter, reducing the cost and size drastically as compared to conventional passive line filters. The proposed switched capacitive filtering scheme has been realized for open-end winding induction motor drive and three phase star connected three terminal induction motor drive where conventional two level inverter is used as the power contributing inverter. Additionally, extension of the capacitive filtering scheme to multilevel inverter fed drives is also shown, where the main power contributing inverter is a three level flying capacitor (FC) inverter. The power circuit implementations are briefly described as following. (i) In open-end winding three phase induction motors, the two terminals of each of the three phase windings are accessed. The main DC bus connected two level inverter feeds power from one end of the motor terminals. A capacitor fed two level inverter eliminates the fifth and seventh order harmonics from the other end for the full modulation range including overmodulation and six-step operation of DC bus fed inverter. The voltage space vectors from both the inverters connected at opposite ends of the motor forms dodecagonal voltage space vectors. An uniform pulse width modulation (PWM), for the full modulation range is proposed which switches from the dodecagonal voltage space vectors while inherently maintaining the capacitor voltage at 0.289VDC . (ii) In conventional star connection of three phase induction motors, all three terminals of the three phase windings are shorted from one end, leaving access to just three terminals. Such three terminal induction motor fed to conventional two level inverter is commonly used in many drives applications. Capacitor fed H-bridges are cascaded to such two-level inverters, to eliminate the fifth and seventh order harmonics from the phase voltage for the full modulation range including overmodulation and six-step operation of DC fed inverter. The voltage space vectors from capacitor fed H-bridges get added to the voltage space vectors from the two level inverter to form dodecagonal voltage space vectors. A PWM technique for the full modulation range is proposed to switch from the dodecagonal voltage space vector while inherently maintaining the three H-bridge connected capacitor voltages at 0.1445VDC . (iii) Advantages of dodecagonal space vector switching and multilevel inverters are achieved with a single DC supply. A DC supply fed three level flying capacitor (FC) inverter feeds active power to one end of the induction motor winding terminals and H-bridge connected capacitors eliminate fifth and seventh order harmonics from the other end of the motor winding terminals. The voltage space vectors from the three level FC inverter and the H-bridge inverter forms a three level dodecagonal voltage space vectors with symmetric triangular sectors. A PWM technique is developed to switch the three level dodecagonal space vectors and simultaneously control the H-bridge connected capacitors at 0.1445VDC . The fifth and seventh order harmonics are eliminated for the full modulation range of the three level FC inverter, including the extreme six-step operation. Additionally, the proposed inverter has also been shown to operate for rotor field oriented vector control of the open-end winding induction motor drive. For all the power circuit implementation of the switched capacitive filter, an increase of 7.8% in the linear modulation range (up to 48.8Hz) is achieved, implying better DC bus utilization as compared to conventional inverter topologies switching from hexagonal voltage space vectors. With advantages like fifth and seventh order (6n ± 1, n = odd) harmonic elimination throughout the modulation range, reduced dv/dt stress, lower switching frequency in high voltage devices, single DC supply requirement, dodecagonal voltage space vector switching, PWM technique with inherent capacitor balancing, increased linear modulation range and reduced voltage stress on high frequency switches, the proposed switched capacitive filtering scheme is well suited for low and medium power drives application with requirements for high dynamic performance and precise speed control.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This Thesis proposes a Space Vector Modulation for cascaded miltilevel converters with asymmetric cells under normal conditions and with faults in the power cells, avoiding converter saturation as much as possible. The switching state vectors and the voltage references are represented in the output line-to-line voltages coordinate system. Under this representation, the switching state vectors have only integer entries, easing the implementation of the proposed algorithm. The modulation is developed in a way such as to guarantee that the higher voltage cells switch at low frequency by the choice of only one vector per switching period, minimizing the switching losses. For the lower voltage cells (1pu), that switch with PWM, three algorithms were developed for defining the switching sequences: (i) offline, (ii) online and (iii) hybrid, where a carrier-based geometrical modulation and the SV are mixed in a simple and unified approach. The algorithm is described in a generic way, for converters with any number of levels, and then, simulation and experimental results are shown for, respectively, cascaded miltilevel converters with asymmetric cells with DC bus voltages ratio of 1:2:4pu and 1:2pu. The algorithm does not use conventional separation lines to find where the multiple references for the power cells are located inside the SV diagram. It also avoids converter saturation and, when it is unavoidable, detects its occurrence and changes the operation mode to overmodulation. This one is treated as a modification of the orignal algorithm, allowing the converter to operate with a wider range of modulation indexes and fault conditions. It is shown that two overmodulation modes can occur: in the first, there is still an area inside the SV diagram where overmodulation is avoided, and, in the second, the converter overmodulates during almost all the time. Modulation strategies are proposed for both cases, including the insertion of a bandpass filter in the second case, so as to minimize the distortions and unbalances that arise on the converter output line-to-line voltages during this operation mode. For the overmodulation, simulation and experimental results are also shown for cascaded miltilevel converters with asymmetric cells with DC bus voltages ratio of 1:2:4pu and 1:2pu. Finally, the final conclusions are drawn and future works are proposed. / Esta Tese propõe uma estratégia de modulação Space Vector (SV) para conversores multiníveis com células assimétricas em cascata durante operação normal e com faltas nas células de potência, garantindo a não ocorrência de saturação do conversor sempre que esta não for desejada, especialmente durante faltas. Os vetores de comutação e as referências de tensão são representados no sistema de coordenadas das tensões de linha de saída. Desta forma, os vetores de comutação apresentam apenas coordenadas inteiras, facilitando a implementação do algoritmo proposto. A modulação é desenvolvida de forma a garantir que as células de maior tensão comutem em baixa frequência, pela escolha de apenas um vetor por período de comutação, minimizando as perdas de comutação do conversor. Para as células de menor tensão (1pu), que comutam com PWM, foram desenvolvidos três algoritmos para definição das sequências de comutação: definição (i) offline, (ii) online e (iii) híbrida, onde as modulações geométrica com portadora e SV são mescladas em uma abordagem única e simplificada. O algoritmo SV é descrito de maneira genérica, para conversores com qualquer número de níveis, e, na sequência, são apresentados resultados de simulação e experimentais para, respectivamente, conversores multiníveis com células assimétricas em cascata com razão das tensões dos barramentos CC de 1:2:4pu e 1:2pu. Este algoritmo não faz uso de retas de separação convencionais para encontrar os domínios onde as múltiplas referências para as células de potência se encontram dentro do diagrama SV. Também evita ao máximo a saturação do conversor, e, quando esta é inevitável, detecta sua ocorrência e muda o modo de operação para sobremodulação. Esta é tratada por meio de modificações no algoritmo original, permitindo a operação do conversor com um maior número de índices de modulação e condições de falta. É mostrado que existem dois casos de sobremodulação durante faltas nas células de potência: no primeiro, ainda há uma área no interior do diagrama SV onde a sobremodulação é evitada, e, no segundo, o conversor sobremodula durante praticamente todo o tempo. São propostas estratégias de modulação para ambos os casos, incluindo a inserção de um filtro passa-faixa no segundo, para minimizar as distorções e os desequilíbrios que surgem nas tensões de linha de saída do conversor, quando este se encontra neste modo de operação. Para a sobremodulação, também são apresentados resultados de simulação e experimentais para os conversores multiníveis com células assimétricas em cascata com razão das tensões dos barramentos CC de 1:2:4pu e 1:2pu. Por fim, as conclusões finais são apresentadas e são propostos trabalhos futuros.

Controlling the dynamic outputs of electrical machines has always been an essential topic in aerospace, automotive and other industries. Electrical machine control consists of several components, each of which can be controlled in various ways. Whereas the dynamic responses are mostly simulated using MATLAB/SIMULINK, Prof. Marko Hinkkanen from Aalto University has launched a project for the development of an open-source simulator called ’Motulator’, based on Python. In this thesis, we focus on developing modulation methods and related functions for the inverter in ’Motulator’ based on an existing model of a Permanent Magnet Electrical Machine (PMSM). First, the two-level and three-level inverters with the Space Vector Modulation (SVPWM) method are developed. The dynamic output performance improves significantly compared to Sinusoidal Pulse-Width Modulation (SPWM). In addition, operation under the over-modulation mode for both inverters is implemented to improve the DC-bus voltage utilisation further, allowing higher torques and speeds. The problem of neutral point voltage imbalance is solved for the three-level inverter, ensuring the difference voltage between upper and lower capacitors to fluctuate around 0. Finally, a harmonic analysis tool based on the non-uniform Fourier transform is established. / Styrning och reglering av elektriska maskiners dynamik har alltid varit ett viktigt ämne inom flyg- och bilindustrin men även för andra tillämpningar. Regleringen av elektriska maskiner består av flera delar som var och en kan styras på olika sätt. De dynamiska förhållandena simuleras vanligen i MATLAB/SIMULINK. För att inte vara beroende av kommersiell programvara har Professor Marko Hinkkanen från Aalto universitetet lanserat en simulator med öppen källkod, baserad på Python, kallad ’Motulator’. Examensarbetet fokuserar vi på att utveckla moduleringsmetoder och relaterade funktioner för växelriktaren i ’Motulator’, baserat på en befintlig modell av en permanentmagnetiserad synkronmaskin (PMSM). Först utvecklas två- och trenivåomriktare med ”Space Vector Modulation” (SVPWM). Drivsystemets dynamisk prestanda förbättras därvid avsevärt i jämförelse med Sinus-pulsbreddsstryning (Sinusoidal-PWM). Övermodulering har implementerats för båda växelriktarna i avseende att ytterligare förbättra DC-bussens spänningsutnyttjande, vilket möjliggör högre vridmoment och varvtal. Problemet med nollpunktsspänningens obalans är löst för trenivåomriktaren, vilket säkerställer att skillnadsspänningen mellan de övre och nedre kondensatorerna fluktuerar runt 0. Slutligen har ett verktyg utvecklats i syfte att analysera övertoner, baserat på en olikformig Fouriertransform.

For medium and high-voltage drive applications, multilevel inverters are very popular. It is due to their superior performance compared to 2-level inverters such as reduced harmonic content in the output voltage and current, lower common mode voltage and dv=dt, and lesser voltage stress on power switches. The popular circuit topologies for multilevel inverters are neutral point clamped, cascaded H-bridge and flying capacitor based circuits. There exist different combinations of these basic topologies to realize multilevel inverters with modularity, better fault tolerance, and reliability. Due to these advantages, multilevel converters are getting good acceptance from the industry, and researchers all over the world are continuously trying to improve the performance of these converters. To meet such demands, three multilevel inverter topologies are proposed in this thesis. These topologies can be used for high-power induction motor drives, and the concepts presented are also applicable for synchronous motor drives, grid-connected inverters, etc. To get nearly sinusoidal phase current waveforms, the switching frequency of the conventional inverter has to be increased. It will lead to higher switching losses and electromagnetic interference. The problem with lower switching frequency is the intro- duction of low order harmonics in phase currents and undesirable torque ripple in the motor. The 5th and 7th harmonics are dominant for hexagonal voltage space-vector based low frequency switching, and it is possible to eliminate these harmonics by dodecagonal switching. Further improvement in the waveform quality is possible by octadecagonal voltage space-vectors. In this case, the complete elimination of 11th and 13th harmonic is possible for the entire modulation range. The concepts of dodecagonal and octadecagonal voltage space-vectors are used in the proposed inverter topologies. The first topology proposed in this thesis consists of cascaded connection of two H-bridge cells. The two cells are fed from unequal DC voltage sources having a ratio of 1 : 0:366, and this inverter can produce six concentric dodecagonal voltage space- vectors. This ratio of voltages can be obtained easily from a combination of star-delta transformers, since 1 : 0:366 = ( p 3 + 1) : 1. The cascaded connection of two H-bridge cells can generate nine asymmetric pole voltage levels, and the combined three-phase inverter can produce 729 voltage space-vectors (9 9 9). From this large number of combinations, only certain voltage space-vectors are selected, which forms dodecagonal pattern. In the case of conventional multilevel inverters, the voltage space-vector diagram consists of equilateral triangles of equal size, but for the proposed inverter, the triangular regions are isosceles and are having different sizes. By properly placing the voltage space-vectors in a sampling period, it is possible to achieve lower switching frequency for the individual cells, with substantial improvement in the harmonic spectrum of the output voltage. During the experimental veri cation, the motor is operated at di erent speeds using open loop v=f control method. The samples taken are always synchronised with the start of the sector to get synchronised PWM. The number of samples per sector is decreased with increase in the fundamental frequency to limit the switching frequency. Even though many topologies are available in literature, the most preferred topology for drives application such as traction drives is the 3-level NPC structure. This implies that the industry is still looking for viable alternatives to construct multilevel inverter topologies based on available power circuits. The second work focuses on the development of a multilevel inverter for variable speed medium-voltage drive application with dodecagonal voltage space-vectors, using lesser number of switches and power sources compared to earlier implementations. It can generate three concentric 12-sided polygonal voltage space-vectors and it is based on commonly available 2-level and 3-level inverters. A simple PWM timing computation method based on the hexagonal space-vector PWM is developed. The sampled values of the three-phase reference voltages are initially converted to the timings of a two-level inverter. These timings are mapped to the dodecagonal timings using a change of basis transformation. The voltage space- vector diagram of the proposed drive consists of sixty isosceles triangular regions, and the dodecagonal timings calculated are converted to the timings of the inner triangles. A searching algorithm is used to identify the triangular region in which the reference vector is located. A front-end recti er that may be easily implemented using standard star-delta transformers is also developed, to provide near-unity power factor. To test the performance of the inverter drive, an open-loop v=f control is used on a three-phase induction motor under no-load condition. The harmonic spectra of the phase voltages were computed in order to analyse the harmonic distortion of the waveforms. The carrier frequency was kept around 1.2 KHz for the entire range of operation. If the switching frequency is decreased, the conventional hexagonal space-vector based switching introduce signifi cant 5th, 7th, 11th and 13th harmonics in the phase currents. Out of these dominant harmonics, the 5th and 7th harmonics can be completely suppressed using dodecagonal voltage space-vector based switching as observed in the first and second work. It is also possible to remove the 11th and the 13th harmonics by using voltage space-vectors with 18 sides. The last topology is based on multilevel octadecagonal (18-sided polygon) voltage space-vectors, and it has better harmonic performance than the previously mentioned topologies. Here, a multilevel inverter system capable of producing three octadecagonal voltage space-vectors is proposed for the fi rst time, along with a simple timing calculation method. The conventional three-level inverters are only required to construct the proposed drive. Four asymmetric power supply voltages with 0:3054Vdc, 0:3473Vdc, 0:2266Vdc and 0:1207Vdc are required for the operation of the drive, and it is the main drawback of the circuit. Generally front-end isolation transformer is essential for high-power drives and these asymmetric voltages can be easily obtained from the multiple windings of the isolation transformer. The total harmonic distortion of the phase current is improved due to the 18-sided voltage space-vector switching. The ratio of the radius of the largest polygon and its inscribing circle is cos10 = 0:985. This ratio in the case of hexagonal voltage space-vector modulation is cos30 = 0:866, which means that the range of the linear modulation for the proposed scheme is signifi cantly higher. The drive is designed for open-end winding induction motors and it has better fault tolerance. It any of the inverter fails, it can be easily bypassed and the drive will be still functional with reduced speed. Open loop v=f control and rotor flux oriented vector control schemes were used during the experimental verifi cation. TMS320F2812 DSP platform was used to execute the control code for the proposed drive schemes. For the entire range of operation, the carrier was synchronized with the fundamental. For the synchronization, the sampling period is varied dynamically so that the number of samples in a triangular region is fi xed, keeping the switching frequency around 1.2 KHz. The average execution time for the v=f code was found to be 20 S, where as for vector control it took nearly 100 S. The PWM terminals and I/O lines of the DSP is used to output the timings and the triangle number respectively. To convert the triangle number and the timings to IGBT gate drive logic, an FPGA (XC3S200) was used. A constant dead-time of 1.5 S is also implemented inside the FPGA. Opto-isolated gate drivers with desaturation protection (M57962L) were used to drive the IGBTs. Hall-effect sensors were used to measure the phase currents and DC bus voltages. An incremental shaft position encoder with 2500 pulse per revolution is also connected to the motor shaft, to measure the angular velocity. 1200 V, 75 A IGBT half-bridge module is used to realize the switches. The concepts were initially simulated and experimentally verifi ed using laboratory prototypes at low power. While these concepts maybe easily extended to higher power levels by using suitably rated devices, the control techniques presented shall still remain applicable.

For medium and high-voltage drive applications, multilevel inverters are very popular. It is due to their superior performance compared to 2-level inverters such as reduced harmonic content in the output voltage and current, lower common mode voltage and dv=dt, and lesser voltage stress on power switches. The popular circuit topologies for multilevel inverters are neutral point clamped, cascaded H-bridge and flying capacitor based circuits. There exist different combinations of these basic topologies to realize multilevel inverters with modularity, better fault tolerance, and reliability. Due to these advantages, multilevel converters are getting good acceptance from the industry, and researchers all over the world are continuously trying to improve the performance of these converters. To meet such demands, three multilevel inverter topologies are proposed in this thesis. These topologies can be used for high-power induction motor drives, and the concepts presented are also applicable for synchronous motor drives, grid-connected inverters, etc. To get nearly sinusoidal phase current waveforms, the switching frequency of the conventional inverter has to be increased. It will lead to higher switching losses and electromagnetic interference. The problem with lower switching frequency is the intro- duction of low order harmonics in phase currents and undesirable torque ripple in the motor. The 5th and 7th harmonics are dominant for hexagonal voltage space-vector based low frequency switching, and it is possible to eliminate these harmonics by dodecagonal switching. Further improvement in the waveform quality is possible by octadecagonal voltage space-vectors. In this case, the complete elimination of 11th and 13th harmonic is possible for the entire modulation range. The concepts of dodecagonal and octadecagonal voltage space-vectors are used in the proposed inverter topologies. The first topology proposed in this thesis consists of cascaded connection of two H-bridge cells. The two cells are fed from unequal DC voltage sources having a ratio of 1 : 0:366, and this inverter can produce six concentric dodecagonal voltage space- vectors. This ratio of voltages can be obtained easily from a combination of star-delta transformers, since 1 : 0:366 = ( p 3 + 1) : 1. The cascaded connection of two H-bridge cells can generate nine asymmetric pole voltage levels, and the combined three-phase inverter can produce 729 voltage space-vectors (9 9 9). From this large number of combinations, only certain voltage space-vectors are selected, which forms dodecagonal pattern. In the case of conventional multilevel inverters, the voltage space-vector diagram consists of equilateral triangles of equal size, but for the proposed inverter, the triangular regions are isosceles and are having different sizes. By properly placing the voltage space-vectors in a sampling period, it is possible to achieve lower switching frequency for the individual cells, with substantial improvement in the harmonic spectrum of the output voltage. During the experimental veri cation, the motor is operated at di erent speeds using open loop v=f control method. The samples taken are always synchronised with the start of the sector to get synchronised PWM. The number of samples per sector is decreased with increase in the fundamental frequency to limit the switching frequency. Even though many topologies are available in literature, the most preferred topology for drives application such as traction drives is the 3-level NPC structure. This implies that the industry is still looking for viable alternatives to construct multilevel inverter topologies based on available power circuits. The second work focuses on the development of a multilevel inverter for variable speed medium-voltage drive application with dodecagonal voltage space-vectors, using lesser number of switches and power sources compared to earlier implementations. It can generate three concentric 12-sided polygonal voltage space-vectors and it is based on commonly available 2-level and 3-level inverters. A simple PWM timing computation method based on the hexagonal space-vector PWM is developed. The sampled values of the three-phase reference voltages are initially converted to the timings of a two-level inverter. These timings are mapped to the dodecagonal timings using a change of basis transformation. The voltage space- vector diagram of the proposed drive consists of sixty isosceles triangular regions, and the dodecagonal timings calculated are converted to the timings of the inner triangles. A searching algorithm is used to identify the triangular region in which the reference vector is located. A front-end recti er that may be easily implemented using standard star-delta transformers is also developed, to provide near-unity power factor. To test the performance of the inverter drive, an open-loop v=f control is used on a three-phase induction motor under no-load condition. The harmonic spectra of the phase voltages were computed in order to analyse the harmonic distortion of the waveforms. The carrier frequency was kept around 1.2 KHz for the entire range of operation. If the switching frequency is decreased, the conventional hexagonal space-vector based switching introduce signifi cant 5th, 7th, 11th and 13th harmonics in the phase currents. Out of these dominant harmonics, the 5th and 7th harmonics can be completely suppressed using dodecagonal voltage space-vector based switching as observed in the first and second work. It is also possible to remove the 11th and the 13th harmonics by using voltage space-vectors with 18 sides. The last topology is based on multilevel octadecagonal (18-sided polygon) voltage space-vectors, and it has better harmonic performance than the previously mentioned topologies. Here, a multilevel inverter system capable of producing three octadecagonal voltage space-vectors is proposed for the fi rst time, along with a simple timing calculation method. The conventional three-level inverters are only required to construct the proposed drive. Four asymmetric power supply voltages with 0:3054Vdc, 0:3473Vdc, 0:2266Vdc and 0:1207Vdc are required for the operation of the drive, and it is the main drawback of the circuit. Generally front-end isolation transformer is essential for high-power drives and these asymmetric voltages can be easily obtained from the multiple windings of the isolation transformer. The total harmonic distortion of the phase current is improved due to the 18-sided voltage space-vector switching. The ratio of the radius of the largest polygon and its inscribing circle is cos10 = 0:985. This ratio in the case of hexagonal voltage space-vector modulation is cos30 = 0:866, which means that the range of the linear modulation for the proposed scheme is signifi cantly higher. The drive is designed for open-end winding induction motors and it has better fault tolerance. It any of the inverter fails, it can be easily bypassed and the drive will be still functional with reduced speed. Open loop v=f control and rotor flux oriented vector control schemes were used during the experimental verifi cation. TMS320F2812 DSP platform was used to execute the control code for the proposed drive schemes. For the entire range of operation, the carrier was synchronized with the fundamental. For the synchronization, the sampling period is varied dynamically so that the number of samples in a triangular region is fi xed, keeping the switching frequency around 1.2 KHz. The average execution time for the v=f code was found to be 20 S, where as for vector control it took nearly 100 S. The PWM terminals and I/O lines of the DSP is used to output the timings and the triangle number respectively. To convert the triangle number and the timings to IGBT gate drive logic, an FPGA (XC3S200) was used. A constant dead-time of 1.5 S is also implemented inside the FPGA. Opto-isolated gate drivers with desaturation protection (M57962L) were used to drive the IGBTs. Hall-effect sensors were used to measure the phase currents and DC bus voltages. An incremental shaft position encoder with 2500 pulse per revolution is also connected to the motor shaft, to measure the angular velocity. 1200 V, 75 A IGBT half-bridge module is used to realize the switches. The concepts were initially simulated and experimentally verifi ed using laboratory prototypes at low power. While these concepts maybe easily extended to higher power levels by using suitably rated devices, the control techniques presented shall still remain applicable.