A redução das dimensões dos dispositivos semicondutores para escalas submicrométricas impõe diversos desafios no projeto de circuitos integrados. O impacto das variações intrínsecas afetando parâmetros elétricos cresce em importância à medida que a área dos dispositivos adentra a faixa nanométrica. Dentre essas variações estão flutuações nas tensões e correntes de terminal causadas pelas diferentes formas de ruído intrínseco dos dispositivos MOS. Este trabalho apresenta um estudo sobre o impacto do ruído elétrico no desempenho de circuitos MOS. Um novo modelo para simulação do Random Telegraph Signal (RTS) no domínio do tempo é utilizado. Uma metodologia de simulação para contabilizar o ruído térmico em simulações transientes também é proposta. A partir desses modelos de simulação de dispositivos, o trabalho de pesquisa analisa o impacto da variabilidade de parâmetros elétricos em nível de circuito. As simulações focam na caracterização da pureza espectral em osciladores em anel de sinal diferencial. Diversas topologias são apresentadas e posteriormente comparadas em termos do jitter no período de oscilação. / The shrinking of semiconductors devices dimensions to submicron scales introduces many challenges in integrated circuit design. The impact of intrinsic variability affecting electrical parameters increases in importance as transistors enter the nanometric range. Among these variations are fluctuations in terminal voltages and currents caused by different forms of intrinsic noise of MOS devices A new model for Random Telegraph Signal (RTS) simulation in time-domain is utilized. A simulation methodology to account for thermal noise effects in transient simulations is also proposed. Using these simulation models, this research work analyses the impact of electrical noise at circuit level. The simulations focus on the characterization of spectral purity in differential ring oscillators. Different topologies are presented and compared in terms of jitter in the period of oscillation.

Avec la diminution constante des dimensions des dispositifs électroniques, les structures MOS font face à de nombreux effets physiques liés à la miniaturisation. Dans le but de maintenir le rythme d'intégration indiqué par la loi de Moore, des nouvelles technologies, dont la structure résiste plus à ces effets physiques, remplacerons le transistor MOSFET bulk. Les modèles physiques permettant de prédire le comportement des transistors MOS atteignent rapidement leurs limites quand ils sont appliqués à ces structures émergentes. Ce travail de thèse est consacré au développement des modèles numériques et analytiques dédiés à la caractérisation des nouvelles architectures SOI et à substrat massif. Nous nous focalisons sur la modélisation du courant de drain basée sur le potentiel de surface, ainsi qu'à la modélisation du comportement en bruit basse fréquence de ces nouveaux dispositifs. Nous proposons un modèle explicite décrivant les potentiels de surface avant et arrière d'une structure SOI. Nous développons ensuite un modèle de bruit numérique et analytique permettant de caractériser les différents oxydes d'une structure FD SOI. La dernière partie de ce mémoire est consacrée à l'étude d'une nouvelle architecture du transistor MOS sur substrat massif. Une caractérisation de la conduction électrique de ce dispositif et de son comportement en bruit basse fréquence sont présentés / With the continuous reduction of the size of MOS devices, various associated short channel effects become significant and limit this scaling. To restrain this limit, multi-gate MOSFET devices seem to be more interesting, thanks to their better control of the gate on the channel. These new devices seem to be good candidates to replace the classical MOS architecture. The existing physical models used to predict the behaviour of MOSFET bulk devices are limited when they are applied to these emerging structures. This thesis is devoted to the development of numerical and analytical models dedicated to the characterization of new SOI architectures and bulk devices. We focus on the modeling of the drain current based on the surface potential as well was the modeling of the low frequency noise behaviour of these devices. We propose an explicit model describing the front and back surface potential of a FD SOI structure. We then develop numerical and analytical low frequency noise models allowing the characterization of the different oxides of a FD SOI structure. The last part of this thesis is devoted to the study of a new architecture of bulk MOS transistors. A characterization of the electrical conduction of this device and its low frequency noise behavior are presented

Gallium Nitride (GaN) high electron mobility transistors (HEMT) have superior performance characteristics compared to Silicon (Si) and Gallium Arsenide (GaAs) based transistors. GaN is a wide bandgap semiconductor which allows it to operate at higher breakdown voltages and power. Unlike traditional semiconductor devices, the GaN HEMT channel region is undoped and relies on the piezoelectric effect created at the GaN and Aluminum Gallium Nitride (AlGaN) heterojunction to create a conduction channel in the form of a quantum well known as the two dimensional electron gas (2DEG). Because the GaN HEMTs are undoped, these devices have higher electron mobility crucial for high frequency operation. However, over time and use these devices degrade in a manner that is not well understood. This research utilizes low frequency noise (LFN) as a method for analyzing changes and degradation mechanisms in GaN-on-Si devices due to gate stress. LFN is a useful tool for probing different regions of the device that cannot be measured through direct means. LFN generation in GaN HEMTs is based on the carrier fluctuation theory of 1/f noise generation which states fluctuations in the number of charge carriers results in conductance fluctuations that produce a Lorentzian noise spectrum. The summing Lorentzian noise spectra from multiple traps leads to 1/f and random telegraph signal (RTS) noise. The primary cause of carrier fluctuations are electron traps near the 2DEG and in the AlGaN bulk. These traps occur naturally due to dislocations and impurities in the manufacturing process, but new traps can be generated by the inverse-piezoelectric effect during gate stress. This thesis introduces noise and presents a circuit to bias the devices and measure gate and drain LFN simultaneously. Three measurements are performed before and after gate DC stress at three different temperatures: DC characterization, capacitance-voltage (C-V) measurements, and LFN measurements. The DC characteristics show an increase in gate leakage after stress caused by an increase in traps after degradation consistent with trap assisted tunneling. However, the leakage current on the drain and source side differ before and after stress leading to the conclusion that the source side of the gate is more sensitive to gate stress. Gate leakage current on the drain side is also sensitive to temperature due to thermionic trap assisted tunneling. Hooge parameter calculations agree with previous research. The LFN results show an increase in gate and drain noise power, SIg(f) and SId(f), in accordance with increased gate leakage current under cutoff bias. RTS noise is also observed to increase in frequency with increased temperature. Activation energies for RTS noise are extracted and qualitatively linked to trap depth based on the McWhorter trap model.

No description available.

A very short and disagreeable audible and tactile response from a vehicle driveline may be excited when the throttle is abruptly applied or released, or when the clutch is rapidly engaged. The condition is most noticeable in low gear and in slow moving traffic, when other background engine and road noise levels are low. This phenomenon is known as clonk and is often associated with the first cycle of shuffle response, which is a low frequency longitudinal vehicle movement excited by throttle demand. It is often reported that clonk may coincide with each cycle of the shuffle response, and multiple clonks may then occur. The problem is aggravated by backlash and wear in the drivetrain, and it conveys a perception of low quality to the customer. Hitherto, reported investigations do not reveal or discuss the mechanism and causal factors of clonk in a quantitative manner, which would relate the engine impulsive torque to the elastic response of the driveline components, and in particular to the noise radiating surfaces. Crucially, neither have the issues of sensitivity, variability and non-linearity been addressed and published. It is also of fundamental importance that clonk is seen as a total system response to impulsive torque, in the presence of distributed lash at the vibro-elastic impact sites. In this thesis, the drivetrain is defined as the torque path from the engine flywheel to the road wheels. The drivetrain is a lightly damped and highly non-linear dynamic system. There are many impact and noise emitting locations in the driveline that contribute to clonk, when the system is subjected to shock torque loading. This thesis examines the clonk energy paths, from the initial impact to many driveline lash locations, and to the various noise radiating surfaces. Both experimental and theoretical methods are applied to this complex system. Structural and acoustic dynamics are considered, as well as the very important frequency couplings between elastic structures and acoustic volumes. Preliminary road tests had indicated that the clonk phenomenon was a, very short transient impact event between lubricated contacts and having a high frequency characteristic. This indicated that a multi-body dynamics simulation of the driveline, in conjunction with a high frequency elasto-acoustic coupling analysis, would be required. In addition, advanced methods of signal analysis would be required to handle the frequency content of the very short clonk time histories. These are the main novelties of this thesis. There were many successful outcomes from the investigation, including quantitative agreement between the numerical and experimental investigations. From the experimental work, it was established that vehicle clonk could be accurately reproduced on a driveline rig and also on a vehicle chassis dynamometer, under controlled test conditions. It then enabled Design of Experiments to be conducted and the principal causal factors to be identified. The experimental input and output data was also used to verify the mathematical simulation. The high frequency FE analysis of the structures and acoustic cavities were used to predict the dynamic modal response to a shock input. The excellent correlation between model and empirical data that was achieved, clearly established the clonk mechanism in mathematical physics terms. Localised impact of meshing gears under impulsive loads were found to be responsible for high frequency structural wave propagation, some of which coupled with the acoustics modes of cavities, when the speed of wave propagation reached supersonic levels. This finding, although previously surmised, has been shown in the thesis and constitutes a major contribution to knowledge.

The increase in capacity demand along with the advancement in digital signal processing (DSP) have recently revived the interest in coherent optical communications and led to its commercialization. However, design and development of robust DSP algorithms for example for carrier phase recovery (CPR) becomes complex as we opt for high order modulation formats such as 16QAM and beyond. Further, electrical-domain dispersion compensation (EDC), while providing many advantages, makes the system more susceptible to laser frequency noise (FN). For instance, in coherent optical links with post-reception EDC, while the transmitter frequency noise causes only phase impairment, the local oscillator (LO) FN in these systems results in a noise enhancement in both amplitude and phase. This noise is commonly known as equalization enhanced phase noise (EEPN). It results in asymmetric requirements for transmitter laser and LO laser. Further, the system design in the presence of lasers with non-white frequency noise becomes increasingly challenging for increased capacity-distance product. The main contributions of this thesis are, firstly, an experimentally validated theory of coherent optical links with lasers having general non-white frequency noise spectrum and corresponding system/laser design criteria and mitigation technique. Secondly, low complexity and high phase noise tolerant CPR for high order modulation formats. The general theory propounded in this thesis elucidates the origin of the laser frequency noise induced noise enhancement in coherent optical links with different DSP configurations. The thesis establishes the existence of multiple frequency noise regimes and shows that each regime results in different set of impairments. The influence of the impairments due to some regimes can ideally be reduced by optimizing the corresponding mitigation algorithms, while other regimes cause irretrievable impairments. Experimentally validated theoretical boundaries of these regimes and corresponding criteria applicable to system/laser design are provided. Further, an EEPN mitigation method and its two possible implementations are proposed and discussed. The thesis also demonstrates an intrinsic limitation of the conventional Blind Phase Search (BPS) algorithm due to angular quantization and provides methods to overcome it. Finally, this thesis proposes and demonstrates single stage and multi-stage carrier phase recovery algorithms for compensation of phase impairments due to the two lasers for higher order circular and square modulations. The proposed methods outperform the state of art algorithms both in performance and in complexity. / <p>QC 20170516</p> / European project ICONE gr. #608099

The objective of this doctoral thesis is to study three different innovative noise control techniques in ducts namely: acoustic metamaterials, porous absorbers and microperforates. There has been a lot of research done on all these three topics in the context of duct acoustics. This research will assess the potential of the acoustic metamaterial technique and compare to the use of conventional methods using microperforated plates and/or porous materials.  The objective of the metamaterials part is to develop a physical approach to model and synthesize bulk moduli and densities to feasibly control the wave propagation pattern, creating quiet zones in the targeted fluid domain. This is achieved using an array of locally resonant metallic patches. In addition to this, a novel thin slow sound material is also proposed in the acoustic metamaterial part of this thesis. This slow sound material is a quasi-labyrinthine structure flush mounted to a duct, comprising of coplanar quarter wavelength resonators that aims to slow the speed of sound at selective resonance frequencies. A good agreement between theoretical analysis and experimental measurements is demonstrated. The second technique is based on acoustic porous foam and it is about modeling and characterization of a novel porous metallic foam absorber inside ducts. This material proved to be a similar or better sound absorber compared to the conventional porous absorbers, but with robust and less degradable properties. Material characterization of this porous absorber from a simple transfer matrix measurement is proposed.The last part of this research is focused on impedance of perforates with grazing flow on both sides. Modeling of the double sided grazing flow impedance is done using a modified version of an inverse semi-analytical technique. A minimization scheme is used to find the liner impedance value in the complex plane to match the calculated sound field to the measured one at the microphone positions. / <p>QC 20160923</p>

O Ruído de Baixa Frequência (LFN), tais como o ruído flicker e o Random Telegraph Noise (RTN), são limitadores de performance em muitos circuitos analógicos e digitais. Para transistores diminutos, a densidade espectral de potência do ruído pode variar muitas ordens de grandeza, impondo uma séria limitação na performance do circuito e também em sua confiabilidade. Nesta tese, nós propomos um novo modelo de RTN estatístico para descrever o ruído de baixa frequência em MOSFETs. Utilizando o modelo proposto, pode-se explicar e calcular o valor esperado e a variabilidade do ruído em função das polarizações, geometrias e dos parâmetros físicos do transistor. O modelo é validado através de inúmeros resultados experimentais para dispositivos com canais tipo n e p, e para diferentes tecnologias CMOS. É demonstrado que a estatística do ruído LFN dos dispositivos de canal tipo n e p podem ser descritos através do mesmo mecanismo. Através dos nossos resultados e do nosso modelo, nós mostramos que a densidade de armadilhas dos transistores de canal tipo p é fortemente dependente do nível de Fermi, enquanto para o transistor de tipo n a densidade de armadilhas pode ser considerada constante na energia. Também é mostrado e explicado, através do nosso modelo, o impacto do implante de halo nas estatísticas do ruído. Utilizando o modelo demonstra-se porque a variabilidade, denotado por σ[log(SId)], do RTN/LFN não segue uma dependência 1/√área; e fica demonstrado que o ruído, e sua variabilidade, encontrado em nossas medidas pode ser modelado utilizando parâmetros físicos. Além disso, o modelo proposto pode ser utilizado para calcular o percentil do ruído, o qual pode ser utilizado para prever ou alcançar certo rendimento do circuito. / Low Frequency Noise (LFN) and Random Telegraph Noise (RTN) are performance limiters in many analog and digital circuits. For small area devices, the noise power spectral density can easily vary by many orders of magnitude, imposing serious threat on circuit performance and possibly reliability. In this thesis, we propose a new RTN model to describe the statistics of the low frequency noise in MOSFETs. Using the proposed model, we can explain and calculate the Expected value and Variability of the noise as function of devices’ biases, geometry and physical parameters. The model is validated through numerous experimental results for n-channel and p-channel devices from different CMOS technology nodes. We show that the LFN statistics of n-channel and p-channel MOSFETs can be described by the same mechanism. From our results and model, we show that the trap density of the p-channel device is a strongly varying function of the Fermi level, whereas for the n-channel the trap density can be considered constant. We also show and explain, using the proposed model, the impact of the halo-implanted regions on the statistics of the noise. Using this model, we clarify why the variability, denoted by σ[log(SId)], of RTN/LFN doesn't follow a 1/√area dependence; and we demonstrate that the noise, and its variability, found in our measurements can be modeled using reasonable physical quantities. Moreover, the proposed model can be used to calculate the percentile quantity of the noise, which can be used to predict or to achieve certain circuit yield.

No description available.

A wide variety of novel complementary-metal-oxide-semiconductor (CMOS) devices that are strong contenders for future high-speed and low-noise RF circuits have been evaluated by means of static electrical measurements and low-frequency noise characterizations in this thesis. These novel field-effect transistors (FETs) include (i) compressively strained SiGe channel pMOSFETs, (ii) tensile strained Si nMOSFETs, (iii) MOSFETs with high-k gate dielectrics, (iv) metal gate and (v) silicon-on-insulator (SOI) devices. The low-frequency noise was comprehensively characterized for different types of operating conditions where the gate and bulk terminal voltages were varied. Detailed studies were made of the relationship between the 1/f noise and the device architecture, strain, device geometry, location of the conduction path, surface cleaning, gate oxide charges and traps, water vapour annealing, carrier mobility and other technological factors. The locations of the dominant noise sources as well as their physical mechanisms were investigated. Model parameters and physical properties were extracted and compared. Several important new insights and refinements of the existing 1/f noise theories and models were also suggested and analyzed. The continuing trend of miniaturizing device sizes and building devices with more advanced architectures and complex materials can lead to escalating 1/f noise levels, which degrades the signal-to-noise (SNR) ratio in electronic circuits. For example, the 1/f noise of some critical transistors in a radio receiver may ultimately limit the information capacity of the communication system. Therefore, analyzing electronic devices in order to control and find ways to diminish the 1/f noise is a very important and challenging research subject. We present compelling evidence that the 1/f noise is affected by the distance of the conduction channel from the gate oxide/semiconductor substrate interface, or alternatively the vertical electric field pushing the carriers towards the gate oxide. The location of the conduction channel can be varied by the voltage on the bulk and gate terminals as well by device engineering. Devices with a buried channel architecture such as buried SiGe channel pMOSFETs and accumulation mode MOSFETs on SOI show significantly reduced 1/f noise. The same observation is made when the substrate/source junction is forward biased which decreases the vertical electric field in the channel and increases the inversion layer separation from the gate oxide interface. A 1/f noise model based on mobility fluctuations originating from the scattering of electrons with phonons or surface roughness was proposed. Materials with a high dielectric constant (high-k) is necessary to replace the conventional SiO2 as gate dielectrics in the future in order to maintain a low leakage current at the same time as the capacitance of the gate dielectrics is scaled up. In this work, we have made some of the very first examinations of 1/f noise in MOSFETs with high-k structures composed by layers of HfO2, HfAlOx and Al2O3. The 1/f noise level was found to be elevated (up to 3 orders of magnitude) in the MOSFETs with high-k gate dielectrics compared to the reference devices with SiO2. The reason behind the higher 1/f noise is a high density of traps in the high-k stacks and increased mobility fluctuation noise, the latter possibly due to noise generation in the electron-phonon scattering that originates from remote phonon modes in the high-k. The combination of a TiN metal gate, HfAlOx and a compressively strained surface SiGe channel was found to be superior in terms of both high mobility and low 1/f noise. / QC 20100928