Ο μετασχηματισμός κυματιδίου (wavelet transform) είναι ένα αποτελεσματικό εργαλείο για την ανάλυση σημάτων. Ο κυριότερος λόγος είναι ότι προσφέρει το πλεονέκτημα της χρήσης μεγάλων χρονικών παραθύρων εκεί όπου απαιτείται ακρίβεια σε πληροφορίες χαμηλής συχνότητας και μικρότερων χρονικών παραθύρων εκεί όπου απαιτείται ακρίβεια σε πληροφορίες υψηλής συχνότητας. Δηλαδή έχει την ικανότητα “τοπικής ανάλυσης”, δηλ. να αναλυθεί μία εντοπισμένη περιοχή ενός μεγαλύτερου σήματος. Στην εργασία αυτή προτείνεται μια νέα υλοποίηση φίλτρου που υλοποιεί το μετασχηματισμό κυματιδίου, με δομικά στοιχεία μη γραμμικούς διαγωγούς στο πεδίο του υπερβολικού ημιτόνου. Το φίλτρο χρησιμοποιείται για την “τοπική ανάλυση“ του καρδιακού σήματος με στόχο την ανίχνευση καρδιακών βλαβών. Κύρια πλεονεκτήματα αποτελούν η δυνατότητα λειτουργίας σε πολύ χαμηλή τάση τροφοδοσίας (0.6V), η χαμηλή κατανάλωση ισχύος, και η ρύθμιση των χαρακτηριστικών του φίλτρου από το ρεύμα πόλωσης. Η εξομοίωση της λειτουργίας του κυκλώματος καθώς και η φυσική σχεδίαση έγιναν με χρήση του λογισμικού Cadence, σε τεχνολογία AMS 0.35μm. / The wavelet transform is an efficient tool for signal analysis. The main reason of its efficiency is that it offers the advantage of using large time windows where precision is required in the low frequency information and shorter windows required accuracy at high frequencies information. It has the ability of “local analysis” i.e. to analyze a localized area to a larger signal. In this paper we propose a new implementation of a filter that materializes the wavelet transform, with nonlinear transconductor components in sinh domain. The filter used for “local analysis” of the cardiac signal in order to detect heart malfunctions. Main advantages are the abilities to operate at very low supply voltage (0.6V), low power consumption and regulation characteristics of the filter from the bias current. The simulation process of the circuit and physical design were done using the Cadence software, in AMS 0.35mm technology.

With continuous and aggressive scaling in semiconductor technology, there is an increasing gap between design expectation and manufactured silicon data. Research on DFM (Design for manufacturability), MFD (Manufacturing for Design) and statistical analysis have been investigated in recent years to bridge design and manufacturing. Fundamentally, layout is the final output from the design side and the input to the manufacturing side. It is also the last chance to dramatically modify the design efficiently and economically. In this dissertation, I present the modeling and optimization work on bridging the gap between design expectation and reality, improving performance and enhancing manufacturing yield. I investigate several stages of semiconductor design development including manufacturing process, device, interconnect, and circuit level. In the manufacturing process stage, a novel inverse lithography technology (ILT) is proposed for sub-wavelength lithography resolution enhancement. New intuitive transformations enable the method to gradually converge to the optimal solution. A highly efficient method for gradient calculation is derived based on partially coherent optical models. Dose variation is considered within the ILO process with the min-max optimization method and the computation overhead on dose process variation could be omitted. The methods are implemented in state-of-the-art industrial 32nm lithography environment. After the work in the lithography process stage provides both mask optimization and post-layout silicon image simulation, my work on the first non-rectangular device modeling card extends the post-layout lithography to post-litho electrical calibration. Based on the lithography simulation results, the non-rectangular gate shapes are extracted and their effect is investigated by the proposed non-rectangular device modeling card and post-litho circuit simulation flow. This work is not only the first non-rectangular device modeling card but also compatible with industry standard device models and the parameter extraction flow. Interconnect plays a more critical role in the nanometer scale IC design especially because of its impact on delay. The scattering effect that occurs in nanoscale wires is modeled and different methods of wire sizing/shaping are discussed. Based on closed-form resistivity model for nanometer scale Cu interconnect, new interconnect delay model and wire sizing/shaping strategies are developed. Based on the advanced modeling of process, device and interconnect, circuit level investigation is focused on statistical timing analysis with a new latch delay model. For the first time, both combinational logic and clock distribution circuits are integrated together through statistical timing of latch outputs. This dissertation studies the new phenomena of nanometer scale IC design and manufacture. Starting from the designed layout, through modeling, optimization and simulation, the work moves ahead to the mask pattern and silicon image, calibrates electrical properties of devices as well as circuits. Through above process, we can better connect layout with silicon data to reach design and manufacturing closure. / text

La stimulation électrique des tissus neuronaux est une technique largement utilisée dans la recherche en neuroscience et à des fins thérapeutiques. Ce travail est une contribution à la conception des circuits et systèmes électroniques de stimulation. De tels circuits sont requis dans quatre projets multi-disciplinaires en cours dans l’équipe Elibio de l’IMS, présentés dans ce document : STN-Oscillations (ANR 08-MNPS-036) concernant l’étude de la Stimulation Cérébrale Profonde(SCP), HYRENE (ANR 2010-Blan-031601), ayant pour but le développement d’un systèmehybride de restauration de l’activité motrice dans le cas d’une lésion de la moelle épinière, BRAINBOW (European project FP7-ICT-2011-C), ayant pour objectif l’élaboration de neuro-prothèses innovantes capables de restaurer la communication autour de lésions cérébrales, CENAVEX (ANR et NSH AN13-NEUIC-0001-01), visant au développement d’un système de stimulation en boucle fermée pour le contrôle de la respiration. Cette thèse propose une approche de conception globale qui aboutira au développement d’un système multi-applications, prenant en compte les spécificités de chaque contexte.Dans un premier temps, afin d’évaluer les contraintes liées à l’expérimentation in vivo et in vitro, deux stimulateurs spécifiques ont été réalisés. Le premier permet la SCP chronique du rat,résout la contrainte énergétique à l’aide d’une gestion dynamique de l’alimentation. Ce dispositif a été fabriqué et implanté in vivo avec succès. Une expérimentation à long terme a été effectuée afin de valider ses propriétés sur l’animal. Dans un second temps, un autre stimulateur a été conçu en utilisant un FPAA (Field Programmable Analog Array). La conception de ce circuit se concentre sur l’équilibrage des charges nécessaire à l’innocuité des sytèmes. L’architecture obtenue permet une stimulation biphasique adaptative résultant en un faible courant équivalent de fuite (moins d’un nano Ampère). Afin d’aboutir à un stimulateur multi-application, un travail préliminaire de modélisation de l’impédance de l’électrode, l’élément de charge du circuit de stimulation, a été mené. Une méthode de mesure et d’identification d’un modèle non-linéaire est détaillée, basée sur une approche par multi-modèles et fractionnaire.L’approche multi-application est ensuite mise en oeuvre, basée sur un effet d’échelle pour le dimensionnement des stimulateurs. Cet effet d’échelle lie la géométrie de l’électrode, le nombre de canaux requis par application et les niveaux de courant mis en jeu : cet effet permet de proposer une architecture de circuit multi-application. Un circuit intégré démontrant la faisabilité d’un tel système a été conçu, fabriqué et testé avec succès. Un système de stimulation multi-application basé sur ce circuit a été conçu, permettant de nouvelles recherches sur les quatre contextes physiopathologiques présentés.Enfin, un critère de mérite dédié à la stimulation est proposé. Ce critère prend en compte l’efficacité énergétique et l’équilibrage des charges afin d’évaluer le degré d’optimisation d’un circuit ou d’un système. Un tel critère de mérite est un concept novateur qui devrait permettre une optimisation rationnelle des architectures de stimulation. / Electrical stimulation of neural tissues is a widely used technique for both neuroscience explorations and innovative medical devices. This work is a contribution to the design of electrical stimulation circuits and systems. Stimulators are part of the experimental setup in several multi-disciplinary projects conducted at IMS (groupElibio), presented in this document : STN-Oscillations(French ANR 08-MNPS-036), studyingDeep Brain Stimulationmecha-nisms (DBS), HYRENE(French ANR 2010-Blan-031601), aimed at developing a hybrid system couplingartificial and biological neural networks to restore locomotion after spinal cord lesion, BRAINBOW(European Project FP7-ICT-2011-C), working on designing a neuro-prosthesis capable of restoring lost communication between neuronal circuits, CENAVEX(French ANR and American NSH AN13-NEUIC-0001-01), proposing a noveldesign for a closed-loop system for respiration control. This thesis integrates the specificities of each context and considers global therapeuticapplication issues, with the aim of proposing an original, global approach to designing thearchitecture of a multi-application stimulator.First, in order to evaluate the constraints related to ourin vivoandin vitrocontexts, anembedded stimulator for chronic DBS experiments in rodents was developed and successfullyimplantedin vivo. This design was optimized for power management during long-term experi-ments. The stimulator characteristics were assessed with behavioural tests on a rat population.Then a second, specific stimulator was designed usingField Programmable Analog Arraysforaccurate charge balancing, as well as to fulfil strong constraints to ensure tissue integrity. Theproposed charge-sensing architecture produced adaptive biphasic stimulation with sub-nanoampere DC-equivalent current.With a view to a global approach to stimulator design, an accurate model of the electrodeimpedance was built, to represent the concrete load of a stimulator. A measurement protocolbased on biphasic current-controlled solicitations and a modelling procedure relying on anoriginal fractional multi-model are described.The first step in this multi-application design approach was to investigate an electrical sizingscale effect. This involves electrode geometry, the number of channels per application, and theimplied current levels. A proof-of-concept ASIC was designed and successfully tested. A boardfor adaptive stimulation was then able to be deployed in the ongoing research projects.Finally, a dedicated Figure of Merit is proposed for stimulation. This criterion takes energyefficiency and charge balancing into account to quantify the degree of optimization of a circuitor system. This Figure of Merit is a novel concept that facilitates rational optimization ofstimulation architectures.

本研究針對台灣IC設計公司，探討其創新資源、創新活動、創新能力與產品轉型能力的關係，本研究希望能從中找出因不同個案所造成的模式，提供IC設計業在選擇新產品開發策略的最佳模式。 　　本研究歸納分析研究如下： 　　【研究發現一】IC設計業的創新能力來源為知識的吸收、創造與蓄積，並以核心能力四個構面的知識和技能、實體技術系統、管理系統、價值觀和規範為平台。 　　【研究發現二】IC設計業的創新活動以原型試製之專案為主。 　　【研究發現三】IC設計業者可以創新能力區分為兩種：一為創新能力較高的市場領導者，另一為創新能力較低的市場跟隨者。 　　【研究發現四】IC設計業者的新產品開發模式，其技術路徑相依度較高者，新產品技術由公司自行開發，而區分為增加新產品線的多產品線產品轉型模式與精進原產品線的集中漸進產品轉型模式。 　　【研究發現五】IC設計業者的新產品開發模式，其技術路徑相依度較低時，新產品技術透過購買、合資、合作開發、購併與技術授權取得，而區分增加新產品線的為多元化產品轉型模式與轉換產品線的脫胎換骨產品轉型模式。 　　【研究發現六】市場龍頭者由於核心能力介面多、有較多之創新資源，故可採用集中漸進、多產品或多元化轉型方式，永續經營。 　　【研究發現七】跟隨者由於核心能力少、創新資源欠缺，故以集中資源方式，切入利基型產品之脫胎換骨的轉型。 　　【研究發現八】跟隨者由於核心能力少、創新資源欠缺，故以集中資源方式於現有領域，爭取市場龍頭而形成集中漸進式的產品轉型。 　　【研究發現九】IC設計公司可以取得授權或買斷IP，配合既有核心能力，快速使產品轉型。 　　【研究發現十】由於市場競爭，IC設計業者須先爭第一名才能賺大錢，最終目標才是多元化Diversification，增加產品線、擴大營運規模以分散風險。 　　研究結果發現，IC設計業者的創新管理是產品轉型的基礎，且四種產品轉型模式可提供IC設計業在選擇新產品開發策略的參考。因此本研究建議IC設計業者在做產品轉型時可依自身的條件選擇適合自己的新產品開發策略。 / This thesis is focused on the relationship of Taiwan IC design companies’innovation resources, innovation activities, innovation capabilities and products transition ability. Also hope to find a model based on different cases, and provide IC design industry an optimal model when choosing new product develop strategies. 　　We could summarize this thesis to the following findings: 　　(1) The innovation capability of the IC design industry comes from absorption of knowledge, creation and accumulation, and as a platform of the four construction (knowledge and skills, real technology system, management system, value proposition and regulation) of the core capability. 　　(2) The innovation ofIC design industries is focused on the projects of prototype pilot run. 　　(3) There are two kinds ofIC design industries based on their innovation capability, one is the market leader with higher innovation capabilities, and the other is the market follower with lower innovation capabilities. 　　(4) Regarding the new product develop model of the IC design industries, those companies with higher technology path dependence will develop their own product technology, and therefore separating into multi-product line product transition model and original product line central incremental product transition model. 　　(5) The new product develop model of the IC design industries, those companies with lower technology path dependence will get the new product technology by acquirement, joint venture, co-development, merge and technology transfer, and separating into adding new product line product transition model and revolution product transition model. 　　(6) Market leader have higher core capability and innovation resource, so they can use the method of concentrate incremental, multi-product or multi-way transition, and therefore their business could last long. 　　(7) The follower has less core capability and lack of innovation resource, so they use central resource way and cut in niche product transition model. 　　(8) The follower has less core capability and lack of innovation resource, so they use central resource way in the current field, and fight for the market leader position to become central incremental product transition. 　　(9) IC design companies accelerate their product transition by acquiring IP and with their own capability. 　　(10) Due to the market competition, IC design companies need to fight for number one to make money. The last objective is to reduce risk by diversification, add product line and increase operation scale. 　　The innovation management of the IC design companies is the base of product transition, and the four product transition models can provide references for choosing new product develop strategy. So this research recommends IC design companies to choose their own new product develop strategy based on their own condition when doing the product transition.

台灣IC設計產業的產值佔全球IC產值約6%，意謂著台灣IC設計產業還有很大的成長空間，但也代表台灣業者必須面對全球性的激烈競爭。而台灣IC設計業者的主要競爭對手，就是美國與中國的IC供應商。 2011年第一季台灣IC設計公司的獲利大幅衰退，第二季又因淡季與匯率的雙重影響，淨利持續往下探底。但是美國與中國的相關業者，在同時期的狀況卻不是如此，究竟台灣IC設計產業出了什麼問題？ 本研究使用多元迴歸，分析台美中三地IC供應商的財務資訊，藉以找出影響獲利的關鍵因素。以下列出本文的三個關鍵議題：(1)比較各國業者獲利模式的差異；(2)探討各國業者的經營模式；(3)提供實務的建議給台灣業者。 關鍵詞：IC設計、多元迴歸、經營模式 / Basing on output value, Taiwan IC Design Industry has a nearly 6% global market share. It means that there is a large growing space for Taiwan’s, which must face the strong competition from international rivals. The major competitors come from USA and China for Taiwan IC design houses. In first quarter of 2011, many Taiwan IC design houses had an obvious decline in profit. The net incomes ran down continuously under the influences of low season and exchange rate next quarter. At the same time, USA and China made a difference with Taiwan. What happen to Taiwan IC design industry? In order to find the elements of profit by area, this research has analyzed the financial data of Taiwan, USA, and China IC suppliers by “Multiple Regression”. There are three key subjects in this thesis: The first is to find the differences of individual profit pattern. The second is to work out the business models in each country. The third is to give the practical suggestions to Taiwan’s. Keywords: IC design, Multiple Regression, business model

<p>The sigma-delta techniques for analog-to-digital conversion have for long been utilized when high precision is needed. Despite the fact that these have been realized by a numerous of different structures, the theory of how to construct a sigma-delta ADC is not very extensive.</p><p>This thesis will assume that an SFG description of the CRFB sigma-delta modulator has been designed and presents a structured method to obtain a circuit realization of the integrators in a specific modulator.</p><p>The first activity is to scale the inputs to each integrator in order to make sure that the produced outputs of each integrator is within the output-range of the OTA which is used. The next thing that is presented is an algorithmic way of descending from the SFG design of the modulator down to a switched-capacitor implementation of the system.</p><p>To be able to continue with the circuit realization, one needs to do a rigorous noise analysis of the modulator, which gives the sizes of the different capacitors in the SC-circuits. The last topic of this thesis is a method to obtain the specifications of the OTA in each integrator.</p>

The sigma-delta techniques for analog-to-digital conversion have for long been utilized when high precision is needed. Despite the fact that these have been realized by a numerous of different structures, the theory of how to construct a sigma-delta ADC is not very extensive. This thesis will assume that an SFG description of the CRFB sigma-delta modulator has been designed and presents a structured method to obtain a circuit realization of the integrators in a specific modulator. The first activity is to scale the inputs to each integrator in order to make sure that the produced outputs of each integrator is within the output-range of the OTA which is used. The next thing that is presented is an algorithmic way of descending from the SFG design of the modulator down to a switched-capacitor implementation of the system. To be able to continue with the circuit realization, one needs to do a rigorous noise analysis of the modulator, which gives the sizes of the different capacitors in the SC-circuits. The last topic of this thesis is a method to obtain the specifications of the OTA in each integrator.

本研究針對台灣半導體設計產業的演變軌跡進行探討與分析，本研究以國內技術層次及市場發展都相對優良的IC(Integrated Circuit，簡稱IC)設計產業為範疇，利用安妮塔․麥格漢(Anita M.Mcgahan)在「創新的軌跡」對IC設計產業的演化作分析以及探討，同時亦可將分析結果提供IC 設計產業作為未來發展之參考。研究所得之結論如下: 1、IC設計產業的產品生命週期短，技術汰換率高，市場變化快速。 2、IC設計產業是創造型演變軌跡。 3、台灣IC設計產業者核心資產較不易保護，但核心活動都較堅固。 4、IC設計產業中的電腦晶片組和LCD驅動晶片與視訊控制IC都已為成熟期。 本研究之結論在管理上的意義: 1、IC設計產業的核心資產易遭受威脅，完整的核心活動可降低核心資產所遭受的損失。 2、IC設計產業的核心資產最重要的為專利和產品的研發技術。 3、IC設計產業的核心活動上，因為台灣的上、下游垂直分工的形態，讓台灣IC設計廠商跟供應商的關係大致良好，所以台灣廠商的核心活動也佔有優勢。

IC設計公司的間接成本高，須追求規模經濟，但對物聯網這種少量多樣的應用又有厚望。因此多會謹慎投入，怕投入如流水，又怕咬不到餅。 面對整體龐大的物聯網產業，歐美大廠運用優勢，嘗試建立特有的生態圈將各方納入。案例IC設計公司的規模很難和歐美大廠對作，但也有其優勢，不過原規模經濟的商業模式不再適用。 IC複雜使其位居重要位置，而案例IC設計公司擁有許多優秀工程人才，再加上成熟產品線廣，且和物聯網關聯，都是優勢資源。但做的是B2B生意，接觸不到終端市場，而新IC開發時間長，導致對終端需求掌握度低，且現有工程師數量是無法支援有多樣需求的微型物聯網業者，這些就是劣勢資源。 如案例IC設計公司將微型物聯網業者及獨立工作者拉到平台上，提供工作者自主工作機會，同時滿足物聯網業者不足的支援人力。案例IC設計公司須貢獻包含工作者的訓練與認證、協助物聯網業者找到符合的工作者、設計專案流程管理機制同時確保工作者收得到價金。如此解決了對微型物聯網業者支援不夠的問題，還可藉由平台獲取最真確的需求資訊，又解決另一困境。 三方都有得且無太多風險，可行性確認。用波特的五力分析，案例IC設計公司導入新商業模式有相當優勢，早投入更可建立先行者優勢。

<p>Impulsni generator predstavlja jedan od najvažnijih delova bežičnog<br />primopredajnika. Pored toga što treba da generiše signal čiji<br />spektar zadovoljava odgovarajuću spektralnu masku, generator treba da<br />bude što jednostavniji, zauzima malu površinu i ima malu potrošnju.<br />Naučni doprinos ove doktorske disertacije predstavlja sedam novih<br />konfiguracija ultra-širokopojasnih impulsnih generatora<br />projektovanih u CMOS tehnologiji, od kojih su tri fabrikovane u<br />0,18 &mu;m UMC CMOS procesu. Prvi dizajn je zasnovan na principu<br />kombinovanja kratkotrajnih impulsa, sledeća tri sadrže ring<br />oscilator, naredna dva impulsna generatora koriste princip<br />filtriranja, dok poslednje novo rešenje obezbeđuje BPSK kodovanje<br />korišćenjem dva ring oscilatora.</p> / <p>Pulse generator is one of the most important parts of a wireless transceiver.<br />Besides generating a signal which spectrum has to satisfy corresponding<br />spectral mask, the pulse generator should have topology as simple as<br />possible, consume low power and occupy low die-area. Scientific contribution<br />of this dissertation are seven novel IR-UWB pulse generator architectures<br />designed in CMOS technology of which three are fabricated in 0.18 &mu;m UMC<br />CMOS process. The first design is based on combining very short pulses, the<br />next three contain a ring oscillator topology followed by two pulse generators<br />that use the filtering approach, while the last new solution enables BPSK<br />modulation by employing two ring oscillator topologies.</p>