The usage of lead-­free solder joints in electronic packaging is of greatest concern to the electronic industry due to the health and environmental hazards arising with the use of lead. As a consequence, lead is legally prohibited in the European Union and the industry is aiming to produce lead-free products.            The reliability of solder joints is an important issue as the failure could destroy the whole function of a product. SnAgCu is a commonly used alloy for lead-­free solders. Compared to solders containing lead, tin-­rich solders react more rapidly with the copper substrate. The reaction results in formation of brittle intermetallic compounds and in poor mechanical reliability. The formation can be slowed down by the addition of nickel in the under bump metallization.     In this project the objective was to evaluate the mechanical reliability of solder joints in high temperature applications. An alloy of nickel and phosphorus was plated on copper plates by electroless plating. The plates were joined together using SnAgCu solder. The samples were then thermally aged at 180°C for different durations (100, 200, 300, 400 and 500 hours). Tensile tests were performed on the samples. The result from the tensile test showed a decrease in mechanical strength with increasing aging duration. The fracture path shifted from being in the bulk solder to being at the interfaced.

Presently, a critical requirement in electronic assemblies is the reliability of solder joints. Accurate characterization of the mechanical behavior of solder alloys is challenging due to their micro-scale size, microstructural complexity, and complex rate-dependent mechanical behavior. This research presents two mechanical testers designed to acquire accurate mechanical response of the solder alloys. The testers allow using micro-scale test samples that replicate real solder joints in size and soldering pad metallurgy. <div>The first mechanical tester presented in this research is the micro-precision tester. It is capable of monotonic, creep and fatigue test profiles at testing temperatures between 25 and 75◦C. Using a closed-loop control scheme and an external capacitance sensor to minimize measurement of the load train compliance, the tester is capable of precision on the order of 0.1 µm. For load controlled tests, the tester is capable of precision on the order of 0.5 N. The design and construction processes are presented, including rationale for major design choices. Additionally, the development of custom squat-joint samples for use in this tester is presented. These samples allow for increased data reliability while maintaining realistic dimensions. Both validation and test data are presented to demonstrate the capabilities of the micro-precision tester. </div><div>A second mechanical tester, the nano-precision tester, was developed to address the need for increased accuracy as solder geometries shrink. Again, the design choices and limitations are presented, with emphasis on improvements over the micro-precision tester. The load and displacement control are approximately and order of magnitude better than that of the micro-precision tester. Example tests are presented to demonstrate the accuracy and capabilities of the nano-precision tester. </div><div>Finally, the thesis concludes with recommendations on methods to further improve the two testers. Specifically, for the micro-precision tester, thermal expansion during high-temperature testing is a significant concern. For the nano-precision tester, both validation of the tester the capability of multi-temperature testing are future work.<br></div>

The jet printing of solder paste from a uid dynamics perspective involves viscosity change due to varying shear rate and eventual break o of the ejected solder paste droplet from the uid in the printer head. The ability to model the jetting process in a simulation package is important as it can be used as a tool for future development of the jetting device. The jetting process is modelled as a two phase (air - solder paste) ow with interface tracking performed using phase eld method and temporal stepping based on a second-order Backward Di erence Formula with relaxed tolerences. This thesis investigates the droplet morphology, volume and speed predictions for three di erent piston actuation modes and solder paste viscosity denitions given by the Carreau- Yasuda model. A Darcy condition with the porosity parameter is calibrated equal to unity such that the droplet speed is within the realistic range of 20 m/s - 30 m/s. The simulations are compared against previous simulation results from IBOFlow, performed within a collaboration between Mycronic AB and Fraunhofer-Chalmers Centre. As the Carreau models cannot capture the dependence of the uid viscosity of ow history, an indirect structure based viscosity model is used to compare the thixotopic behaviour. The expressions for the parameters of the structure based viscosity model are derived based on an analytical model which assumes that shear rate is constant. Experimental data for constant shear rate is curve tted on a Carreau model and an initial estimate of the parameters are obtained. The parameters are then adjusted to match experimental thixotopic behaviour. This method can be used to obtain parameter values for structure based viscosity models for uids with no previous data. Once the solder paste is ejected through the nozzle and the piston retracts, the uid undergoes stretching. Studying lament stretching during jetting is dicult as it can be driven by both droplet and piston motion. The data from an extensional rheometer is analyzed to study the lament stretching phenomenon for solder pastes. An analytical model for the critical aspect ratio is derived for a Newtonian uid lament undergoing a pure extension and modelled as a cylinder whose radius is decreases with time. The exponential decrease of the lament radius predicted by the analytical model is found to reproduce the experimental observations very well. The lament radius calculated based on the lament height from the experiments and analytical model shows that the model captures the stretching process, but the formation of beads usually seen in suspensions is not accounted for.

This thesis presents the low cost process for UBM formation on aluminum pads of single die/dice for Flip Chip applications. The UBM (Under Bump Metallurgy) is required in solder bump structure to provide adhesion/diffusion barrier layer, solder wettable layer, and oxidation barrier layer between the bonding pads of the die and the bumps. Typically, UBM is deposited on the whole wafers by sputtering, evaporation, or electroless plating. These deposition techniques are not practical for UBM formation on single die/dice, thus preventing Flip Chip technology to be applied in applications where the whole wafers are not available. The process presented in this thesis has been developed to overcome this problem. The developed UBM formation process allows the UBM layer to be deposited on a single die, thus eliminating the requirement to have the whole wafer in the deposition process. With the combination of the UBM formation process developed in this work and a suitable bump formation technique, solder bumping on a single die can be achieved, thus making Flip Chip technology available for use in low volume applications and prototyping stages. The developed UBM formation process consists of two major steps; temporary die attach process and UBM deposition process. The first process is developed using thermoplastic adhesive film. The second process is developed using electroless nickel plating, followed by gold immersion. It has been demonstrated in this thesis that the developed process can be used to form the UBM layer on the die successfully regardless of the die size and the complexity of the die pattern, and that this process does not damage nor affect electrically the sensitive die. / Master of Science

Out-of-plane displacement (warpage) is one of the major thermomechanical reliability concerns for board-level electronic packaging. Printed wiring board (PWB) and component warpage results from CTE mismatch among the materials that make up the PWB assembly (PWBA). Warpage occurring during surface-mount assembly reflow processes and normal operations may cause serious reliability problems. In this research, a convective reflow and projection moire warpage measurement system was developed. The system is the first real-time, non-contact, and full-field measurement system capable of measuring PWB/PWBA/chip package warpage with the projection moire technique during different thermal reflow processes. In order to accurately simulate the reflow process and to achieve the ideal heating rate, a convective heating system was designed and integrated with the projection moire system. An advanced feedback controller was implemented to obtain the optimum heating responses. The developed system has the advantages of simulating different types of reflow processes, and reducing the temperature gradients through the PWBA thickness to ensure that the projection moire system can provide more accurate measurements. Automatic package detection and segmentation algorithms were developed for the projection moire system. The algorithms are used for automatic segmentation of the PWB and assembled packages so that the warpage of the PWB and chip packages can be determined individually. The effect of initial PWB warpage on the fatigue reliability of solder bumps on board assemblies was investigated using finite element modeling (FEM) and the projection moire system. The 3-D models of PWBAs with varying board warpage were used to estimate the solder bump fatigue life for different chip packages mounted on PWBs. The simulation results were validated and correlated with the experimental results obtained using the projection moire system and accelerated thermal cycling tests. Design of experiments and an advanced prediction model were generated to predict solder bump fatigue life based on the initial PWB warpage, package dimensions and locations, and solder bump materials. This study led to a better understanding of the correlation between PWB warpage and solder bump thermomechanical reliability on board assemblies.

Thesis (Ph. D.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

As the world has woken up to the change in climate in recent years, people's environmental concerns are forcing companies to change and find ways to manufacture products without harming nature. One area of serious concern is the electronics industries where an ever-increasing number of products gets updated with sensors and microcomputers to be part of the internet of things. Wen more things are upgraded with electronics, it's important that the production process is as environmentally friendly as possible and that the techniques used introduces a minimum amount of disturbance to the circuits in them.  To tackle this problem, this thesis presents a novel way of manufacturing PCBs without the need for soldering components, a method that increases performance and has substantial environmental benefits. When comparing conventional soldering to the electroless copper plating process presented in this thesis, electroless copper plating uses 67 times less metal and also reduces the parasitic capacitance in the PCB that comes from the solder joints. Utilizing the solder-free method means 67 times less metal needs to be mined, transported, and recycled. Moreover, since lead is a toxic heavy metal that is often part of the solder, decreasing its use in the industry is beneficial for human health and the environment. Nowadays, when the world steadily moves toward products that use technologies like 5G, technologies where higher frequencies are required, their sensitivity to capacitive disturbances from parasitics increases. In this thesis, when comparing the conventional solder method to the non-solder method to attach a capacitor, a significant reduction in phase shift of 0.9° is measured; this change is directly related to the removal of the solder and the parasitic capacitance that comes with it.

The diploma thesis deals with the sphere of solder joints reliability. The narrower focus is use of lead-free solder alloy SAC305 in the production process and parameters of its reliability. The text describes the main factors, which have the influence on the reliability of solder joints under conditions of thermal cycling. These factors also relate with choice of substrates and technological processes of preparation, which are characterized and described. Another part is devoted to estimating the reliability of soldered connections and are listed the fatigue model to estimate reliability. These fatigue models are categorized based on different physical mechanisms that operate in the soldered joints during operation. Based on the comparison of different models is selected the most appropriate model and in conjunction with simulation in ANSYS is estimated reliability. For this purpose is selected soldered connection of the FR-4 substrate and ceramic substrate via SMD component. They are manufactured test kits and subjected to conditions of temperature cycling. Results obtained from experimental measurements are compared with results obtained by simulation and calculation.

Abstract Electronic devices are subjected to various usage environments, wherein stresses are induced to components and their interconnections. The level of stress affects the interval of failure occurrences. When the stress level and aging characteristics of sub-material parts are known, the failure occurrence can be predicted. However, the predictions are based on uncertainties and a practical method to help to assess the component interconnection reliability is needed. In this thesis a novel method to utilize the accelerated stress test data for the hazard rate estimates is introduced. The hazard rate expectations of the interconnection elements are presented as interconnection failures in time (i-FIT) figures that can be used as a part of the conventional product reliability estimates. The method utilizes second level reliability test results for a packaging type specific failure occurrence estimates. Furthermore, the results can be used as such in the component packaging reliability estimates. Moreover, a novel method to estimate the interconnection failures in terms of costs is presented. In this novel method the interconnection elements are dealt as cost elements. It is also shown that the costs of the interconnection failures could be very high, if the stress-strength characteristics of the interconnection system are wrongly chosen. The lead-free manufacturing has emphasized the thermal compatibility of the materials of the component, the solder and the Printed Wiring Board. Improper materials for Area Array components will result as excessive component warping during the reflow, as is shown in this thesis. A novel method for estimating the amount of component warping during the lead-free reflow is introduced. In this thesis, a method to predict the second level interconnection hazard rate is introduced. The method utilizes the second level reliability test data in the life time predictions of the component solder joints. The resulted hazard rates can be used as a part of product field performance estimates. Also, the effect of the process variation and the material properties on the lead-free solder joint reliability is introduced. / Tiivistelmä Elektronisen laitteen materiaalien yhteensopivuus ja käyttöympäristö määrittävät sen kokemat rasitukset. Laitteen komponentteihin tai niiden liitoksiin kohdistuvat rasitukset aiheuttavat lopulta laitteen vikaantumisen. Vikaantumisten taajuuteen vaikuttavat paitsi rasituksen taso ja tyyppi, myös laitteen materiaalien ominaisuudet. Todellinen vikaantumistaajuus perustuu kuitenkin muihinkin parametreihin, mistä johtuen vikaantumisennusteet voivat olla epätarkkoja. Tästä syystä käytännölliselle liitosten vikaantumisen arviointimenetelmälle on tarve. Tässä väitöskirjassa esitellään uusi komponenttien juotosliitosten arviointimenetelmä, jonka avulla voidaan muuntaa kiihdytetyn rasitustestauksen tulos vikaantumistaajuusarvioksi laitteen todellisessa käyttöympäristössä. Menelmässä hyödynnetään levytason rasitustestauksen tuloksia komponenttien kotelotyyppikohtaisiin vikaantumisennusteisiin. Menetelmää voidaan käyttää sellaisenaan arvioitaessa komponenttikoteloiden luotettavuutta todellisissa rasitus- tai tuoteympäristöissä. Väitöskirjassa esitellään myös uusi menetelmä vikaantuneiden liitosten kustannusten määrittämiseen, mikä auttaa myös uuden liitosteknologian kokonaiskustannusten arvioimisessa. Lisäksi väitöskirjatyössä osoitetaan, että liitosvikojen aiheuttamat kustannukset voivat olla erittäin korkeita, mikäli juotosliitoksiin kohdistuvat rasitukset ylittävät liitosten suunnitellun kestävyyden. Elektroniikan lyijyttömän valmistamisen myötä komponenttien, juotteen ja piirilevyn materiaalien yhteensopivuus korostuu. Väitöskirjatyössä osoitetaan, että yhteensopimattomien materiaalien käyttäminen komponenteissa voi johtaa komponentin liialliseen taipumaan kuumakonvektiojuottamisen aikana. Lisäksi esitellään menetelmä komponentin taipuman arvioimiseksi lämpötilan funktiona. Tässä väitöskirjassa esitellään uusi menetelmä, jolla voidaan arvioida komponenttien juotosliitosten vikaantumista ja vikaantumisen vaikutusta tuotteiden kokonaiskustannuksiin. Menetelmä perustuu kiihdytetyn rasitustestauksen tuloksiin, joita voidaan käyttää juotosliitosten vikaantumisten arvioimiseen tuotteen todellisissa käyttöolosuhteissa. Lisäksi väitöskirjatyössä on arvioitu juotosmateriaalin ja juotosaluemitoituksen vaikutusta juotosliitosten luotettavuuteen.

The doctoral thesis is focused on reliability of lead-free solder SAC 305. Knowledge in the field of fatigue models used in determining the lifetime of solder joints are observed in this thesis. Also such methods of predicting reliability as numerically-analytical methods or reliability experimental tests are mentioned. Practical results of reliability measurement are presented. Experimental data served as the foundation for determining empirical coefficients for the fatigue model based on deformation induced by creep of the solder, which was implemented in the ANSYS environment. Results from different methods were compared and conclusions discussing the suitability of the presented prediction methods are formulated.