Translinear circuits are circuits in which the exponential relationship between the output current and input voltage of a circuit element is exploited to realize various algebraic or differential equations. This thesis is concerned with a subclass of translinear circuits, in which the basic translinear element, called a multiple-input translinear element (MITE), has an output current that is exponentially related to a weighted sum of its input voltages. MITE networks can be used for the implementation of the same class of functions as traditional translinear circuits. The implementation of algebraic or (algebraic) differential equations using MITEs can be reduced to the implementation of the product-of-power-law (POPL) relationships, in which an output is given by the product of inputs raised to different powers. Hence, the synthesis of POPL relationships, and their optimization with respect to the relevant cost functions, is very important in the theory of MITE networks. In this thesis, different constraints on the topology of POPL networks that result in desirable system behavior are explored and different methods of synthesis, subject to these constraints, are developed. The constraints are usually conditions on certain matrices of the network, which characterize the weights in the relevant MITEs. Some of these constraints are related to the uniqueness of the operating point of the network and the stability of the network. Conditions that satisfy these constraints are developed in this work. The cost functions to be minimized are the number of MITEs and the number of input gates in each MITE. A complete solution to POPL network synthesis is presented here that minimizes the number of MITEs first and then minimizes the number of input gates to each MITE. A procedure for synthesizing POPL relationships optimally when the number of gates is minimal, i.e., 2, has also been developed here for the single--output case. A MITE structure that produces the maximum number of functions with minimal reconfigurability is developed for use in MITE field--programmable analog arrays. The extension of these constraints to the synthesis of linear filters is also explored, the constraint here being that the filter network should have a unique operating point in the presence of nonidealities. Synthesis examples presented here include nonlinear functions like the arctangent and the gaussian function which find application in analog implementations of particle filters. Synthesis of dynamical systems is presented here using the examples of a Lorenz system and a sinusoidal oscillator. The procedures developed here provide a structured way to automate the synthesis of nonlinear algebraic functions and differential equations using MITEs.

Software components expose Application Programming Interfaces (APIs) as a means to access their functionality, and facilitate reuse. Developers use APIs supplied by programming languages to access the core data structures and algorithms that are part of the language framework. They use the APIs of third-party libraries for specialized tasks. Thus, APIs play a central role in mediating a developer's interaction with software, and the interaction between different software components. However, APIs are often large, complex and hard to navigate. They may have hundreds of classes and methods, with incomplete or obsolete documentation. They may encapsulate concurrency behaviour that the developer is unaware of. Finding the right functionality in a large API, using APIs correctly, and maintaining software that uses a constantly evolving API are challenges that every developer runs into. In this thesis, we design automated techniques to address two problems pertaining to APIs (1) Concurrency analysis of APIs, and (2) API mining. Speci cally, we consider the concurrency analysis of asynchronous APIs, and mining of math APIs to infer the functional behaviour of API methods. The problem of concurrency bugs such as race conditions and deadlocks has been well studied for multi-threaded programs. However, developers have been eschewing a pure multi-threaded programming model in favour of asynchronous programming models supported by asynchronous APIs. Asynchronous programs and multi-threaded programs have different semantics, due to which existing techniques to analyze the latter cannot detect bugs present in programs that use asynchronous APIs. This thesis addresses the problem of concurrency analysis of programs that use asynchronous APIs in an end-to-end fashion. We give operational semantics for important classes of asynchronous and event-driven systems. The semantics are designed by carefully studying real software and serve to clarify subtleties in scheduling. We use the semantics to inform the design of novel algorithms to find races and deadlocks. We implement the algorithms in tools, and show their effectiveness by finding serious bugs in popular open-source software. To begin with, we consider APIs for asynchronous event-driven systems supporting pro-grammatic event loops. Here, event handlers can spin event loops programmatically in addition to the runtime's default event loop. This concurrency idiom is supported by important classes of APIs including GUI, web browser, and OS APIs. Programs that use these APIs are prone to interference between a handler that is spinning an event loop and another handler that runs inside the loop. We present the first happens-before based race detection technique for such programs. Next, we consider the asynchronous programming model of modern languages like C]. In spite of providing primitives for the disciplined use of asynchrony, C] programs can deadlock because of incorrect use of blocking APIs along with non-blocking (asynchronous) APIs. We present the rst deadlock detection technique for asynchronous C] programs. We formulate necessary conditions for deadlock using a novel program representation that represents procedures and continuations, control ow between them and the threads on which they may be scheduled. We design a static analysis to construct the pro-gram representation and use it to identify deadlocks. Our ideas have resulted in research tools with practical impact. Sparse Racer, our tool to detect races, found 13 previously unknown use-after-free bugs in KDE Linux applications. Dead Wait, our deadlock detector, found 43 previously unknown deadlocks in asynchronous C] libraries. Developers have fixed 43 of these races and deadlocks, indicating that our techniques are useful in practice to detect bugs that developers consider worth fixing. Using large APIs effectively entails finding the right functionality and calling the methods that implement it correctly, possibly composing many API elements. Automatically infer-ring the information required to do this is a challenge that has attracted the attention of the research community. In response, the community has introduced many techniques to mine APIs and produce information ranging from usage examples and patterns, to protocols governing the API method calling sequences. We show how to mine unit tests to match API methods to their functional behaviour, for the specific but important class of math APIs. Math APIs are at the heart of many application domains ranging from machine learning to scientific computations, and are supplied by many competing libraries. In contrast to obtaining usage examples or identifying correct call sequences, the challenge in this domain is to infer API methods required to perform a particular mathematical computation, and to compose them correctly. We let developers specify mathematical computations naturally, as a math expression in the notation of interpreted languages (such as Matlab). Our unit test mining technique maps subexpressions to math API methods such that the method's functional behaviour matches the subexpression's executable semantics, as defined by the interpreter. We apply our technique, called MathFinder, to math API discovery and migration, and validate it in a user study. Developers who used MathFinder nished their programming tasks twice as fast as their counterparts who used the usual techniques like web and code search, and IDE code completion. We also demonstrate the use of MathFinder to assist in the migration of Weka, a popular machine learning library, to a different linear algebra library.

Dans le cadre de la géométrie riemannienne globale sans hypothèse de courbure en lien avec la topologie, nous nous intéressons au volume maximal des boules de rayon fixé dans les revêtements universels des graphes et des surfaces. Dans la première partie, nous prouvons que si l’aire d’une surface riemannienne fermée M de genre g ≥ 2 est suffisamment petite par rapport à son aire hyperbolique, alors pour chaque rayon R ≥ 0, le revêtement universel de M contient une R-boule d’aire au moins l’aire d’une cR-boule dans le plan hyperbolique, où c ∈ (0; 1) est une constante universelle. En particulier (quitte à prendre l’aire de la surface encore plus petite), nous démontrons que pour chaque rayon R ≥ 1, le revêtement universel de M contient une R-boule d’aire au moins l’aire d’une R-boule dans le plan hyperbolique. Ce résultat répond positivement pour les surfaces, à une question de L. Guth. Nous démontrons également que si Γ est un graphe connexe de premier nombre de Betti b ≥ 2 et de longueur suffisamment petite par rapport à la longueur d’un graphe trivalent Γb de premier nombre de Betti b dont la longueur de chaque arête est 1, alors pour chaque rayon R ≥ 0, le revêtement universel de Γ contient une R-boule d’aire au moins c fois l’aire d’une R-boule dans le revêtement universel de Γb, où c ∈ ( ½ ; 1). / This thesis deals with global Riemannian geometry without curvature assumptions and its link to topology, we focus on the maximal volume of balls of fixed radius in the universal covers of graphs and surfaces. In the first part, we prove that if the area of a closed Riemannian surface M of genus at least two is sufficiently small with respect to its hyperbolic area, then for every radius R ≥ 0 the universal cover of M contains an R-ball with area at least the area of a cR-ball in the hyperbolic plane, where c ∈ (0; 1) is a universal positive constant. In particular (taking the area of M smaller if needed), we prove that for every radius R ≥ 1, the universal cover of M contains an R-ball with area at least the area of a ball with the same radius in the hyperbolic plane. This result answers positively a question of L. Guth for surfaces. We also prove an analog result for graphs. Specifically, we prove that if Γ is a connected metric graph of first Betti number b ≥ 2 and of length sufficiently small with respect to the length of a connected trivalent graph Γb of the same Betti number where the length of each edge is 1, then for every radius R ≥ 0 the universal cover of Γ contains an R-ball with length at least c times the length of an R-ball in the universal cover of Γb, where c ∈ ( ½ ; 1) is a universal constant.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES / Parallel architectures has been ubiquitous for some time now. However, the word ubiquitous can’t be applied to parallel programs, because there is a greater complexity to code them comparing to ordinary programs. This fact is aggravated when the programming also involves accelerators, like GPUs, which demand the use of tools with scpecific resources. Considering this setting, there are programming models that make easier the codification of parallel applications to explore accelerators, nevertheless, we don’t know APIs that allow implementing programs with parallel loops that can be processed simultaneously by multiple CPUs and multiple GPUs. This works presents a high-level C++ API called HPSM aiming to make easier and more efficient the codification of parallel programs intended to explore multi-CPU and multi-GPU architectures. Following this idea, the desire is to improve performance through the sum of resources. HPSM uses parallel loops and reductions implemented by three parallel back-ends, being Serial, OpenMP and StarPU. Our hypothesis estimates that scientific applications can explore heterogeneous processing in multi-CPU and multi-GPU to achieve a better performance than exploring just accelerators. Comparisons with other parallel programming interfaces demonstrated that HPSM can reduce a multi-CPU and multi-GPU code in more than 50%. The use of the new API can introduce impact to program performance, where experiments showed a variable overhead for each application, that can achieve a maximum value of 16,4%. The experimental results confirmed the hypothesis, because the N-Body, Hotspot e CFD applications achieved gains using just CPUs and just GPUs, as well as overcame the performance achieved by just accelerators (GPUs) through the combination of multi-CPU and multi-GPU. / Arquiteturas paralelas são consideradas ubíquas atualmente. No entanto, o mesmo termo não pode ser aplicado aos programas paralelos, pois existe uma complexidade maior para codificálos em relação aos programas convencionais. Este fato é agravado quando a programação envolve também aceleradores, como GPUs, que demandam o uso de ferramentas com recursos muito específicos. Neste cenário, apesar de existirem modelos de programação que facilitam a codificação de aplicações paralelas para explorar aceleradores, desconhece-se a existência de APIs que permitam a construção de programas com laços paralelos que possam ser processados simultaneamente em múltiplas CPUs e múltiplas GPUs. Este trabalho apresenta uma API C++ de alto nível, denominada HPSM, visando facilitar e tornar mais eficiente a codificação de programas paralelos voltados a explorar arquiteturas com multi-CPU e multi-GPU. Seguindo esta ideia, deseja-se ganhar desempenho através da soma dos recursos. A HPSM é baseada em laços e reduções paralelas implementadas por meio de três diferentes back-ends paralelos, sendo Serial, OpenMP e StarPU. A hipótese deste estudo é que aplicações científicas podem valer-se do processamento heterogêneo em multi-CPU e multi-GPU para alcançar um desempenho superior em relação ao uso de apenas aceleradores. Comparações com outras interfaces de programação paralela demonstraram que o uso da HPSM pode reduzir em mais de 50% o tamanho de um programa multi-CPU e multi-GPU. O uso da nova API pode trazer impacto no desempenho do programa, sendo que experimentos demonstraram que seu sobrecusto é variável de acordo com a aplicação, chegando até 16,4%. Os resultados experimentais confirmaram a hipótese, pois as aplicações N-Body, Hotspot e CFD, além de alcançarem ganhos ao utilizar somente CPUs e somente GPUs, também superaram o desempenho obtido por somente aceleradores (GPUs) através da combinação de multi-CPU e multi-GPU.

Made available in DSpace on 2014-12-17T14:56:19Z (GMT). No. of bitstreams: 1 JanEMGP_DISSERT.pdf: 3028317 bytes, checksum: 5eeb8ec6954b59f2853f263ffa4c4d9c (MD5) Previous issue date: 2014-05-16 / Conselho Nacional de Desenvolvimento Cient?fico e Tecnol?gico / The area of research and development involving the PID tune of controllers is an active area in the academic and industrial sectors yet. All this due to the wide use of PID controllers in the industry (96% of all controllers in the industry is still PID). Controllers well tuned and tools to monitor their performance over time with the possibility of selftuning, become an item almost obligatory to maintain processes with high productivity and low cost. In a globalized world, it is essential for their self survival. Although there are several new tools and techniques that make PID tune, in this paper will explore the PID tune using the relay method, due its good acceptance in the industrial environment. In addition, we will discuss some techniques for evaluation of control loops, as IAE, ISE, Goodhart, the variation of the control signal and index Harris, which are necessary to propose new tuning for control loops that have a low performance. Will be proposed in this paper a tool for tuning and self tuning PID. Will be proposed in this paper a PID auto-tuning software using a relay method. In particular, will be highlighted the relay method with hysteresis. This method has shown tunings with satisfactory performance when applied to the didactic, simulated and real plants / O campo de pesquisa e desenvolvimento de softwares envolvendo a sintonia de controladores PID, ainda ? uma ?rea ativa dentro do meio acad?mico e industrial. Tudo isso devido ? larga utiliza??o de controladores PID na ind?stria (96% de todos os controladores na ind?stria ainda ? PID). Ter controladores bem sintonizados e com ferramentas que possam acompanhar seus desempenhos ao longo do tempo com a possibilidade de ressintoniz?-los, ou ainda autossintoniz?-los, passar a ser um item quase que obrigat?rio para manter processos com alta produtividade e baixo custo. J? que em um mundo globalizado, o n?vel mais acirrado de concorr?ncia entre as empresas, atualmente, est? no custeio e na produtividade. Apesar de existirem diversas novas t?cnicas e ferramentas que fazem sintonia de controladores PID, neste trabalho ser? explorada esta sintonia utilizando o m?todo do rel?, devido a sua boa aceita??o no ambiente industrial, simplicidade e robustez. Al?m disto, abordaremos algumas t?cnicas para avalia??o de desempenho de malhas de controle de processos, tais como IAE, ISE, Goodhart, Vari?ncia de sinais e ?ndice de Harris. Ser? proposta neste trabalho uma ferramenta de sintonia e autossintonia PID (usando o m?todo do rel?), em especial o m?todo do rel? com histerese. Este m?todo tem apresentado sintonias com desempenhos satisfat?rios quando aplicados em plantas simuladas e reais

Inicialmente, apresentam-se características de dispositivos eletrônicos conhecidos como PLLs (phase-locked loops). PLLs são amplamente empregados para se extrair sinais de tempo em canais de comunicação e em aplicações nas quais se deseja controle automático de freqüência. O objeto principal é estudar PLLs analógicos descritos por uma equação diferencial ordinária de terceira ordem. Assim, deduzem-se condições de estabilidade assintótica e identifica-se um regime de caos conservativo, que ocorre sob certas combinações de valores de parâmetros. Três métodos de controle não-linear/caótico são então apresentados e aplicados. Os métodos são os seguintes: o Método de Pyragas via realimentação de variável de estado; o Método de Pyragas com atraso temporal na realimentação; e o Método de Sinha, o qual efetua o controle perturbando um parâmetro do sistema. Simulações numéricas são levadas a cabo a fim de ilustrar o comportamento dinâmico do sistema quando sujeito à ação desses métodos. Este trabalho termina com um estudo de uma rede formada por uma cadeia de PLLs. Condições para soluções síncronas, periódicas e caóticas (dissipativas e conservativas) são deduzidas para tal rede. / Firstly, features of electronic devices known as PLLs (Phase-Locked Loops) are presented. PLLs are widely employed to extract time signals in communication channels and in applications where automatic control of frequency is desired. The main goal is to study analog PLLs described by a third-order nonlinear ordinary differential equation. Thus, conditions for asymptotic stability are derived and a regime of conservative chaos occurring under certain combinations of parameter values is identified. Then, three methods of control of nonlinear/ chaotic dynamics are presented and applied. The methods are the following: the Pyragas method via feedback of state variable; the Pyragas method with time delay in the feedback; and the Sinhas method, which performs the control by disturbing a parameter of the system. Numerical simulations are accomplished in order to illustrate the dynamical behavior of the system when subjected to the action of these methods. This work ends with a study of a single-chain PLL network. Conditions for synchronous, periodic and chaotic (dissipative and conservative) solutions are derived for such a network.

Neste trabalho, são estudados os problemas de sincronismo de fase nas redes mestre-escravo de via única (OWMS), nas topologias Estrela Simples, Cadeia Simples e mista, através da Teoria Qualitativa de Equações Diferenciais, com ênfase no Teorema da Variedade Central. Através da Teoria das Bifurcações, analisa-se o comportamento dinâmico das malhas de sincronismo de fase (PLL) de segunda ordem que compõem cada rede, frente às variações nos seus parâmetros constitutivos. São utilizadas duas funções de excitação muito comuns na prática: o degrau e a rampa de fase, aplicadas pelo nó mestre. Em cada caso, discute-se a existência e a estabilidade do estado síncrono. A existência de pontos de equilíbrio não-hiperbólicos, não permite uma aproximação linear, e nesses casos é aplicado o Teorema da Variedade Central. Através dessa rigorosa técnica de simplificação de sistemas dinâmicos é possível fazer uma aproximação homeomórfica em torno desses pontos, preservando a orientação no espaço de fases. Desse modo, é possível determinar, localmente, suas estabilidades. / This work presents stability analysis of the syncronous state for three types of one-way master-slave time distribution network topologies: single star, single chain and both of them, mixed. Using bifurcation theory, the dynamical behavior of second-order phase-locked loops employed to extract the syncronous state in each node is analyzed in function of the constitutive parameters. Two usual inputs, the step and the ramp phase pertubations, are supposed to appear in the master node and, in each case, the existence and stability of the syncronous state are studied. For parameter combinations resulting in non hyperbolic synchronous states, the linear approximation does not provide any information, even about the local behaviour of the system. In this case, the center manifold theorem permits the construction of an equivalent vector field representing the asymptotic behaviour of the original system in the neighborhood of these points. Thus, the local stability can be determined.

Orientador: Jose Antonio Siqueira Dias / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-06T12:42:34Z (GMT). No. of bitstreams: 1 Oliveira_AlexVenanciode_M.pdf: 3915758 bytes, checksum: 2659008da021c19c0fea44959159f885 (MD5) Previous issue date: 2006 / Resumo: O presente trabalho tem por objetivo o projeto, desenvolvimento e montagem de um Condicionador de Sinais de baixo custo, versátil e com recursos básicos comparáveis aos equipamentos semelhantes existentes no mercado nacional, que são na sua grande maioria importados. O equipamento faz a conversão, filtragem, isolação e condicionamento de pequenos sinais de controle provenientes de diversos tipos de sensores e transdutores, comuns em ambiente industrial, utilizando uma tecnologia bem consolidada de transporte de sinais em malhas de controle industriais: o transporte no modo corrente de 4-20mA. Esta tecnologia, mesmo frente à novos desenvolvimentos digitais na área de controle e transmissão de sinais em ambiente industrial, resiste como alternativa econômica e de ótimos resultados, mesmo em ambientes extremamente agressivos, com altos níveis de interferência / Abstract: In this work it is presented the design, development and implementation of a low cost and versatile signal conditioner which is similar to the products available in the Brazilian market, most of them imported. The developed equipment performs the conversion, filtering, isolation and conditioning of small control signals from various types of sensors and transducers commonly used in industrial environments, by using a mature technology of signal transport in industrial control loops: current mode of 4-20mA. This technology, despite of new digital developments in the area of control and signal transmission in industrial environments, resists as an economic alternative with excellent results, especially in extremely aggressive environments with high levels of interference / Mestrado / Eletrônica, Microeletrônica e Optoeletrônica / Mestre em Engenharia Elétrica

Made available in DSpace on 2016-03-15T19:38:09Z (GMT). No. of bitstreams: 1 Marcos Kleber Soares Kunyosi.pdf: 2418852 bytes, checksum: ab6795f8d39445430da1eca23e865c56 (MD5) Previous issue date: 2006-09-11 / Instituto Presbiteriano Mackenzie / Recognition of patterns can be performed by using neural networks built with oscillators, like phase-locked loops (PLLs). These networks are modeled with differential equation systems and can be studied by using Dynamical System Theory, which is used in this work in order to investigate the dynamical behavior related to a synaptic configuration of a neural network. As a result of such an investigation, two methods (Brute Force and Algebric) that help to build neural networks formed by PLLs are presented. These methods aim to relate the synaptic configuration of the network to the corresponding basin of attraction of fixed points, which represent the stored patterns on the network. Also general properties of synaptic configuration are presented in order to generate other useful configurations. Then a model of an image recognition machine able to store in its memory a monochromatic image and able to determine if other image is similar to the memorized one is proposed. / Reconhecimento de padrões pode ser feito usando redes neurais construídas com osciladores, como malhas de sincronismo de fase (PLLs). Essas redes são modeladas por sistemas de equações diferenciais e podem ser estudas pela Teoria de Sistemas Dinâmicos, que é usada neste trabalho para investigar o comportamento dinâmico associado a uma configuração sináptica de uma rede neural. Como resultado dessa investigação, são apresentados dois métodos (Força Bruta e Algébrico) que auxiliam na construção de redes neurais formadas por PLLs. Esses métodos têm como objetivo relacionar a configuração sináptica da rede às respectivas bacias de atração de pontos atratores, os quais representam os padrões memorizados na rede. Também são apresentadas propriedades gerais da configuração sináptica que podem ser usadas para compor outras configurações de interesse. Por fim, é proposto um modelo de máquina reconhecedora de imagem capaz de armazenar em sua memória uma figura monocromática e determinar se uma imagem qualquer apresentada a ela é semelhante à memorizada.

No tratamento das maloclusões muitas vezes se impõe a necessidade de extrações dentárias para cumprir as metas do tratamento ortodôntico em busca da oclusão normal. Um dos recursos para o fechamento de espaços após exodontias é a utilização de arcos de retração com alças. Atualmente existe, no mercado, uma grande disponibilidade de arcos pré-fabricados, fornecidos por diversos fabricantes, que apresentam variações na forma e número de alças, espessura dos fios e ligas metálicas diferentes. O conhecimento das propriedades mecânicas e das forças liberadas por estes arcos é de extrema importância para que se obtenha uma resposta biológica adequada durante a movimentação dentária. O presente estudo procurou avaliar, experimentalmente, as forças liberadas por alguns tipos mais utilizados de arcos com alças produzidos com fios de secção retangular com variações de geometria (espessura, número e forma das alças), liga metálica e fabricante, impondo-lhes diferentes ativações. Buscou-se ainda determinar a quantidade de ativação onde ocorre o limite de proporcionalidade e, finalmente, fazer comparações entre os arcos com o intuito de fornecer ao ortodontista subsídios para a escolha do arco adequado. Para tal foram utilizados 19 tipos diferentes de arcos submetidos a testes de tração. Foram registradas as forças continuamente até uma deformação das alças de 4 mm. As comparações foram realizadas por meio de testes estatísticos isolando-se apenas uma característica de variação permitindo uma melhor compreensão do fator preponderante na alteração da força. Os resultados revelaram variações importantes nas forças a cada 0,5 mm de ativação, sendo de forma geral, ativações de 0,5 e 1,0 mm as que liberam forças mais adequadas. Os limites de proporcionalidade ocorreram na sua maioria acima de 1,5 mm de ativação até 2,5 mm, podendo em arcos mais flexíveis ocorrer acima de 4,0 mm. As comparações estatísticas demonstraram diferenças significativas entre todos os grupos avaliados, revelando que todas as variações (geometria, espessura, material e fabricante) exercem influência sobre a força gerada, sendo que a liga metálica parece ser preponderante. / In malocclusion treatments, dental extractions become necessary, in some cases, in order to achieve orthodontic goals of normal occlusion. One of the devices employed to close spaces after dental extraction is the use of retraction arches with loops. Nowadays, there is a wide range of pre-manufactured arches in the market, which present variations in shape, number of loops, thickness of the wire and metallic alloys. It is extremely important to understand mechanical properties as well as the forces delivered by these arches in order to achieve proper biological response during tooth movement. The present study tried to evaluate, experimentally, forces delivered by some of the most frequently employed arches made of rectangular wires with different geometrical characteristics (thickness, number and shape of loops), metallic alloys and made by different manufacturers, when submitted to different levels of activation. It was tried to determine the activation level at proportional limit and compare these values for different arches, in order to provide the orthodontists with accurate data which may help them to choose the proper arches. Nineteen different types of arches were submitted to tension tests. Forces were continuously measured up to 4 mm level of loop deformation. Statistical tests were employed to make comparisons, with only one type of variation for each test, which allowed a better comprehension of the main factor in force change. Results revealed important variations in forces at 0.5 mm intervals, and generally, 0.5 mm and 1.0 mm levels of activation delivered the most proper forces. Proportional limit occurred, mostly, over 1.5 mm and up to 2.5 mm levels of activation, except for more flexible arches, when it occurred above 4.0 mm. Statistical comparisons showed significant differences between all groups studied, demonstrating that all variations (geometry, thickness, material and manufacturer) can influence the delivered force. In spite of this, metallic alloys seemed to be the most important factor determining force deliverance variation.