The design, simulation, and measurement of two bulk-driven down-conversion mixers with on-chip transformer baluns in 0.18 μm CMOS is presented. Applying either the RF signal or the local oscillator (LO) signal to the bulk connection of the transistors allows the amplification and switching stages of a conventional mixer to be combined into a single stage, thus improving the voltage headroom of the mixer. The addition of a transformer balun to the mixers improves the input impedance match, provides passive voltage gain, and performs single-ended to balanced conversion. A semi-analytical power-series analysis of the mixers is also presented. The mixer in which the RF signal is applied to the gates of the mixing transistors achieves a measured input-referred 1-dB compression point (P1dB) of −14 dBm, an input-referred third-order intercept point (IIP3) of −5.2 dBm, a gain of 13.6 dB, a noise figure (NF) of 26 dB, and an LO-to-RF isolation of 50 dB. The overall performance of both mixers is found to be comparable with other CMOS mixers, but with a higher noise figure (which can be mitigated with a high gain low-noise amplifier (LNA)).

In this thesis three circuits are presented that demonstrate the creation and manipulation of various phases over a large bandwidth. Many systems demand the interoperability of various circuit blocks over a large frequency range in order to minimize costs. In addition, the use of low resistivity silicon facilitates a further reduction in costs. The circuits presented in this thesis demonstrate both these key concepts by using the conventional CMOS process in addition to operating over large bandwidths which is ideal for inclusion in any number of standard wireless systems. A new novel balun is proposed that achieves wideband performance through the use of an external compensating capacitor to counter the effects of parasitic capacitances that reduce its effective bandwidth. An input stage common gate amplifier is then used to improve the return loss and provide additional gain. The fabricated active balun using the proposed circuit shows that the device performs with a 7.5 GHz bandwidth. In addition an excellent 16 dB return loss, -5.8 dBm compression point and 12 mW power consumption are also reported. Following this, an inductorless quadrature oscillator is proposed using an artificial resonator composed of conventional OTA circuits in order to increase the tuning range. The measured tuning range was found to be 100 MHz. This circuit demonstrates the ability to use a synthetic resonator circuit as a method of achieving wide tuning. The measured phase noise of -97.7 dBc/Hz is on par with other inductorless oscillators found in literature. Finally a wideband feedback quadrature generator is presented. Existing circuits do not provide a wide frequency of operation and in addition are highly susceptible to variances in component values used. The result is that the fabricated system will not operate at its intended operating frequency. In order to mitigate this problem a RC-CR network was used in conjunction with two variable gain amplifiers that uses a feedback network to actively compensate the amplitude imbalance over a large frequency range. This new design first is of its kind and the resulting circuit is measured to have over a 4 GHz bandwidth while maintaining a +/- 1 dB amplitude balance. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2008-03-28 16:06:33.014

The proposed research objective is to develop, test, and evaluate a mixer and charger-supply CMOS IC that derives and mixes energy and power from mixed sources to accurately supply a miniaturized system. Since the energy-dense source stores more energy than the power-dense source while the latter supplies more power than the former, the proposed research aims to develop an IC that automatically selects how much and from which source to draw power to maximize lifetime per unit volume. Today, the state of the art lacks the intelligence and capability to select the most appropriate source from which to extract power to supply the time-varying needs of a small system. As such, the underlying objective and benefit of this research is to reduce the size of a complete electronic system so that wireless sensors and biomedical implants, for example, as a whole, perform well, operate for extended periods, and integrate into tiny spaces.

Scanning probe microscopy (SPM) tip-based nanofabrication (TBN) is a technique that directly creates a variety of nanostructures on a substrate using the nanoscale probe tips. SPM TBN possesses superior resolution and flexibility: nanostructures with feature size under 5 nm have been achieved via SPM TBN, which is beyond what the state-of-the art optical-based lithography technique can provide. However, the inherent serial nature of SPM TBN makes it a low throughput process. Multi-probe SPM systems have therefore been developed to increase the nanofabrication efficiency. Atomic force microscopy (AFM) and scanning tunneling microscopy (STM) are two most commonly used SPM TBN techniques. Most of prior work has focused on contact-mode AFM-based TBN. This work, using CMOS MEMS technology as the design and fabrication platform, develops an active conductive probe array that aims to perform parallel surface imaging and nanofabrication in non-contact STM mode. The CMOS-MEMS process provides a monolithic integration of MEMS devices with CMOS electronics that can facilitate future automation and parallel probe operation. The CMOS-MEMS probe adopts a micro-cantilever structure and applies bimorph electrothermal actuation to control the vertical displacement of the probe tips. The cantilever is designed to be stiff, with a spring constant of 36 N/m that is larger than the force gradient of the cantilever tip-sample interaction forces in the working distance regime of STM in order to avoid the tip-to-sample “snap-in” and ensure the stability of the STM feedback system. A modified Spindt tip process, compatible with post-CMOS MEMS processing, is developed to batch fabricate Ni/Pt composite tips on CMOS-MEMS probe arrays that are used as STM end-effectors. The integrated Ni/Pt tips on the MEMS probes have a tip radius down to 50 vii nm. The Spindt tip demonstrates the capability of both imaging and nanowire fabrication in STM mode. A hierarchical dual-servo STM system is constructed for the parallel STM imaging using two CMOS-MEMS probes. The system consists of a piezoelectric actuator-driven servo and an electrothermal actuator-driven servo to control the vertical displacement of two probe tips and maintain a constant current between the tips and the sample. Both servos use a proportionalintegral controller. The dual-servo STM system is capable of parallel STM image acquisition using CMOS MEMS probe arrays. An on-chip electrothermal proximity sensor pair and probes with embedded microgoniometers are designed to assist the alignment between the CMOS-MEMS probe array and the examined sample surface. The electrothermal proximity sensor pair is used to measure the separation and the non-parallelism between the probe chip and the sample. The electrothermal proximity sensor has a positioning accuracy of around 1 μm. An electrothermal microgoniometer platform is developed to hold a one-dimensional array of active CMOS-MEMS probes and serves to provide the in situ fine adjustment of relative height among these probes. The micro-goniometer has a maximum tilt of 1.2°, which is sufficient to compensate the probe chip-sample misalignment and the possible height difference among array probes introduced by process variations.

The objective of this work was to integrate an optical receiver in a modern standard technology in a form amenable to multiple lanes. To accomplish this goal, a photodiode was integrated with the receiver in a standard 90nm CMOS process and the nominal process voltage of 1.2V was not exceeded. Two optical lanes were integrated on chip with a pitch compatible with existing industry photodiode arrays. This work uses a non-SML photodiode to increase optical responsivity to 0.141A/W, almost 3 times higher than values typically reported for SML photodiodes. This receiver is the first integrated optical receiver reported in a standard CMOS technology with a feature size smaller than 0.13μm, which is necessary for the eventual integration of optical receivers with modern digital processing blocks on a single die. The traditional analog equalizer used in most integrated optical receivers is replaced with a high-pass filter and hysteresis latch for equalization. The receiver occupies a core area of 0.197mm2 and has an optical sensitivity of -3.7dBm at a 2Gbps data rate, while consuming 46.3mW.

The objective of this work was to integrate an optical receiver in a modern standard technology in a form amenable to multiple lanes. To accomplish this goal, a photodiode was integrated with the receiver in a standard 90nm CMOS process and the nominal process voltage of 1.2V was not exceeded. Two optical lanes were integrated on chip with a pitch compatible with existing industry photodiode arrays. This work uses a non-SML photodiode to increase optical responsivity to 0.141A/W, almost 3 times higher than values typically reported for SML photodiodes. This receiver is the first integrated optical receiver reported in a standard CMOS technology with a feature size smaller than 0.13μm, which is necessary for the eventual integration of optical receivers with modern digital processing blocks on a single die. The traditional analog equalizer used in most integrated optical receivers is replaced with a high-pass filter and hysteresis latch for equalization. The receiver occupies a core area of 0.197mm2 and has an optical sensitivity of -3.7dBm at a 2Gbps data rate, while consuming 46.3mW.

X-ray imaging has become one of the most pervasive and effective means of diagnosis in medical clinics today. As more imaging systems transition to digital modes of capture and storage, new applications of x-ray imaging, such as tomosynthesis, become feasible. These new imaging modalities have the potential to expose patients to large amounts of radiation so the necessity to use sensitive imagers that reduce dose and increase contrast is essential. An experimental design that utilizes laterally oriented detectors and amorphous semiconductors on crystalline silicon substrates has been undertaken in this study. Emphasis on fabricating a device suitable for medical x-ray imaging is the key principle throughout the design process. This study investigates the feasibility and efficiency of a new type of x-ray imager that combines the high speed, low noise, and potential complexity of CMOS circuit design with the high responsivity, large area uniformity, and flexibility of amorphous semiconductors. Results show that the design tradeoffs made in order to create a low cost, high fill factor, and high speed imager are realistic. The device exhibits good responsively to optical light, possesses a sufficient capacitive well, and maintains CMOS characteristics. This study demonstrates that with sufficient optimization it may be possible to design and deploy real time x-ray system on chip imagers similar to those used in optical imaging.

The design, simulation, and measurement of two bulk-driven down-conversion mixers with on-chip transformer baluns in 0.18 μm CMOS is presented. Applying either the RF signal or the local oscillator (LO) signal to the bulk connection of the transistors allows the amplification and switching stages of a conventional mixer to be combined into a single stage, thus improving the voltage headroom of the mixer. The addition of a transformer balun to the mixers improves the input impedance match, provides passive voltage gain, and performs single-ended to balanced conversion. A semi-analytical power-series analysis of the mixers is also presented. The mixer in which the RF signal is applied to the gates of the mixing transistors achieves a measured input-referred 1-dB compression point (P1dB) of −14 dBm, an input-referred third-order intercept point (IIP3) of −5.2 dBm, a gain of 13.6 dB, a noise figure (NF) of 26 dB, and an LO-to-RF isolation of 50 dB. The overall performance of both mixers is found to be comparable with other CMOS mixers, but with a higher noise figure (which can be mitigated with a high gain low-noise amplifier (LNA)).

Restoring vision to the blind has been an objective of several research teams for a number of years. It is known that spots of light -- phosphenes -- can be elicited by way of electrical stimulation of surviving retinal neurons. Beyond this, however, our understanding of prosthetic vision remains rudimentary. To advance the realisation of a clinically viable prosthesis for the blind, a versatile integrated circuit neurostimulator was designed, manufactured, and verified. The neurostimulator provides electrical stimuli to surviving neurons in the visual pathway, affording blind patients some form of patterned vision; besides other benefits (independence), this limited vision would let patients distinguish between day and night (resetting their circadian rhythm). This thesis presents the development of the neurostimulator, an interdisciplinary work bridging engineering and medicine. Features of the neurostimulator include: high-voltage CMOS transistors in key circuits, to prevent voltage compliance issues due to an unknown or changing combined tissue and electrode/tissue interface impedance; simultaneous stimulation using current sources and sinks, with return electrodes configured to provide maximum charge containment at each stimulation site; stimuli delivered to a two dimensional mosaic of hexagonally packed electrodes, multiplexing current sources and sinks to allow each electrode in the whole mosaic to become a stimulation site; electrode shorting to remove excess charge accumulated during each stimulation phase. Detailed electrical testing and characterisation verified that the neurostimulator performed as specified, and comparable to, or better than, other vision prostheses neurostimulators. In addition, results from several animal experiments verified that the neurostimulator can elicit electrically evoked visual responses. The features of the neurostimulator enable research into how simultaneous electrical stimulation affects the visual neural pathways; those research results could impact other neural prosthetics research and devices.

Techn. Univ., Diss., 2006--Darmstadt