abstract: The dissertation encompasses the transformer-less single phase PV inverters for both the string and microinverter applications. Two of the major challenge with such inverters include the presence of high-frequency common mode leakage current and double line frequency power decoupling with reliable capacitors without compromising converter power density. Two solutions are presented in this dissertation: half-bridge voltage swing (HBVS) and dynamic dc link (DDCL) inverters both of which completely eliminates the ground current through topological improvement. In addition, through active power decoupling technique, the capacitance requirement is reduced for both, thus achieving an all film-capacitor based solution with higher reliability. Also both the approaches are capable of supporting a wide range of power factor. Moreover, wide band-gap devices (both SiC and GaN) are used for implementing their hardware prototypes. It enables the switching frequency to be high without compromising on the converter efficiency. Also it allows a reduced magnetic component size, further enabling a high power density solution, with power density far beyond the state-of-the art solutions. Additionally, for the transformer-less microinverter application, another challenge is to achieve a very high gain DC-DC stage with a simultaneous high conversion efficiency. An extended duty ratio (EDR) boost converter which is a hybrid of switched capacitors and interleaved inductor technique, has been implemented for this purpose. It offers higher converter efficiency as most of the switches encounter lower voltage stress directly impacting switching loss; the input current being shared among all the interleaved converters (inherent sharing only in a limited duty ratio), the inductor conduction loss is reduced by a factor of the number of phases. Further, the EDR boost converter has been studied for both discontinuous conduction mode (DCM) operations and operations with wide input/output voltage range in continuous conduction mode (CCM). A current sharing between its interleaved input phases is studied in detail to show that inherent sharing is possible for only in a limited duty ratio span, and modification of the duty ratio scheme is proposed to ensure equal current sharing over all the operating range for 3 phase EDR boost. All the analysis are validated with experimental results. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017

This paper describes the design, fabrication, and testing of a 1.2 kV, 6.5 mΩ, half-bridge, SiC MOSFET power module to evaluate the impact of parametric device tolerances on electrical and thermal performance. Paralleling power devices increases current handling capability for the same bus voltage. However, inherent parametric differences among dies leads to unbalanced current sharing causing overstress and overheating. In this design, a symmetrical DBC layout is utilized to balance parasitic inductances in the current pathways of paralleled dies to isolate the impact of parametric tolerances. In addition, the paper investigates the benefits of flexible PCB in place of wire bonds for the gate loop interconnection to reduce and minimize the gate loop inductance. The balanced modules have dies with similar threshold voltages while the unbalanced modules have dies with unbalanced threshold voltages to force unbalanced current sharing. The modules were placed into a clamped inductive DPT and a continuous, boost converter. Rogowski coils looped under the wire bonds of the bottom switch dies to observe current behavior. Four modules performed continuously for least 10 minutes at 200 V, 37.6 A input, at 30 kHz with 50% duty cycle. The modules could not perform for multiple minutes at 250 V with 47.7 A (23 A/die). The energy loss differential for a ~17% difference in threshold voltage ranged from 4.52% (~10 µJ) to -30.9% (~30 µJ). The energy loss differential for a ~0.5% difference in V_th ranged from -2.26% (~8 µJ) to 5.66% (~10 µJ). The loss differential was dependent on whether current unbalance due to on-state resistance compensated current unbalance due to threshold voltage. While device parametric tolerances are inherent, if the higher threshold voltage devices can be paired with devices that have higher on-state resistance, the overall loss differential may perform similarly to well-matched dies. Lastly, the most consistently performing unbalanced module with 17.7% difference in V_th had 119.9 µJ more energy loss and was 22.2°C hotter during continuous testing than the most consistently performing balanced module with 0.6% difference inV_th. / Master of Science / This paper describes the design, construction, and testing of advanced power devices for use in electric vehicles. Power devices are necessary to supply electricity to different parts of the vehicle; for example, energy is stored in a battery as direct current (DC) power, but the motor requires alternating current (AC) power. Therefore, power electronics can alter the energy to be delivered as DC or AC. In order to carry more power, multiple devices can be used together just as 10 people can carry more weight than 1 person. However, because the devices are not perfect, there can be slight differences in the performance of one device to another. One device may have to carry more current than another device which could cause failure earlier than intended. In this research project, multiple power devices were placed into a package, or "module." In a control module, the devices were selected with similar properties to one another. In an experimental module, the devices were selected with properties very different from one another. It was determined that the when the devices were 17.7% difference, there was 119.9 µJ more energy loss and it was 22.2°C hotter than when the difference was only 0.6%. However, the severity of the difference was dependent on how multiple device characteristics interacted with one another. It may be possible to compensate some of the impact of device differences in one characteristic with opposing differences in another device characteristic.

Boost dc-to-dc converters have very good source interface properties. The input inductor makes the source current smooth and hence these converters provide very good EMI performance. On account of this good property, the boost converter is also the preferred converter for off-line UPF rectifiers. One of the issues of concern in these converters is the large size of the storage capacitor on the dc link. The boost converter suffers from the disadvantage of discontinuous current injected to the load. The size of the capacitor is therefore large. Further, the ripple current in the capacitor is as much as the load current; hence the ESR specification of the tank capacitor is quite demanding. This is specially so in the emerging application areas of automotive power conversion, where the input voltage is low (typically 12V) and large voltage boost (4 to 5) are desired. The first part of this thesis suggests multi-phase boost converter to overcome the disadvantages of large size storage capacitor in boost converter. Comparison between the specification of single stage and multi-stages is thoroughly examined. Besides the average small signal analysis of N converters in parallel and obtaining an equivalent second order system are discussed. By paralleling the converters the design of closed loop control is a demanding task. To achieve proper current sharing among the stages using current control method is inevitable. Design and implementation of closed loop control of multi-phase boost converter both in analog and digital is the topic of next part of the thesis. Comparison between these two approaches is presented in this part and it will be shown that digital control is more convenient for such a topology on account of the requirement of synchronization, phase shifted operation, current balancing and other desired functions, which will be discussed later in detail. A new direct digital control method, which is simple and fast, is developed. Two different realizations with DSP controller and FPGA controller are considered. In the last part of the thesis a novel soft switching circuit for boost converter is presented. It provides Zero Voltage Switching (ZVS) for the main switch and Zero Current Switching (ZCS) for the auxiliary switch. The paper presents the idealized analysis giving all the circuit intervals and the equations necessary for the design of such a circuit. The proposed soft switching circuit is particularly suited for the tapped-inductor boost circuit with a minimum number of extra components. Extension of the method to tapped inductor boost converter addresses the application of Zero Voltage Transition (ZVT) to high conversion ratio converters. Extension of the method to multiphase boost converter shows that with less number of auxiliary switches soft switching operation can be achieved for all interleaved switching devices. Several laboratory prototype boost converters have been built to confirm the theoretical results and design methods are matching with both simulation and experimental results.

With the rapid development of microprocessor and semiconductor technology, industry continues to update the requirements for power supplies. For telecommunication and computing system applications, power supplies require increasing current level while the supply voltage keeps decreasing. For example, the Intel's CPU core voltage decreased from 2 volt in 1999 to 1 volt in 2005 while the supply current increased from 20A in 1999 to up to 100A in 2005. As a result, low-voltage high-current high efficiency dc-dc converters with high power-density are demanded for state-of-the-art applications and also the future applications. Half-bridge dc-dc converter with current-doubler rectification is regarded as a good topology that is suitable for high-current low-voltage applications. There are three control schemes for half-bridge dc-dc converters and in order to provide a valid unified analog model for optimal compensator design, the analog state-space modeling and small signal modeling are studied in the dissertation and unified state-space and analog small signal model are derived. In addition, the digital control gains a lot of attentions due to its flexibility and re-programmability. In this dissertation, a unified digital small signal model for half-bridge dc-dc converter with current doubler rectifier is also developed and the digital compensator based on the derived model is implemented and verified by the experiments with the TI DSP chip. In addition, although current doubler rectifier is widely used in industry, the key issue is the current sharing between two inductors. The current imbalance is well studied and solved in non-isolated multi-phase buck converters, yet few discusse this issue in the current doubler rectification topology within academia and industry. This dissertation analyze the current sharing issue in comparison with multi-phase buck and one modified current doubler rectifier topology is proposed to achieve passive current sharing. The performance is evaluated with half bridge dc-dc converter; good current sharing is achieved without additional circuitry. Due to increasing demands for high-efficiency high-power-density low-voltage high current topologies for future applications, the thermal management is challenging. Since the secondary-side conduction loss dominates the overall power loss in low-voltage high-current isolated dc-dc converters, a novel current tripler rectification topology is proposed. Theoretical analysis, comparison and experimental results verify that the proposed rectification technique has good thermal management and well-distributed power dissipation, simplified magnetic design and low copper loss for inductors and transformer. That is due to the fact that the load current is better distributed in three inductors and the rms current in transformer windings is reduced. Another challenge in telecommunication and computing applications is fast transient response of the converter to the increasing slew-rate of load current change. For instance, from Intel's roadmap, it can be observed that the current slew rate of the age regulator has dramatically increased from 25A/uS in 1999 to 400A/us in 2005. One of the solutions to achieve fast transient response is secondary-side control technique to eliminate the delay of optocoupler to increase the system bandwidth. Active-clamp half bridge dc-dc converter with secondary-side control is presented and one industry standard 16th prototype is built and tested; good efficiency and transient response are shown in the experimental section. However, one key issue for implementation of secondary-side control is start-up. A new zero-voltage-switching buck-flyback isolated dc-dc converter with synchronous rectification is proposed, and it is only suitable for start-up circuit for secondary-side controlled converter, but also for house-keeping power supplies and standalone power supplies requiring multi-outputs.

With the development of electric vehicle (EV) charging systems, energy storage systems (ESS), data center power supplies, and solid-state transformer (SST) systems, the fixed-ratio isolated DC-DC converter, namely the DC transformer (DCX), has gained significant popularity. Similar to the passive AC transformer, DCX can bidirectionally convey DC power with very high efficiency. Due to zero-voltage switching (ZVS) and a small root mean square (RMS) current, the open-loop CLLC resonant converter operating at the resonant frequency is a promising candidate for DCX with a constant voltage transfer ratio. In Chapter 2, to solve unsmooth bidirectional power flow and current distortion in the traditional CLLC-DCX with synchronization rectification (SR) modulation, a dual-active-synchronization (DAS) modulation is adopted with identical driving signals on both sides. First, the switching transition of this modulation is thoroughly analyzed considering the large switch's output capacitances. After comparing different transitions, a so-called sync-ZVS transition is more desirable with ZVS, has no deadtime conduction loss, and almost has load-independent voltage gain. An axis and center symmetric (ACS) method is proposed to achieve this switching transition. Based on this method, an overall design procedure of CLLC-DCX with DAS modulation is also proposed. However, designing a high-power and high-frequency transformer for CLLC-DCX presents significant challenges due to the trade-off between thermal management, leakage inductance minimization, and insulation requirements. To overcome this trade-off between power rating and operation frequency, a scalable electronic-embedded transformer (EET) with a low-voltage bridge integrated into the transformer windings is proposed in Chapter 3. The EET addresses the challenge through simple open-loop control and natural current sharing, enabling easy parallel connection and scaling to different power ratings. Based on this concept, a bidirectional, EET-based DC transformer (EET-DCX) is proposed to solve the transformer-level paralleling and resonant point shift issues in traditional LLC-DCX designs. By employing the embedded full bridge, the EET-DCX effectively cancels out the impedance of the leakage inductance, ensuring optimal operation at any frequency. Additionally, the EET-DCX retains the inherent advantages of the LLC-DCX, such as load-independent voltage gain, simple open-loop control, full-load range ZVS, and low circulating current. Leveraging these advantages, the proposed EET-DCX solution has the potential to push the boundaries of transformer performance to the MHz operation frequency range with hundreds of kilowatts of power capability. Moreover, to address the significant RMS current problem of the CLLC-DCX, a trapezoidal current modulation is also proposed in Chapter 3. Compared to the CLLC-DCX with a sinusoidal current, an EET-DCX with a trapezoidal current can reduce the total conduction loss by up to 23%. This total conduction loss includes semiconductor loss on both high-voltage and low-voltage bridges and transformer winding loss. In light of this EET concept, another resonant commutation (RC) EET-DCX is proposed to streamline the circuit. First, it replaces the embedded full bridge with a low-voltage bidirectional AC switch. Second, it introduces a resonant current commutation to realize a quasi-trapezoidal transformer current with a smaller RMS value. Compared to the triangular current produced by the original EET-DCX, the RMS current can be decreased by 15%. By incorporating only one embedded bidirectional AC switch, the high-frequency transformer leakage inductance impedance is fully neutralized. As a result, the rated power of the proposed RC EET-DCX can be readily scaled up through transformer-level parallelism. Furthermore, the RC EET-DCX maintains the benefits of a typical LLC/CLLC-DCX, including load-independent voltage gain, full load range ZVS, and low circulating current. However, either in EET-DCX or RC EET-DCX, the trapezoidal current modulation will increase the voltage stress on the low-voltage full bridge or bidirectional AC switch, especially when the leakage inductance is large and variable, such as in the high-power wireless charging application. To address this trade-off between RMS current and voltage stress, this paper proposes the concept of a hybrid resonant-type EET-DCX with a series resonant capacitor. Following this concept, two specific topologies, hybrid EET-DCX and hybrid RC EET-DCX, are proposed. The main difference between these topologies is that the former adopts a full bridge. In a hybrid RC EET-DCX, a resonant current commutation scheme is developed. Among these topologies, since the passive capacitor can mainly cancel the leakage inductance impedance, the full bridge or AC switch only needs to handle the remaining impedance. Thus, the voltage stress on active components can be dramatically decreased. Additionally, these two proposed topologies can retain all the advantages of previous EET-DCX designs, including natural current sharing, load-independent voltage gain, simple open-loop control, and full-load range ZVS. The comparison between these two topologies is thoroughly studied. Finally, a 12-kW DCX testbench is built to verify all the analysis and performance in Chapter 3. If output voltage regulation is required, DCX can cooperate with other voltage regulators to realize high conversion efficiency and power density. In Chapter 4, two DCX applications are implemented: an 18-kW 98.8% peak efficiency EV battery charger with partial power processing and a 50-kW symmetric 3-level buck-boost converter with common-mode (CM) noise reduction. In the first battery charger, a large portion of the power is handled by an 18 kW CLLC-DCX, and the remaining partial power goes through a 3-phase interleaved buck converter. The proposed switching transition optimization in Chapter 2 is adopted in the 18-kW CLLC-DCX to realize 98.8% peak efficiency. To handle the step-up and step-down cases at the same time, a symmetric 3-level buck-boost converter with coupled inductors is also studied as a post regulator. With symmetric topology and quadrangle current control, the converter can achieve a CM noise reduction and full load range ZVS with a small RMS current. To further optimize the performance and simplify the control, a mid-point bridging with a better CM noise reduction and a split capacitor voltage auto-balance is implemented. A 50-kW prototype is built to verify the above analysis. To summarize, Chapter 2 first proposes a switching transition optimization for CLLC-DCX. Later, to address the intrinsic trade-off between transformer rating power and frequency, an EET concept and its corresponding soft-switching DCX family are found in Chapter 3. Finally, to handle voltage regulation, two examples for practical applications are studied in Chapter 4 —one is an 18-kW partial power converter, and the other is a 50-kW 3-L buck-boost converter. Finally, Chapter 5 will draw conclusions and illustrate future work. / Doctor of Philosophy / With the development of electric vehicle (EV) charging systems, energy storage systems (ESS), data center power supply, and solid-state transformer (SST) systems, the fixed-ratio isolated dc-dc converter, namely dc transformer (DCX), has gained significant popularity. However, designing a high-performance DCX still has many challenges, such as large dead time loss, poor current sharing, and sensitivity to parameter tolerance. Firstly, the state-of-the-art resonant CLLC-DCX is optimized in Chapter 2. With an optimal switching frequency and dead time, both the primary and secondary sides of zero voltage switching (ZVS) can begin and finish simultaneously, which means dead time loss caused by current through the body diode can be eliminated. Therefore, the efficiency of CLLC-DCX can be improved. However, designing a high-power and high-frequency CLLC-DCX transformer still presents significant challenges due to the trade-off between thermal management, leakage inductance minimization, and insulation requirements. To overcome this trade-off, in Chapter 3, a scalable electronic-embedded transformer (EET) concept with a low-voltage bridge integrated into the transformer windings is proposed. The EET addresses the challenge through its simple open-loop control and natural current sharing, enabling easy parallel connection and scaling to different power ratings. In light of this EET concept, a new family of soft-switching DCXs is proposed for different applications, such as high-power wireless charging systems. All these EET-based DCXs retain the merits of typical CLLC-DCX, such as small circulating current ringing, small turn-off current, full load range ZVS, and load-independent gain. After realizing a desirable design for DCX, Chapter 4 presents two DCX applications with voltage regulation. Firstly, an 18 kW 98.8% peak efficiency battery charger is designed with partial power processing. Most of the power will go through an optimized DCX, and the remaining small portion of power will go through a 3-phase interleaved buck converter. On the other hand, DCX can also be adopted as a front-end or rear-end converter in a typical two-state DC-DC converter. As for another stage, a non-isolated DC-DC converter with a large output range can be used to handle voltage regulation. Following this structure, a 50-kW symmetric 3-L buck-boost converter with coupled inductors and reduced common emission is proposed. To summarize, the state-of-the-art CLLC-DCX is optimized in Chapter 2. Afterward, a new concept of EET-DCX and its corresponding DCX family is proposed in Chapter 3. After obtaining an optimized DCX, two practical applications with DCX are implemented in Chapter 4. Finally, Chapter 5 will draw conclusions and illustrate future work.

The main goal of this thesis is to develop practical digital controller architectures for multi-phase dc-dc converters utilized in low power (up to few hundred watts) and cost-sensitive applications. The proposed controllers are suitable for on-chip integration while being capable of providing advanced features, such as dynamic efficiency optimization, inductor current estimation, converter component identification, as well as combined dynamic current sharing and fast transient response. The first part of this thesis addresses challenges related to the practical implementation of digital controllers for low-power multi-phase dc-dc converters. As a possible solution, a multi-use high-frequency digital PWM controller IC that can regulate up to four switching converters (either interleaved or standalone) is presented. Due to its configurability, low current consumption (90.25 μA/MHz per phase), fault-tolerant work, and ability to operate at high switching frequencies (programmable, up to 10 MHz), the IC is suitable to control various dc-dc converters. The applications range from dc-dc converters used in miniature battery-powered electronic devices consuming a fraction of watt to multi-phase dedicated supplies for communication systems, consuming hundreds of watts. A controller for multi-phase converters with unequal current sharing is introduced and an efficiency optimization method based on logarithmic current sharing is proposed in the second part. By forcing converters to operate at their peak efficiencies and dynamically adjusting the number of active converter phases based on the output load current, a significant improvement in efficiency over the full range of operation is obtained (up to 25%). The stability and inductor current transition problems related to this mode of operation are also resolved. At last, two reconfigurable digital controller architectures with multi-parameter estimation are introduced. Both controllers eliminate the need for external analog current/temperature sensing circuits by accurately estimating phase inductor currents and identifying critical phase parameters such as equivalent resistances, inductances and output capacitance. A sensorless non-linear, average current-mode controller is introduced to provide fast transient response (under 5 μs), small voltage deviation and dynamic current sharing with multi-phase converters. To equalize the thermal stress of phase components, a conduction loss-based current sharing scheme is proposed and implemented.

The main goal of this thesis is to develop practical digital controller architectures for multi-phase dc-dc converters utilized in low power (up to few hundred watts) and cost-sensitive applications. The proposed controllers are suitable for on-chip integration while being capable of providing advanced features, such as dynamic efficiency optimization, inductor current estimation, converter component identification, as well as combined dynamic current sharing and fast transient response. The first part of this thesis addresses challenges related to the practical implementation of digital controllers for low-power multi-phase dc-dc converters. As a possible solution, a multi-use high-frequency digital PWM controller IC that can regulate up to four switching converters (either interleaved or standalone) is presented. Due to its configurability, low current consumption (90.25 μA/MHz per phase), fault-tolerant work, and ability to operate at high switching frequencies (programmable, up to 10 MHz), the IC is suitable to control various dc-dc converters. The applications range from dc-dc converters used in miniature battery-powered electronic devices consuming a fraction of watt to multi-phase dedicated supplies for communication systems, consuming hundreds of watts. A controller for multi-phase converters with unequal current sharing is introduced and an efficiency optimization method based on logarithmic current sharing is proposed in the second part. By forcing converters to operate at their peak efficiencies and dynamically adjusting the number of active converter phases based on the output load current, a significant improvement in efficiency over the full range of operation is obtained (up to 25%). The stability and inductor current transition problems related to this mode of operation are also resolved. At last, two reconfigurable digital controller architectures with multi-parameter estimation are introduced. Both controllers eliminate the need for external analog current/temperature sensing circuits by accurately estimating phase inductor currents and identifying critical phase parameters such as equivalent resistances, inductances and output capacitance. A sensorless non-linear, average current-mode controller is introduced to provide fast transient response (under 5 μs), small voltage deviation and dynamic current sharing with multi-phase converters. To equalize the thermal stress of phase components, a conduction loss-based current sharing scheme is proposed and implemented.