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Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.

KTH is funding a project whose goal is to send a satellite into space. This project is called MIST (Miniature Student Satellite) which is assembled by a team of students at KTH. On the satellite there are experiments that are invented by other teams, in two of those experiments a power supply is required. This thesis is a technical investigation on how to design the power supply to both of those experiments, which are called SiC and Piezo LEGS. Piezo LEGS will investigate how their nanosized motors will behave and function in a space environment. SiC will investigate how their silicone carbide transistors will be affected by the space environment. A team made of four other students was selected to produce SiC experiments and a PCB in which this work is included. A literature study was done to get a better understanding of how power supplies work and to know how to select a good power supply. When the power supplies were selected they were simulated to meet the requirements. The next step was to do a Printed Circuit Board(PCB) for the SiC experiment and Piezo LEGS to be able to test the power supplies functionality in the physical world. Both of the converters reached the required output and characteristics working on their respective PCB. More time is needed for long time testing and optimization on the PCB layouts. / MIST (Miniature Student Satellite) är ett av KTH subventionerat projekt vilket har som mål att skicka upp en satellit i rymden. Projektet kommer omfatta flera olika experiment. Piezo LEGS ska undersöka en motors funktionalitet i rymdmiljö. SiC ska undersöka hur Silicon carbide halvledare och transistorer påverkas av rymdmiljön. Båda experimenten kräver varsin strömförsörjning för att fungera. Detta projekt ska undersöka kraven på strömförsörjning samt testa prototypen av ett kretskort för densamma. Först genomfördes en förstudie av de två typer av regulatorer som vanligtvis används som strömförsörjning, den linjära regulatorn och switch-mode regulatorn för att förklara olika strömförsörjningsteknologier, samt ta reda på de olika miljökraven. Baserat på förstudiens resultat erhölls kunskap för hur tester ska tas fram för funktionalitet av regulatorerna så att de når kraven för MIST för att sedan kunna producera de båda regulatorerna. Målet är att resultatet av simuleringarna på strömförsörjningen ska stämma överens med utfallet av kretskorten som produceras. Mätningar genomfördes på prototyp kretskort som visade att simuleringarna var korrekta och gav strömförsörjningen rätt resultat på kretskorten. Några av funktionerna på regulatorerna hann ej testas på grund av tidsbrist och mycket framtida arbete kvarstår.

The contribution describes the construction of a CVD system, the deposition of thin molybdenum disulphide layers using this system and the analysis of the samples produced. The deposition of thin molybdenum disulphide layers and an intercalation of the silicon carbide substrate used were demonstrated and the measurement results obtained by atomic force microscopy and photoelectron spectroscopy were further discussed.

This thesis deals with the analysis of nano-structured layers deposited by high-frequency magnetron sputtering on the monocrystalline silicon surface. The content of the work focuses on the magnetron sputtering application as an alternative method for passivation and antireflection layers deposition of silicon solar cells. The procedure of pre-deposite silicon surface cleaning by plasma etching in the Ar/H2 gas mixture atmosphere is suggested. In the next step the silicon nitride and aluminum nitride layers with hydrogen content in Ar/N2/H2 gas mixture by magnetron sputtering are deposited. One part of the thesis describes an experimental pseudo-carbide films deposition from a silicon target in the atmosphere of acetylene (C2H2). An emphasis is placed on the research of sputtered layers properties and on the conditions on the silicon-layer interface with the help of the standard as well as special measurement methods. Sputtered layers structure is analyzed by modern X-ray spectroscopy (XPS) and by Fourier infrared spectroscopy (FTIR). Optical ellipsometry and spectrophotometry is used for the diagnostic of the layers optical properties depending upon the wavelength of incident light. A special method of determining the surface lay-out of the charge´s carrier life in the volume and on the surface of silicon is employed to investigate the passivating effects of the sputtered layers.

La synthèse du graphène par traitement thermique d’un substrat de carbure de silicium (SiC) est une technique prometteuse pour l’intégration de ce nouveau matériau dans l’industrie, notamment dans les dispositifs électroniques. L’avantage de cette méthode réside dans la croissance de films minces de graphène de taille macroscopique directement sur substrat isolant. Toutefois, avant d’intégrer ce matériau, il convient d’en contrôler la synthèse et d’en moduler les propriétés. Dans ce travail de thèse, nous étudions les propriétés structurales et électroniques du graphène obtenu par la graphitisation des polytypes 3C-, 4H- et 6H-SiC. A partir de diverses méthodes de caractérisation, telles que la diffraction des électrons lents (LEED) ou la microscopie et spectroscopie à effet tunnel (STM/STS), nous avons vérifié, dans un premier temps, que le caractère discontinu du graphène sur les bords de marches peut introduire un confinement latéral supplémentaire des électrons dans le graphène. Dans un second temps, l’observation des singularités de Van Hove nous a permis de démontrer l’effet de confinement unidimensionnel dans les régions d’accumulations de marches du SiC. Enfin, l’introduction de désordre dans nos couches de graphène induit une réduction de la densité de porteurs de charges dans les couches. De même, ce désordre conduit à une transition de phase quantique entre le régime localisé et le régime d’effet Hall quantique. / The synthesis of graphene by thermal decomposition of silicon carbide (SiC) is a promising technique for the integration of this new material in the industry, especially in electronic devices. The advantage of this method lies in the growth of macroscopic graphene films directly on an insulator substrate. However, before using this material in electronic devices, it is advisable to control its synthesis and modulate its properties. In this thesis, we present the structural and electronic properties of graphene obtained by graphitization of 3C- , 4H - and 6H- SiC polytypes. Various characterization methods were used, including low energy electron diffraction (LEED) and microscopy and scanning tunneling spectroscopy (STM / STS). Based on STM / STS measurements, we show that the discontinuity of epitaxial graphene at the step edges may introduce an additional lateral confinement of electrons in graphene. The observation of Van Hove singularities in the STS spectra confirmed the one dimensional confinement of graphene in step bunching regions of SiC.Finally, we show that when disorder is introduced on our graphene samples, the charge carrier density is reduced. This disorder lead to the observation of a quantum phase transition from a localized regime to a quantum Hall effect regime.

Die besonderen Eigenschaften von Graphen ermöglichen das Design von elektronischen Bauteilen im Nanometerbereich. Graphen kann auf der Oberfläche von Siliziumkarbonat (SiC) durch das Ausdampfen von Si epitaktisch gewachsen werden. Ein detailliertes Verständnis der atomaren und elektronischen Struktur der Grenzschicht zwischen Graphen und SiC ist ein wichtiger Schritt um die Wachstumsqualität zu verbessern. Wir nutzen Dichtefunktionaltheorie um das Hybridsystem Graphen-SiC auf atomarer Ebene zu beschreiben. Experimentelle Arbeiten auf der Si Seite von SiC haben gezeigt, dass die Grenzschicht (ZLG) durch eine teilweise kovalent gebundene Kohlenstofflage wächst; darüber bildet sich die erste Graphenlage (MLG). Durch das Konstruieren eines ab initio Oberflächenphasendiagrams zeigen wir, dass sowohl ZLG als auch MLG Gleichgewichtsphasen sind. Unsere Ergebnisse implizieren, dass Temperatur- und Druckbedingungen für den selbstbegrenzenden Graphenwachstum existieren. Wir zeigen, dass sich das Doping und die Riffellung von epitaktischem Graphene durch H-Interkalation reduzieren. Im Experiment unterscheidet sich das Graphenwachstum auf der C Seite qualitativ von der Si Seite. Zu Beginn des Graphenwachstums wird eine Mischung verschiedener Oberflächenphasen beobachtet. Wir diskutieren die Stabilität dieser konkurierenden Phasen. Die atomaren Strukturen von einigen dieser Phasen, inklusive der Graphen-SiC Grenzschicht, sind nicht bekannt wodurch die theoretische Beschreibung erschwert wird. Wir präsentieren ein neues Model für die bisher unbekannte (3x3) Rekonstruktion, das Si Twist Model. Die Oberflächenenergie vom Si Twist Model und von der bekannten (2x2)c Phase schneiden sich direkt an der Grenze zur Graphitbildung. Dies erklärt die experimentell beobachtete Phasenkoexistenz zu Beginn des Graphenwachstums. Wir schlussfolgern, dass auf der C Seite der kontrollierte Graphenewachstum durch Si-reiche Oberflächenphasen blockiert wird. / Graphene with its unique properties spurred the design of nanoscale electronic devices. Graphene films grown by Si sublimation on SiC surfaces are promising material combinations for graphene applications. Understanding the atomic and electronic structure of the SiC-graphene interface, is an important step to refine the growth quality. In this work, density-functional theory is used to simulate the SiC-graphene interface on an atomistic level without empirical parameters. Experimental work has shown that on the Si face of SiC, a partially covalently bonded carbon layer, the zero-layer graphene (ZLG), grows. On top of the ZLG layer forms mono-layer graphene (MLG) as large ordered areas and then few-layer graphene. By constructing an ab initio surface phase diagram, we show that ZLG and MLG are at least near equilibrium phases. Our results imply the existence of temperature and pressure conditions for self-limiting growth of MLG key to the large-scale graphene production. H intercalation significantly reduces both the corrugation and the graphene doping. Our calculations demonstrate that unsaturated Si atoms in the ZLG influence the electronic structure of graphene. The situation on the C face of SiC is very different. The experimental growth of large areas of graphene with well defined layer thickness is difficult. At the onset of graphene formation a phase mixture of different surface phases is observed. We will address the stability of the different occuring surface phases. However, the atomic structure of some of the competing surface phases, as well as of the SiC-graphene interface, is unknown. We present a new model for the (3x3) reconstruction, the Si twist model. The surface energies of this Si twist model, the known (2x2)c adatom phase, and a graphene covered (2x2)c phase cross at the chemical potential limit of graphite, which explains the observed phase mixture. We argue that well-controlled graphene formation is hindered by Si-rich surface phases.

Dans le domaine de l’électronique de puissance, les dispositifs en carbure de silicium (SiC) sont bien adaptés pour fonctionner dans des environnements à haute température, haute puissance, haute tension et haute radiation. Le carbure de silicium (SiC) est un matériau semi-conducteur à large bande d’énergie interdite. Ce matériau possède des caractéristiques en température et une tenue aux champs électriques bien supérieure à celles de silicium. Ces caractéristiques permettent des améliorations significatives dans une grande variété d’applications et de systèmes. Parmi les interrupteurs existants, le JFET en SiC est l’interrupteur le plus avancé dans son développement technologique, et il est au stade de la pré-commercialisation. Le travail réalisé au cours de cette thèse consiste à caractériser électriquement des JFET- SiC de SiCED en fonction de la température (25°C-300°C). Des mesures ont été réalisé en statique (courant-tension), en dynamique (capacité-tension) et en commutation sur charge R-L (résistive-inductives) et dans un bras d’onduleur. Un modèle multi-physique du transistor VJFET de SiCED à un canal latéral a été présenté. Le modèle a été développé en langage MAST et validé aussi bien en mode de fonctionnement statique que dynamique en utilisant le simulateur SABER. Ce modèle inclut une représentation asymétrique du canal latéral et les capacités de jonction de la structure. La validation du modèle montre une bonne concordance entre les mesures et la simulation. / In the field of power of electronics, silicon carbide (SiC) devices are well suited to operate in environments at high temperature, high power, high voltage and high radiation. The silicon carbide belongs to the class of wide band gap semiconductor material. Indeed, this material has higher values than the silicon ones for the temperature breakdown and a high electric field breakdown. These characteristics enable significant improvements in wide varieties of applications and systems. Among the existing switches, SiC JFET is the most advanced one in its technological development because it is at the stage of pre-marketing. The study realized during this thesis was to electrically characterize SiC JFETs from SiCED versus the temperature (25°C-300°C). The characteristic are based on static measurements (currentvoltage), capacitive measurements (capacitive-voltage) and switching measurements in an R-L (resistor-inductor) load circuit and an inverter leg. A multi-physical model of the VJFET with a lateral channel is presented. The model was developed and validated in MAST language both in static and dynamic modes using the SABER simulator. The model includes an asymmetric representation of the lateral channel and the junction capacitances of the structure. The validation of the model shows a good agreement between measurements and simulation.